Opened 9 years ago

Closed 9 years ago

#627 closed defect (fixed)

Inferring split_transform_flag: mismatch between HM 7.1 and D9 (I1003) d9 Draft Text

Reported by: hreddy Owned by: bbross
Priority: minor Milestone: D8
Component: Text Version: D7 (I1003) d9
Keywords: split_transform_flag Cc: bbross, wjhan, jct-vc@…

Description

Hi,

HM 7.1 decoder seems to use log2MinTUSizeInCU (derived from UInt TComDataCU::getQuadtreeTULog2MinSizeInCU) to decide whether split_transform_flag needs to be inferred or parsed from the bitstream, but in I1003-d9 Draft Log2MinTrafoSize (SPS level parameter) is used directly to decide whether split_transform_flag is inferred or parsed from the bitstream as follows:

if( log2TrafoSize <= Log2MaxTrafoSize &&

log2TrafoSize > Log2MinTrafoSize &&
trafoDepth < MaxTrafoDepth && !(IntraSplitFlag && trafoDepth = = 0) )

split_transform_flag[ x0L ][ y0L ][ trafoDepth ]

For example, if LCU=32x32, log2cbsize=5, log2trafosize=5, Log2MaxTrafoSize=5, Log2MinTrafoSize=4, MaxtrafoDepth=1, part_mode=2Nx2N, pred_mode_flag=Intra, trafoDepth=0

HM 7.1 decoder computes log2MinTUSizeInCU as 5 and infers the
split_transform_flag as 0 (with out parsing the
split_transform_flag from the bit stream).

However based on the I1003-d9 Draft text, split_transform_flag
is parsed from the bit stream in this case.

Can you please clarify whether the Draft text needs to be fixed?

Thanks,
-Hari

Change History (3)

comment:1 Changed 9 years ago by DefaultCC Plugin

  • Cc bbross wjhan jct-vc@… added

comment:2 Changed 9 years ago by bbross

I would say the behavior of the draft is right because there is not reason to infer the flag because MaxTrafoDepth = 1 allows to to signal one splitting for 2Nx2N intra mode.

The problem certainly lies in the confusing definition of the trafo depth in HM.
When you refer to MaxTrafoDepth = 0 in the draft,
(max_transform_hierarchy_depth_inter/intra = 0 in SPS and IntraSplitFlag=0)
it is actually getQuadtreeTUMaxDepthInter = 1 in HM because of the following line in SPS parsing:

READ_UVLC( uiCode, "max_transform_hierarchy_depth_inter" );
pcSPS->setQuadtreeTUMaxDepthInter( uiCode+1 );

So when you configure the HM encoder to a depth equal to 1+1, i.e. QuadtreeTUMaxDepthInter/Intra=2, this should match with max_transform_hierarchy_depth_inter/intra = 1.

comment:3 Changed 9 years ago by bbross

  • Resolution set to fixed
  • Status changed from new to closed
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