Changeset 941 in 3DVCSoftware for branches/HTM-10.2-dev0
- Timestamp:
- 22 Apr 2014, 17:50:40 (11 years ago)
- File:
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- 1 edited
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branches/HTM-10.2-dev0/source/Lib/TLibCommon/TypeDef.h
r939 r941 108 108 // MTK_ARP_FLAG_CABAC_SIMP_G0061 Use 2 context for ARP flag referring to only left neighbor block in JCT3V-G0061 109 109 // MTK_ARP_REF_SELECTION_G0053 ARP Reference picture selection in JCT3V-G0053 110 #define MTK_ALIGN_SW_WD_BI_PRED_ARP_H0085 1 // Align the SW and WD for the bi-prediction ARP PUs by disallowing non-normative fast bi-prediction for ARP PUs, JCT3V-H0085 110 111 111 112 112 #define H_3D_IC 1 // Illumination Compensation, JCT3V-B0045, JCT3V-C0046, JCT3V-D0060 … … 120 120 // SEC_IC_ARP_SIG_G0072, Disabling IC when ARP is enabled, option 1 in JCT3V-G0072, part 2 in JCT3V-G0121 121 121 122 #define MTK_LOW_LATENCY_IC_ENCODING_H0086 1 // Low-latency IC encoding in JCT3V-H0086123 #if MTK_LOW_LATENCY_IC_ENCODING_H0086124 #define MTK_LOW_LATENCY_IC_ENCODING_THRESHOLD_H0086 0.1 // Threshold for low-latency IC encoding in JCT3V-H0086125 #endif126 122 127 123 #if H_3D_NBDV … … 166 162 // QC_DEPTH_MERGE_SIMP_G0127 Remove DV candidate and shifting candidate for depth coding 167 163 168 #define SEC_ADAPT_DISABLE_IVMP 1 // Disalbing IVMP merge candidates when IC is enabled, JCT3V-H0070169 164 170 165 #define H_3D_TMVP 1 // QC_TMVP_C0047 … … 201 196 // HS_TSINGHUA_SDC_SPLIT_G0111 202 197 // QC_PKU_SDC_SPLIT_G0123 Intra SDC Split 203 #define MTK_DELTA_DC_FLAG_ONE_CONTEXT_H0084_H0100_H0113 1 // Use only one context for CABAC of delta_dc_flag as in JCTVC-H0084, JCTVC-H0100 and JCTVC-H0113204 #define MTK_SDC_FLAG_FIX_H0095 1 // Remove conditional check of PCM flag based on SDC flag, JCTVC-H0095205 206 207 #define MTK_DMM_SIMP_CODE_H0092 1 // Remove CABAC context for DMM1 mode coding208 198 209 199 #define H_3D_INTER_SDC 1 // INTER SDC, Inter simplified depth coding … … 230 220 #define H_3D_FAST_TEXTURE_ENCODING 1 // Fast merge mode decision and early CU determination for texture component of dependent view, JCT3V-E0173 231 221 // MTK_FAST_TEXTURE_ENCODING_E0173 232 #define QC_IV_PRED_CONSTRAINT_H0137 1 // Constraint on inter-view (motion) prediction tools233 222 #if H_3D_DIM 234 223 #define H_3D_FAST_DEPTH_INTRA 1 // Fast DMM and RBC Mode Selection 235 224 // SCU_HS_FAST_DEPTH_INTRA_E0238_HHIFIX 236 225 #endif 237 238 #define ETRIKHU_BUGFIX_H0083 1 // bug-fix for DV candidate pruning239 #define ETRIKHU_CLEANUP_H0083 1 // cleaned-up source code for constructing merging candidate list240 #define ETRIKHU_CLEANUP_H0083_MISSING 1 // missing guard macros added by GT241 #define SHARP_SIMPLE_MERGE_H0062 1 // Restrict 3D-HEVC merge cand in small PUs242 #define MTK_DIS_SPBIP8X4_H0205 1 // Disable bi-prediction for 8x4 and 4x8 sub PU and remove the SPIVMP 2Nx2N restriction243 226 244 227 // Rate Control … … 270 253 #define DVFROM_ABOVE 1 271 254 #define IDV_CANDS 2 272 #define SEC_VER_DONBDV_H0103 1 // Vertical DV Restriction for DoNBDV273 255 #endif 274 256 … … 284 266 #define H_3D_DIM_DLT 1 // Depth Lookup Table 285 267 286 #define HS_DMM_SDC_PREDICTOR_UNIFY_H0108 1 // Unification of DMM and SDC predictor derivation287 #define LGE_SIMP_DIM_NOT_PRESENT_FLAG_CODING_H0119_H0135 1 // Use only one context for CABAC of dim_not_present_flag288 #define QC_SIMP_DELTADC_CODING_H0131 1 // Simplify detaDC entropy coding289 268 #if H_3D_DIM_DLT 290 269 #define H_3D_DELTA_DLT 1 291 #define SEC_NO_RESI_DLT_H0105 1292 #define MTK_DLT_CODING_FIX_H0091 1293 270 #endif 294 271 #define H_3D_DIM_ENC 1 // Depth Intra encoder optimizations, includes: … … 319 296 #define DBBP_INVALID_SHORT (-4) 320 297 #define RWTH_DBBP_PACK_MODE SIZE_2NxN 321 #define MTK_DBBP_AMP_REM_H0072 1322 #define RWTH_DBBP_NO_SPU_H0057 1323 #define SEC_DBBP_FILTERING_H0104 1324 #define MTK_DBBP_SIGNALING_H0094 1325 298 #endif 326 299 … … 337 310 #endif 338 311 312 313 ///////////////////////////////////////////////////////////////////////////////////////// 314 /////////////////////////////////// HTM-11.0 Integrations ////////////////////////////// 315 ///////////////////////////////////////////////////////////////////////////////////////// 316 317 318 319 #define MTK_ALIGN_SW_WD_BI_PRED_ARP_H0085 1 // Align the SW and WD for the bi-prediction ARP PUs by disallowing non-normative fast bi-prediction for ARP PUs, JCT3V-H0085 320 #define MTK_LOW_LATENCY_IC_ENCODING_H0086 1 // Low-latency IC encoding in JCT3V-H0086 321 #if MTK_LOW_LATENCY_IC_ENCODING_H0086 322 #define MTK_LOW_LATENCY_IC_ENCODING_THRESHOLD_H0086 0.1 // Threshold for low-latency IC encoding in JCT3V-H0086 323 #endif 324 #define SEC_ADAPT_DISABLE_IVMP 1 // Disalbing IVMP merge candidates when IC is enabled, JCT3V-H0070 325 326 #define MTK_DELTA_DC_FLAG_ONE_CONTEXT_H0084_H0100_H0113 1 // Use only one context for CABAC of delta_dc_flag as in JCTVC-H0084, JCTVC-H0100 and JCTVC-H0113 327 #define MTK_SDC_FLAG_FIX_H0095 1 // Remove conditional check of PCM flag based on SDC flag, JCTVC-H0095 328 #define MTK_DMM_SIMP_CODE_H0092 1 // Remove CABAC context for DMM1 mode coding 329 330 331 #define QC_IV_PRED_CONSTRAINT_H0137 1 // Constraint on inter-view (motion) prediction tools 332 #define ETRIKHU_BUGFIX_H0083 1 // bug-fix for DV candidate pruning 333 #define ETRIKHU_CLEANUP_H0083 1 // cleaned-up source code for constructing merging candidate list 334 #define ETRIKHU_CLEANUP_H0083_MISSING 1 // missing guard macros added by GT 335 #define SHARP_SIMPLE_MERGE_H0062 1 // Restrict 3D-HEVC merge cand in small PUs 336 #define MTK_DIS_SPBIP8X4_H0205 1 // Disable bi-prediction for 8x4 and 4x8 sub PU and remove the SPIVMP 2Nx2N restriction 337 338 #if H_3D_NBDV 339 #define SEC_VER_DONBDV_H0103 1 // Vertical DV Restriction for DoNBDV 340 #endif 341 342 #if H_3D_DIM 343 #define HS_DMM_SDC_PREDICTOR_UNIFY_H0108 1 // Unification of DMM and SDC predictor derivation 344 #define LGE_SIMP_DIM_NOT_PRESENT_FLAG_CODING_H0119_H0135 1 // Use only one context for CABAC of dim_not_present_flag 345 #define QC_SIMP_DELTADC_CODING_H0131 1 // Simplify detaDC entropy coding 346 347 #if H_3D_DIM_DLT 348 #define SEC_NO_RESI_DLT_H0105 1 349 #define MTK_DLT_CODING_FIX_H0091 1 350 #endif 351 #endif 352 #if H_3D_DBBP 353 #define MTK_DBBP_AMP_REM_H0072 1 354 #define RWTH_DBBP_NO_SPU_H0057 1 355 #define SEC_DBBP_FILTERING_H0104 1 356 #define MTK_DBBP_SIGNALING_H0094 1 357 #endif 358 359 #define MPI_SUBPU_DEFAULT_MV_H0077_H0099_H0111_H0133 1 360 339 361 ///////////////////////////////////////////////////////////////////////////////////////// 340 362 /////////////////////////////////// TBD ////////////////////////////// … … 353 375 354 376 #define H_MV_HLS7_GEN 0 // General changes (not tested) 355 #define MPI_SUBPU_DEFAULT_MV_H0077_H0099_H0111_H0133 1356 377 357 378
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