source: 3DVCSoftware/branches/HTM-10.1-dev0/source/Lib/TLibCommon/TypeDef.h @ 880

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Cleanups part 5.

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33
34/** \file     TypeDef.h
35    \brief    Define basic types, new types and enumerations
36*/
37
38#ifndef _TYPEDEF__
39#define _TYPEDEF__
40
41//! \ingroup TLibCommon
42//! \{
43/////////////////////////////////////////////////////////////////////////////////////////
44///////////////////////////////// EXTENSION SELECTION /////////////////////////////////// 
45/////////////////////////////////////////////////////////////////////////////////////////
46
47/* HEVC_EXT might be defined by compiler/makefile options.
48   
49   Linux makefiles support the following settings:   
50   make             -> HEVC_EXT not defined   
51   make HEVC_EXT=0  -> H_MV=0 H_3D=0   --> plain HM
52   make HEVC_EXT=1  -> H_MV=1 H_3D=0   --> MV only
53   make HEVC_EXT=2  -> H_MV=1 H_3D=1   --> full 3D
54*/
55
56#ifndef HEVC_EXT
57#define HEVC_EXT                    2
58#endif
59
60#if ( HEVC_EXT < 0 )||( HEVC_EXT > 2 )
61#error HEVC_EXT must be in the range of 0 to 2, inclusive.
62#endif
63
64#define H_MV          ( HEVC_EXT != 0)
65#define H_3D          ( HEVC_EXT == 2)
66
67
68/////////////////////////////////////////////////////////////////////////////////////////
69///////////////////////////////////   MAJOR DEFINES   /////////////////////////////////// 
70/////////////////////////////////////////////////////////////////////////////////////////
71
72#if H_MV
73#define H_MV_ENC_DEC_TRAC                 1  //< CU/PU level tracking
74#endif
75
76#if H_3D
77#define H_3D_QTLPC                        1   // OL_QTLIMIT_PREDCODING_B0068 //JCT3V-B0068
78                                              // HHI_QTLPC_RAU_OFF_C0160     // JCT3V-C0160 change 2: quadtree limitation and predictive coding switched off in random access units
79
80#define H_3D_VSO                          1   // VSO, View synthesis optimization, includes:
81                                              // HHI_VSO
82                                              // HHI_VSO_LS_TABLE_M23714 enable table base Lagrange multiplier optimization
83                                              // SAIT_VSO_EST_A0033, JCT3V-A0033 modification 3
84                                              // LGE_WVSO_A0119
85                                              // SCU_HS_VSD_BUGFIX_IMPROV_G0163
86#define H_3D_NBDV                         1   // Neighboring block disparity derivation
87                                              // QC_JCT3V-A0097
88                                              // LGE_DVMCP_A0126
89                                              // LGE_DVMCP_MEM_REDUCTION_B0135     
90                                              // QC_SIMPLE_NBDV_B0047
91                                              // FIX_LGE_DVMCP_B0133
92                                              // QC_NBDV_LDB_FIX_C0055
93                                              // MTK_SAIT_TEMPORAL_FIRST_ORDER_C0141_C0097
94                                              // MTK_SIMPLIFY_DVTC_C0135           
95                                              // QC_CU_NBDV_D0181
96                                              // SEC_DEFAULT_DV_D0112
97                                              // MTK_DVMCP_FIX_E0172       fix the mismatch between software and WD for DV derivation from DVMCP blocks, issue 2 in JCT3V-E0172
98                                              // SEC_SIMPLIFIED_NBDV_E0142 Simplified NBDV, JCT3V-E0142 and JCT3V-E0190
99                                              // MTK_NBDV_TN_FIX_E0172     fix the issue of DV derivation from the temporal neighboring blocks, issue 7 in JCT3V-E0172
100                                              // MTK_TEXTURE_MRGCAND_BUGFIX_E0182  Bug fix for TEXTURE MERGING CANDIDATE     , JCT3V-E0182
101#define H_3D_ARP                          1   // Advanced residual prediction (ARP), JCT3V-D0177
102                                              // QC_MTK_INTERVIEW_ARP_F0123_F0108 JCT3V-F0123; JCT3V-F0108
103                                              // SHARP_ARP_REF_CHECK_F0105        ARP reference picture selection and DPB check
104                                              // LGE_ARP_CTX_F0161                JCT3V-F0161
105                                              // MTK_ARP_FLAG_CABAC_SIMP_G0061 Use 2 context for ARP flag referring to only left neighbor block in JCT3V-G0061
106                                              // MTK_ARP_REF_SELECTION_G0053 ARP Reference picture selection in JCT3V-G0053
107
108#define H_3D_IC                           1   // Illumination Compensation, JCT3V-B0045, JCT3V-C0046, JCT3V-D0060
109                                              // Unifying rounding offset, for IC part, JCT3V-D0135
110                                              // Full Pel Interpolation for Depth, HHI_FULL_PEL_DEPTH_MAP_MV_ACC
111                                              // SHARP_ILLUCOMP_REFINE_E0046
112                                              // MTK_CLIPPING_ALIGN_IC_E0168       // To support simplify bi-prediction PU with identical motion checking, JCT3V-E0168
113                                              // LGE_IC_CTX_F0160 //JCT3V-F0160
114                                              // SEC_ONLY_TEXTURE_IC_F0151
115                                              // MTK_IC_FLAG_CABAC_SIMP_G0061
116                                              // SEC_IC_ARP_SIG_G0072, Disabling IC when ARP is enabled, option 1 in JCT3V-G0072, part 2 in JCT3V-G0121
117
118#if H_3D_NBDV
119#define H_3D_NBDV_REF                     1   // Depth oriented neighboring block disparity derivation
120                                              // MTK_D0156
121                                              // MERL_D0166: Reference view selection in NBDV & Bi-VSP
122                                              // MERL_C0152: Basic VSP
123                                              // NBDV_DEFAULT_VIEWIDX_BUGFIX Bug fix for invalid default view index for NBDV
124                                              // NTT_DoNBDV_VECTOR_CLIP_E0141 disparity vector clipping in DoNBDV, JCT3V-E0141 and JCT3V-E0209
125#endif
126
127#define H_3D_VSP                          1   // View synthesis prediction
128                                              // MERL_C0152: Basic VSP
129                                              // MERL_D0166: Reference view selection in NBDV & Bi-VSP
130                                              // MTK_D0105, LG_D0139: No VSP for depth
131                                              // QC_D0191: Clean up
132                                              // LG_D0092: Multiple VSP candidate allowed
133                                              // MTK_VSP_FIX_ALIGN_WD_E0172
134                                              // NTT_VSP_ADAPTIVE_SPLIT_E0207 adaptive sub-PU partitioning in VSP, JCT3V-E0207
135                                              // NTT_VSP_DC_BUGFIX_E0208 bugfix for sub-PU based DC in VSP, JCT3V-E0208
136                                              // NTT_VSP_COMMON_E0207_E0208 common part of JCT3V-E0207 and JCT3V-E0208
137                                              // MTK_F0109_LG_F0120_VSP_BLOCK MTK_LG_SIMPLIFY_VSP_BLOCK_PARTITION_F0109_F0120 
138                                              // SHARP_VSP_BLOCK_IN_AMP_F0102 VSP partitioning for AMP
139                                              // MTK_VSP_SIMPLIFICATION_F0111 1. Inherited VSP also use NBDV of current CU, 2. VSP cannot be inherited from above LCU rowss
140                                              // LGE_SHARP_VSP_INHERIT_F0104
141                                              // NTT_STORE_SPDV_VSP_G0148 Storing Sub-PU based DV for VSP
142                                              // Restricted bi-prediction for VSP
143
144#define H_3D_IV_MERGE                     1   // Inter-view motion merge candidate
145                                              // HHI_INTER_VIEW_MOTION_PRED
146                                              // SAIT_IMPROV_MOTION_PRED_M24829, improved inter-view motion vector prediction
147                                              // QC_MRG_CANS_B0048             , JCT3V-B0048, B0086, B0069
148                                              // OL_DISMV_POS_B0069            , different pos for disparity MV candidate, B0069
149                                              // MTK_INTERVIEW_MERGE_A0049     , second part
150                                              // QC_AMVP_MRG_UNIFY_IVCAN_C0051     
151                                              // TEXTURE MERGING CANDIDATE     , JCT3V-C0137
152                                              // QC_INRIA_MTK_MRG_E0126
153                                              // ETRIKHU_MERGE_REUSE_F0093 QC_DEPTH_IV_MRG_F0125, JCT3V-F0125: Depth oriented Inter-view MV candidate
154                                              // EC_MPI_ENABLING_MERGE_F0150, MPI flag in VPS and enabling in Merge mode
155                                              // MTK_NBDV_IVREF_FIX_G0067      , Disable IvMC, VSP when IVREF is not available, JCT3V-G0067
156                                              // SEC_DEPTH_DV_DERIVAITON_G0074, Simplification of DV derivation for depth, JCT3V-G0074
157                                              // QC_DEPTH_MERGE_SIMP_G0127 Remove DV candidate and shifting candidate for depth coding
158
159#define H_3D_TMVP                         1   // QC_TMVP_C0047
160                                              // Sony_M23639
161
162#define H_3D_DIM                          1   // DIM, Depth intra modes, includes:
163                                              // HHI_DMM_WEDGE_INTRA
164                                              // HHI_DMM_PRED_TEX
165                                              // FIX_WEDGE_NOFLOAT_D0036
166                                              // LGE_EDGE_INTRA_A0070
167                                              // LGE_DMM3_SIMP_C0044
168                                              // QC_DC_PREDICTOR_D0183
169                                              // HHI_DELTADC_DLT_D0035
170                                              // PKU_QC_DEPTH_INTRA_UNI_D0195
171                                              // RWTH_SDC_DLT_B0036
172                                              // INTEL_SDC64_D0193
173                                              // RWTH_SDC_CTX_SIMPL_D0032
174                                              // LGE_CONCATENATE_D0141
175                                              // FIX_SDC_ENC_RD_WVSO_D0163
176                                              // MTK_SAMPLE_BASED_SDC_D0110
177                                              // SEC_DMM2_E0146_HHIFIX Removal of DMM2 from DMMs
178                                              // ZJU_DEPTH_INTRA_MODE_E0204 Simplified Binarization for depth_intra_mode
179                                              // KWU_SDC_SIMPLE_DC_E0117 Simplified DC calculation for SDC
180                                              // SCU_HS_DMM4_REMOVE_DIV_E0242 DMM4 Division Removal
181                                              // LGE_SDC_REMOVE_DC_E0158 Removal of DC mode from SDC
182                                              // LGE_PKU_DMM3_OVERLAP_E0159_HHIFIX 1   Removal of overlap between DMM3 and DMM1
183                                              // LGE_PRED_RES_CODING_DLT_DOMAIN_F0159 JCT3V-F0159
184                                              // HHI_DIM_PREDSAMP_FIX_F0171
185                                              // SEC_DMM3_RBC_F0147 Removal of DMM3 and RBC from DMMs
186                                              // QC_DIM_DELTADC_UNIFY_F0132 Unify delta DC coding in depth intra modes
187                                              // Unify intra SDC and inter SDC
188                                              // QC_GENERIC_SDC_G0122 Generalize SDC to all depth intra modes
189                                              // SCU_HS_DEPTH_DC_PRED_G0143
190                                              // HS_TSINGHUA_SDC_SPLIT_G0111
191                                              // QC_PKU_SDC_SPLIT_G0123 Intra SDC Split
192
193
194
195#define H_3D_INTER_SDC                    1   // INTER SDC, Inter simplified depth coding
196                                              // LGE_INTER_SDC_E0156 Enable inter SDC for depth coding
197                                              // SEC_INTER_SDC_G0101 Improved inter SDC with multiple DC candidates
198
199#define H_3D_SPIVMP                       1   // H_3D_SPIVMP    // JCT3V-F0110: Sub-PU level inter-view motion prediction
200                                              // SEC_SPIVMP_MCP_SIZE_G0077, Apply SPIVMP only to 2Nx2N partition, JCT3V-G0077
201                                              // QC_SPIVMP_MPI_G0119 Sub-PU level MPI merge candidate
202                                              // Simplification on Sub-PU level temporal interview motion prediction
203
204
205#define H_3D_DBBP                         1   // DBBP: Depth-based Block Partitioning and Merging
206
207
208#define H_3D_FCO                          0   // Flexible coding order for 3D
209
210
211
212// OTHERS
213                                              // MTK_SONY_PROGRESSIVE_MV_COMPRESSION_E0170 // Progressive MV Compression, JCT3V-E0170
214#define H_3D_REN_MAX_DEV_OUT              0   // Output maximal possible shift deviation
215#define H_3D_FAST_TEXTURE_ENCODING        1   // Fast merge mode decision and early CU determination for texture component of dependent view, JCT3V-E0173
216                                              // MTK_FAST_TEXTURE_ENCODING_E0173
217#if H_3D_DIM
218#define H_3D_FAST_DEPTH_INTRA             1   // Fast DMM and RBC Mode Selection
219                                              // SCU_HS_FAST_DEPTH_INTRA_E0238_HHIFIX
220#endif
221
222// Rate Control
223#define KWU_FIX_URQ                       1
224#define KWU_RC_VIEWRC_E0227               0  ///< JCT3V-E0227, view-wise target bitrate allocation
225#define KWU_RC_MADPRED_E0227              0  ///< JCT3V-E0227, inter-view MAD prediction
226
227#endif // H_3D
228
229
230
231/////////////////////////////////////////////////////////////////////////////////////////
232///////////////////////////////////   DERIVED DEFINES /////////////////////////////////// 
233/////////////////////////////////////////////////////////////////////////////////////////
234
235///// ***** VIEW SYNTHESIS OPTIMIZAION *********
236#if H_3D_VSO                                 
237#define H_3D_VSO_DIST_INT                 1   // Allow negative synthesized view distortion change
238#define H_3D_VSO_COLOR_PLANES             1   // Compute VSO distortion on color planes
239#define H_3D_VSO_EARLY_SKIP               1   // LGE_VSO_EARLY_SKIP_A0093, A0093 modification 4
240#define H_3D_VSO_RM_ASSERTIONS            0   // Output VSO assertions
241#define H_3D_VSO_SYNTH_DIST_OUT           0   // Output of synthesized view distortion instead of depth distortion in encoder output
242#define H_3D_VSO_FIX                      0   // This fix should be enabled after verification
243#endif
244
245////   ****** NEIGHBOURING BLOCK-BASED DISPARITY VECTOR  *********
246#if H_3D_NBDV
247#define DVFROM_LEFT                       0
248#define DVFROM_ABOVE                      1
249#define IDV_CANDS                         2
250#endif
251
252///// ***** ADVANCED INTERVIEW RESIDUAL PREDICTION *********
253#if H_3D_ARP
254#define H_3D_ARP_WFNR                     3
255#endif
256
257///// ***** DEPTH INTRA MODES *********
258#if H_3D_DIM
259#define H_3D_DIM_DMM                      1   // Depth Modeling Modes
260#define H_3D_DIM_SDC                      1   // Simplified Depth Coding method
261#define H_3D_DIM_DLT                      1   // Depth Lookup Table
262
263#if H_3D_DIM_DLT
264#define H_3D_DELTA_DLT                    1
265#endif
266#define H_3D_DIM_ENC                      1   // Depth Intra encoder optimizations, includes:
267                                              // HHI_DEPTH_INTRA_SEARCH_RAU_C0160
268                                              // LG_ZEROINTRADEPTHRESI_A0087
269#endif
270///// ***** VIEW SYNTHESIS PREDICTION *********
271#if H_3D_VSP
272#define H_3D_VSP_BLOCKSIZE                4   // Supported values: 1, 2, and 4
273#if H_3D_VSP_BLOCKSIZE == 1
274#define H_3D_VSP_CONSTRAINED              1   // Constrained VSP @ 1x1
275#else
276#define H_3D_VSP_CONSTRAINED              0
277#endif
278#endif
279
280
281///// ***** ILLUMATION COMPENSATION *********
282#if H_3D_IC
283#define IC_REG_COST_SHIFT                 7
284#define IC_CONST_SHIFT                    5
285#define IC_SHIFT_DIFF                     12
286#endif
287
288
289///// ***** DEPTH BASED BLOCK PARTITIONING *********
290#if H_3D_DBBP
291#define DBBP_INVALID_SHORT                (-4)
292#define RWTH_DBBP_PACK_MODE               SIZE_2NxN
293#endif
294
295
296///// ***** FCO *********
297#if H_3D_FCO
298#define H_3D_FCO_VSP_DONBDV_E0163               1   // Adaptive depth reference for flexible coding order
299#else
300#define H_3D_FCO_VSP_DONBDV_E0163               0   // Adaptive depth reference for flexible coding order
301#endif
302
303#if H_3D
304#define PPS_FIX_DEPTH                           1
305#endif
306
307
308/////////////////////////////////////////////////////////////////////////////////////////
309///////////////////////////////////   HTM-10.0 Integrations //////////////////////////////
310/////////////////////////////////////////////////////////////////////////////////////////
311#if H_3D
312#if  H_3D_QTLPC
313#define MTK_TEX_DEP_PAR_G0055             1   // Texture-partition-dependent depth partition. JCT3V-G0055
314#endif
315
316#define MTK_DDD_G0063                     1   // Disparity derived depth coding
317#define HTM10RC1_FIX                      1   // Fix of DDD
318#endif
319
320/////////////////////////////////////////////////////////////////////////////////////////
321///////////////////////////////////   HTM-10.1 Integrations //////////////////////////////
322/////////////////////////////////////////////////////////////////////////////////////////
323
324
325// TBD
326// #define H_MV_HLS_7_POC_P0041_3            0 // (POC/P0041/POC reset) #3 It was remarked that we should require each non-IRAP picture that has discardable_flag equal to 1 to have NUT value indicating that it is a sub-layer non-reference picture. This was agreed. Decision: Adopt (with constraint for discardable_flag as described above)
327// #define H_MV_HLS_7_POC_P0041_FIXES        0 // (POC/P0041/Fixes) For each non-IRAP picture that has discardable_flag equal to 1 to have NUT value indicating that it is a sub-layer non-reference picture.
328// #define H_MV_HLS_7_POC_P0056_4            0 // (POC/P0056/layer tree poc) #4 Proposal 1: If the POC reset approach is adopted as the basis for multi-layer POC derivation, it is proposed to derive the POC anchor picture from the previous TID0 picture (that is not a RASL picture, a RADL picture or a sub-layer non-reference picture and not with discardable_flag equal to 1) of  the current layer or any of its reference layer. This is asserted to improve loss resilience and reduce bit rate overhead. Decision: Adopt Proposal 1 (with the suggested modifications – with text provided as P0297).
329
330// #define H_MV_HLS_7_SEI_P0133_28           0 // (SEI/P0133/Recovery point SEI) #28 Decision: Adopt change to recover point semantics only (-v3)
331// #define H_MV_HLS_7_SEI_P0123_25           0 // (SEI/P0123/Alpha channel info) #25 Add alpha channel information SEI message Decision: Adopt. Constrain the bit depth indicated to be equal to the coded bit depth of the aux picture.
332
333// #define H_MV_HLS_7_HRD_P0138_6            0 // (HRD/P0138/HRD parameters for bitstreams excluding) #6 Decision: Adopt (as revised in updated contribution, with the specification of a flag in the BP SEI (HRD/P0192/sub-DPB) #12 Establish sub-DPBs based on the representation format indicated at the VPS level. It was suggested that the expressed shared capacity limit would need to be less than or equal to the sum of the individual capacity limits. Decision: Adopt as modified. Further study is encouraged on profile/level constraint selections.
334// #define H_MV_HLS_7_OTHER_P0187_1          0 // (OTHER/P0187/NoOutputOfPriorPicsFlag) #1 Inference of NoOutputOfPriorPicsFlag and proposes to take into account colour format and bit depth for the inference in addition to spatial resolution
335// #define H_MV_HLS_7_VPS_P0300_27           0 // Output part only. (VPS/P0300/alt output layer flag) #27 Change alt output layer flag to be signalled within the loop of output layer sets, from JCTVC-P0300-v2. Decision: Adopt.
336
337
338#define H_MV_HLS_7_VPS_P0306_22                1 // (VPS/P0306/ue(v) coded syntax elements) #22 Several minor modifications to the VPS syntax, consistent with eliminating the previous intention to avoid ue(v) parsing in the VPS
339#define H_MV_HLS_7_SEI_P0204_26                1 // (SEI/P0204/sub-bitstream SEI) #26 Add sub-bitstream property SEI message. Decision: Adopt
340#define H_MV_HLS_7_MISC_P0130_20               1 // (MISC/P0130/discardable not in inter-layer RPS) #20 Add constraint restricting pictures marked as discardable from being present in the temporal or inter-layer RPS,
341#define H_MV_HLS_7_VPS_P0125_24                1 // (VPS/P0125/VPS extension offset ) #24 Decision: Keep it as a reserved FFFF value.
342#define H_MV_HLS_7_VPS_P0307_23                1 // (VPS/P0307/VPS VUI extension)  #23 Decision: Adopt modification in P0307.
343#define H_MV_HLS_7_POC_P0041                   1 // Syntax related to POC reset
344
345
346#define H_MV_HLS7_GEN                          0  // General changes (not tested)
347#define H_MV_HLS_7_OUTPUT_LAYERS_5_10_22_27    1  // Output layer sets, various
348                                                  // (VPS/P0300/alt output layer flag) #27 Change alt output layer flag to be signalled within the loop of output layer sets, from JCTVC-P0300-v2. Decision: Adopt.
349                                                  // (VPS/P0156/Num of output_layer_flag) #10 Proposal 3: The output_layer_flag[ i ][ j ] is signalled for j equal to 0 to NumLayersInIdList[ lsIdx ] inclusive. It was remarked that we might be able to just assume that the top layer is always output; however, this was not entirely clear , so the safe thing to do may be to also send the flag for this layer.
350                                                  // (VPS/P0295/Default output layer sets) #5 Discussion from (P0110). Decision: Three-state approach (text in P0295, decoder shall allow 3 to be present and shall treat 3 the same as the value 2).
351
352
353#define H_MV_HLS_7_HRD_P0156_7                 1  // (HRD/P0156/MaxSubLayersInLayerSetMinus1) #7 Proposal 1: signal, in the VPS extension, the DPB parameters for an output layer set for sub-DPBs only up to the maximum temporal sub-layers in the corresponding layer set
354#define H_MV_HLS_7_VPS_P0048_14                1  // (VPS/P0048/profile_ref_minus1 rem) #14 Remove profile_ref_minus1 from the VPS extension, from JCTVC-P0048
355#define H_MV_HLS_7_VPS_P0076_15                1  // (VPS/P0076/video signal info move) #15 Move video signal information syntax structure earlier in the VPS VUI.
356#define H_MV_HLS_7_SPS_P0155_16_32             1  // (SPS/P0155/sps_sub_layer_ordering_info) #16, #32 Not signal the sps_max_num_reorder_pics[], sps_max_latency_increase_plus1[], and sps_max_dec_pic_buffering_minus1[] syntax elements in the SPS when nuh_layer_id > 0.
357#define H_MV_HLS_7_GEN_P0166_PPS_EXTENSION     1  // (GEN/P0166/pps_extension) #17 Add PPS extension type flags for conditional presence of syntax extensions per extension type, aligned with the SPS extension type flags, from JCTVC-P0166. Further align the SPS extension type flags syntax between RExt and MV-HEVC/SHVC
358#define H_MV_HLS_7_FIX_SET_DPB_SIZE            1  // Fix derivation dpb size parameters
359#define H_MV_HLS_7_RESERVED_FLAGS              1  // Added flags
360                                                  // (SPS/P0312/SHVC reserved flag) The flag will be used for the syntax vert_phase_position_enable_flag in SHVC draft
361                                                  // (VPS/O0215/SHVC reserved flag): this flag will be used for the syntax cross_layer_phase_alignment_flag in SHVC draft.
362                                                  // (VPS VUI/O0199,P0312/SHVC reserved flags) the 3 reserved bits will be used for the syntaxes single_layer_for_non_irap_flag, higher_layer_irap_skip_flag and vert_phase_position_not_in_use_flag in SHVC draft.
363#define H_MV_FIX_VPS_LAYER_ID_NOT_EQUAL_ZERO   1  // Discard VPS with nuh_layer_Id > 0
364#define H_MV_HLS_7_MISC_P0130_EOS              1  // (MISC/P0130/EOS NAL layer id) #19 Require that end of bitstream NAL unit shall have nuh_layer_id equal to 0, from JCTVC-P0130. Decoders shall allow an end of bitstream NAL unit with nuh_layer_id > 0 to be present, and shall ignore the NAL unit.
365#define H_MV_HLS_7_MISC_P0182_13               1  // (MISC/P0182/BL PS Compatibility flag) #13 Define the flag (in VPS VUI) with the proposed semantics, without specifying an associated extraction process. Editors to select the position in the VPS VUI.
366#define H_MV_HLS_7_MISC_P0068_21               1  // (MISC/P0068/all irap idr flag) #21 Add flag in VUI to indicate that all IRAP pictures are IDRs and that all layer pictures in an AU are IDR aligned, from JCTVC-P0068 proposal 1.
367#define H_MV_HLS_7_FIX_INFER_CROSS_LAYER_IRAP_ALIGNED_FLAG               1  // Fix inference of cross_layer_irap_aligned_flag
368#define H_MV_HLS_7_MISC_P0079_18               1  // (MISC/P0079/NumActiveRefLayerPics) #18 Modification of derivation of variable NumActiveRefLayerPics.
369#define FIX_CAM_PARS_COLLECTOR                 1
370#define UPDATE_HM13                            1  // Only some parts in H_3D parts are marked!
371#if H_3D
372#define H_3D_FIX_G0148_BRACE                   1
373#endif
374/////////////////////////////////////////////////////////////////////////////////////////
375///////////////////////////////////   HM RELATED DEFINES ////////////////////////////////
376/////////////////////////////////////////////////////////////////////////////////////////
377#define BUGFIX_INTRAPERIOD 1
378#define SAO_ENCODE_ALLOW_USE_PREDEBLOCK 1
379
380#define FIX1172 1 ///< fix ticket #1172
381
382#define MAX_NUM_PICS_IN_SOP           1024
383
384#define MAX_NESTING_NUM_OPS         1024
385#define MAX_NESTING_NUM_LAYER       64
386
387#define MAX_VPS_NUM_HRD_PARAMETERS                1
388#define MAX_VPS_OP_SETS_PLUS1                     1024
389#if H_MV
390#define MAX_VPS_NUH_LAYER_ID_PLUS1  63
391#define MAX_NUM_SCALABILITY_TYPES   16
392#define ENC_CFG_CONSOUT_SPACE       29           
393#else
394#define MAX_VPS_NUH_RESERVED_ZERO_LAYER_ID_PLUS1  1
395#endif
396
397
398#define MAX_CPB_CNT                     32  ///< Upper bound of (cpb_cnt_minus1 + 1)
399#if H_MV
400#define MAX_NUM_LAYER_IDS               63
401#define MAX_NUM_LAYERS                  63
402#define MAX_VPS_PROFILE_TIER_LEVEL      64
403#define MAX_VPS_ADD_OUTPUT_LAYER_SETS   1024
404#define MAX_VPS_OUTPUTLAYER_SETS        ( MAX_VPS_ADD_OUTPUT_LAYER_SETS + MAX_VPS_OP_SETS_PLUS1 )
405#define  MAX_NUM_VIDEO_SIGNAL_INFO      16
406#define MAX_NUM_SCALED_REF_LAYERS       MAX_NUM_LAYERS-1
407#define MAX_NUM_BSP_HRD_PARAMETERS      100 ///< Maximum value is actually not specified
408#define MAX_NUM_BITSTREAM_PARTITIONS    100 ///< Maximum value is actually not specified
409#define MAX_NUM_BSP_SCHED_COMBINATION   100 ///< Maximum value is actually not specified
410#if H_MV_HLS_7_SEI_P0204_26
411#define MAX_SUB_STREAMS                 1024
412#endif
413#else
414#define MAX_NUM_LAYER_IDS                64
415#endif
416
417#define COEF_REMAIN_BIN_REDUCTION        3 ///< indicates the level at which the VLC
418                                           ///< transitions from Golomb-Rice to TU+EG(k)
419
420#define CU_DQP_TU_CMAX 5                   ///< max number bins for truncated unary
421#define CU_DQP_EG_k 0                      ///< expgolomb order
422
423#define SBH_THRESHOLD                    4  ///< I0156: value of the fixed SBH controlling threshold
424 
425#define SEQUENCE_LEVEL_LOSSLESS           0  ///< H0530: used only for sequence or frame-level lossless coding
426
427#define DISABLING_CLIP_FOR_BIPREDME         1  ///< Ticket #175
428 
429#define C1FLAG_NUMBER               8 // maximum number of largerThan1 flag coded in one chunk :  16 in HM5
430#define C2FLAG_NUMBER               1 // maximum number of largerThan2 flag coded in one chunk:  16 in HM5
431#define SAO_ENCODING_CHOICE              1  ///< I0184: picture early termination
432#if SAO_ENCODING_CHOICE
433#define SAO_ENCODING_RATE                0.75
434#define SAO_ENCODING_CHOICE_CHROMA       1 ///< J0044: picture early termination Luma and Chroma are handled separately
435#if SAO_ENCODING_CHOICE_CHROMA
436#define SAO_ENCODING_RATE_CHROMA         0.5
437#endif
438#endif
439
440#define MAX_NUM_VPS                16
441#define MAX_NUM_SPS                16
442#define MAX_NUM_PPS                64
443
444#define RDOQ_CHROMA_LAMBDA          1   ///< F386: weighting of chroma for RDOQ
445
446#define MIN_SCAN_POS_CROSS          4
447
448#define FAST_BIT_EST                1   ///< G763: Table-based bit estimation for CABAC
449
450#define MLS_GRP_NUM                         64     ///< G644 : Max number of coefficient groups, max(16, 64)
451#define MLS_CG_SIZE                         4      ///< G644 : Coefficient group size of 4x4
452
453#define ADAPTIVE_QP_SELECTION               1      ///< G382: Adaptive reconstruction levels, non-normative part for adaptive QP selection
454#if ADAPTIVE_QP_SELECTION
455#define ARL_C_PRECISION                     7      ///< G382: 7-bit arithmetic precision
456#define LEVEL_RANGE                         30     ///< G382: max coefficient level in statistics collection
457#endif
458
459#define HHI_RQT_INTRA_SPEEDUP             1           ///< tests one best mode with full rqt
460#define HHI_RQT_INTRA_SPEEDUP_MOD         0           ///< tests two best modes with full rqt
461
462#if HHI_RQT_INTRA_SPEEDUP_MOD && !HHI_RQT_INTRA_SPEEDUP
463#error
464#endif
465
466#define VERBOSE_RATE 0 ///< Print additional rate information in encoder
467
468#define AMVP_DECIMATION_FACTOR            4
469
470#define SCAN_SET_SIZE                     16
471#define LOG2_SCAN_SET_SIZE                4
472
473#define FAST_UDI_MAX_RDMODE_NUM               35          ///< maximum number of RD comparison in fast-UDI estimation loop
474
475#define ZERO_MVD_EST                          0           ///< Zero Mvd Estimation in normal mode
476
477#define NUM_INTRA_MODE 36
478#if !REMOVE_LM_CHROMA
479#define LM_CHROMA_IDX  35
480#endif
481
482#define WRITE_BACK                      1           ///< Enable/disable the encoder to replace the deltaPOC and Used by current from the config file with the values derived by the refIdc parameter.
483#define AUTO_INTER_RPS                  1           ///< Enable/disable the automatic generation of refIdc from the deltaPOC and Used by current from the config file.
484#define PRINT_RPS_INFO                  0           ///< Enable/disable the printing of bits used to send the RPS.
485                                                    // using one nearest frame as reference frame, and the other frames are high quality (POC%4==0) frames (1+X)
486                                                    // this should be done with encoder only decision
487                                                    // but because of the absence of reference frame management, the related code was hard coded currently
488
489#define RVM_VCEGAM10_M 4
490
491#define PLANAR_IDX             0
492#define VER_IDX                26                    // index for intra VERTICAL   mode
493#define HOR_IDX                10                    // index for intra HORIZONTAL mode
494#define DC_IDX                 1                     // index for intra DC mode
495#define NUM_CHROMA_MODE        5                     // total number of chroma modes
496#define DM_CHROMA_IDX          36                    // chroma mode index for derived from luma intra mode
497
498
499#define FAST_UDI_USE_MPM 1
500
501#define RDO_WITHOUT_DQP_BITS              0           ///< Disable counting dQP bits in RDO-based mode decision
502
503#define FULL_NBIT 0 ///< When enabled, compute costs using full sample bitdepth.  When disabled, compute costs as if it is 8-bit source video.
504#if FULL_NBIT
505# define DISTORTION_PRECISION_ADJUSTMENT(x) 0
506#else
507# define DISTORTION_PRECISION_ADJUSTMENT(x) (x)
508#endif
509
510#define LOG2_MAX_NUM_COLUMNS_MINUS1        7
511#define LOG2_MAX_NUM_ROWS_MINUS1           7
512#define LOG2_MAX_COLUMN_WIDTH              13
513#define LOG2_MAX_ROW_HEIGHT                13
514
515#define MATRIX_MULT                             0   // Brute force matrix multiplication instead of partial butterfly
516
517#define REG_DCT 65535
518
519#define AMP_SAD                               1           ///< dedicated SAD functions for AMP
520#define AMP_ENC_SPEEDUP                       1           ///< encoder only speed-up by AMP mode skipping
521#if AMP_ENC_SPEEDUP
522#define AMP_MRG                               1           ///< encoder only force merge for AMP partition (no motion search for AMP)
523#endif
524
525#define CABAC_INIT_PRESENT_FLAG     1
526
527// ====================================================================================================================
528// Basic type redefinition
529// ====================================================================================================================
530
531typedef       void                Void;
532typedef       bool                Bool;
533
534#ifdef __arm__
535typedef       signed char         Char;
536#else
537typedef       char                Char;
538#endif
539typedef       unsigned char       UChar;
540typedef       short               Short;
541typedef       unsigned short      UShort;
542typedef       int                 Int;
543typedef       unsigned int        UInt;
544typedef       double              Double;
545typedef       float               Float;
546
547// ====================================================================================================================
548// 64-bit integer type
549// ====================================================================================================================
550
551#ifdef _MSC_VER
552typedef       __int64             Int64;
553
554#if _MSC_VER <= 1200 // MS VC6
555typedef       __int64             UInt64;   // MS VC6 does not support unsigned __int64 to double conversion
556#else
557typedef       unsigned __int64    UInt64;
558#endif
559
560#else
561
562typedef       long long           Int64;
563typedef       unsigned long long  UInt64;
564
565#endif
566
567// ====================================================================================================================
568// Type definition
569// ====================================================================================================================
570
571typedef       UChar           Pxl;        ///< 8-bit pixel type
572typedef       Short           Pel;        ///< 16-bit pixel type
573typedef       Int             TCoeff;     ///< transform coefficient
574
575#if H_3D_VSO
576// ====================================================================================================================
577// Define Distortion Types
578// ====================================================================================================================
579typedef       Int64           RMDist;     ///< renderer model distortion
580
581#if H_3D_VSO_DIST_INT
582typedef       Int64            Dist;       ///< RDO distortion
583typedef       Int64            Dist64; 
584#define       RDO_DIST_MIN     MIN_INT
585#define       RDO_DIST_MAX     MAX_INT
586#else
587typedef       UInt             Dist;       ///< RDO distortion
588typedef       UInt64           Dist; 
589#define       RDO_DIST_MIN     0
590#define       RDO_DIST_MAX     MAX_UINT
591#endif
592#endif
593/// parameters for adaptive loop filter
594class TComPicSym;
595
596// Slice / Slice segment encoding modes
597enum SliceConstraint
598{
599  NO_SLICES              = 0,          ///< don't use slices / slice segments
600  FIXED_NUMBER_OF_LCU    = 1,          ///< Limit maximum number of largest coding tree blocks in a slice / slice segments
601  FIXED_NUMBER_OF_BYTES  = 2,          ///< Limit maximum number of bytes in a slice / slice segment
602  FIXED_NUMBER_OF_TILES  = 3,          ///< slices / slice segments span an integer number of tiles
603};
604
605enum SAOComponentIdx
606{
607  SAO_Y =0,
608  SAO_Cb,
609  SAO_Cr,
610  NUM_SAO_COMPONENTS
611};
612
613enum SAOMode //mode
614{
615  SAO_MODE_OFF = 0,
616  SAO_MODE_NEW,
617  SAO_MODE_MERGE,
618  NUM_SAO_MODES
619};
620
621enum SAOModeMergeTypes
622{
623  SAO_MERGE_LEFT =0,
624  SAO_MERGE_ABOVE,
625  NUM_SAO_MERGE_TYPES
626};
627
628
629enum SAOModeNewTypes
630{
631  SAO_TYPE_START_EO =0,
632  SAO_TYPE_EO_0 = SAO_TYPE_START_EO,
633  SAO_TYPE_EO_90,
634  SAO_TYPE_EO_135,
635  SAO_TYPE_EO_45,
636
637  SAO_TYPE_START_BO,
638  SAO_TYPE_BO = SAO_TYPE_START_BO,
639
640  NUM_SAO_NEW_TYPES
641};
642#define NUM_SAO_EO_TYPES_LOG2 2
643
644enum SAOEOClasses
645{
646  SAO_CLASS_EO_FULL_VALLEY = 0,
647  SAO_CLASS_EO_HALF_VALLEY = 1,
648  SAO_CLASS_EO_PLAIN       = 2,
649  SAO_CLASS_EO_HALF_PEAK   = 3,
650  SAO_CLASS_EO_FULL_PEAK   = 4,
651  NUM_SAO_EO_CLASSES,
652};
653
654
655#define NUM_SAO_BO_CLASSES_LOG2  5
656enum SAOBOClasses
657{
658  //SAO_CLASS_BO_BAND0 = 0,
659  //SAO_CLASS_BO_BAND1,
660  //SAO_CLASS_BO_BAND2,
661  //...
662  //SAO_CLASS_BO_BAND31,
663
664  NUM_SAO_BO_CLASSES = (1<<NUM_SAO_BO_CLASSES_LOG2),
665};
666#define MAX_NUM_SAO_CLASSES  32  //(NUM_SAO_EO_GROUPS > NUM_SAO_BO_GROUPS)?NUM_SAO_EO_GROUPS:NUM_SAO_BO_GROUPS
667
668struct SAOOffset
669{
670  Int modeIdc; //NEW, MERGE, OFF
671  Int typeIdc; //NEW: EO_0, EO_90, EO_135, EO_45, BO. MERGE: left, above
672  Int typeAuxInfo; //BO: starting band index
673  Int offset[MAX_NUM_SAO_CLASSES];
674
675  SAOOffset();
676  ~SAOOffset();
677  Void reset();
678
679  const SAOOffset& operator= (const SAOOffset& src);
680};
681
682struct SAOBlkParam
683{
684
685  SAOBlkParam();
686  ~SAOBlkParam();
687  Void reset();
688  const SAOBlkParam& operator= (const SAOBlkParam& src);
689  SAOOffset& operator[](Int compIdx){ return offsetParam[compIdx];}
690private:
691  SAOOffset offsetParam[NUM_SAO_COMPONENTS];
692
693};
694
695/// parameters for deblocking filter
696typedef struct _LFCUParam
697{
698  Bool bInternalEdge;                     ///< indicates internal edge
699  Bool bLeftEdge;                         ///< indicates left edge
700  Bool bTopEdge;                          ///< indicates top edge
701} LFCUParam;
702
703// ====================================================================================================================
704// Enumeration
705// ====================================================================================================================
706
707/// supported slice type
708enum SliceType
709{
710  B_SLICE,
711  P_SLICE,
712  I_SLICE
713};
714
715/// chroma formats (according to semantics of chroma_format_idc)
716enum ChromaFormat
717{
718  CHROMA_400  = 0,
719  CHROMA_420  = 1,
720  CHROMA_422  = 2,
721  CHROMA_444  = 3
722};
723
724/// supported partition shape
725enum PartSize
726{
727  SIZE_2Nx2N,           ///< symmetric motion partition,  2Nx2N
728  SIZE_2NxN,            ///< symmetric motion partition,  2Nx N
729  SIZE_Nx2N,            ///< symmetric motion partition,   Nx2N
730  SIZE_NxN,             ///< symmetric motion partition,   Nx N
731  SIZE_2NxnU,           ///< asymmetric motion partition, 2Nx( N/2) + 2Nx(3N/2)
732  SIZE_2NxnD,           ///< asymmetric motion partition, 2Nx(3N/2) + 2Nx( N/2)
733  SIZE_nLx2N,           ///< asymmetric motion partition, ( N/2)x2N + (3N/2)x2N
734  SIZE_nRx2N,           ///< asymmetric motion partition, (3N/2)x2N + ( N/2)x2N
735  SIZE_NONE = 15
736};
737
738/// supported prediction type
739enum PredMode
740{
741  MODE_INTER,           ///< inter-prediction mode
742  MODE_INTRA,           ///< intra-prediction mode
743  MODE_NONE = 15
744};
745
746/// texture component type
747enum TextType
748{
749  TEXT_LUMA,            ///< luma
750  TEXT_CHROMA,          ///< chroma (U+V)
751  TEXT_CHROMA_U,        ///< chroma U
752  TEXT_CHROMA_V,        ///< chroma V
753  TEXT_ALL,             ///< Y+U+V
754  TEXT_NONE = 15
755};
756
757/// reference list index
758enum RefPicList
759{
760  REF_PIC_LIST_0 = 0,   ///< reference list 0
761  REF_PIC_LIST_1 = 1,   ///< reference list 1
762  REF_PIC_LIST_X = 100  ///< special mark
763};
764
765/// distortion function index
766enum DFunc
767{
768  DF_DEFAULT  = 0,
769  DF_SSE      = 1,      ///< general size SSE
770  DF_SSE4     = 2,      ///<   4xM SSE
771  DF_SSE8     = 3,      ///<   8xM SSE
772  DF_SSE16    = 4,      ///<  16xM SSE
773  DF_SSE32    = 5,      ///<  32xM SSE
774  DF_SSE64    = 6,      ///<  64xM SSE
775  DF_SSE16N   = 7,      ///< 16NxM SSE
776 
777  DF_SAD      = 8,      ///< general size SAD
778  DF_SAD4     = 9,      ///<   4xM SAD
779  DF_SAD8     = 10,     ///<   8xM SAD
780  DF_SAD16    = 11,     ///<  16xM SAD
781  DF_SAD32    = 12,     ///<  32xM SAD
782  DF_SAD64    = 13,     ///<  64xM SAD
783  DF_SAD16N   = 14,     ///< 16NxM SAD
784 
785  DF_SADS     = 15,     ///< general size SAD with step
786  DF_SADS4    = 16,     ///<   4xM SAD with step
787  DF_SADS8    = 17,     ///<   8xM SAD with step
788  DF_SADS16   = 18,     ///<  16xM SAD with step
789  DF_SADS32   = 19,     ///<  32xM SAD with step
790  DF_SADS64   = 20,     ///<  64xM SAD with step
791  DF_SADS16N  = 21,     ///< 16NxM SAD with step
792 
793  DF_HADS     = 22,     ///< general size Hadamard with step
794  DF_HADS4    = 23,     ///<   4xM HAD with step
795  DF_HADS8    = 24,     ///<   8xM HAD with step
796  DF_HADS16   = 25,     ///<  16xM HAD with step
797  DF_HADS32   = 26,     ///<  32xM HAD with step
798  DF_HADS64   = 27,     ///<  64xM HAD with step
799  DF_HADS16N  = 28,     ///< 16NxM HAD with step
800#if H_3D_VSO
801  DF_VSD      = 29,      ///< general size VSD
802  DF_VSD4     = 30,      ///<   4xM VSD
803  DF_VSD8     = 31,      ///<   8xM VSD
804  DF_VSD16    = 32,      ///<  16xM VSD
805  DF_VSD32    = 33,      ///<  32xM VSD
806  DF_VSD64    = 34,      ///<  64xM VSD
807  DF_VSD16N   = 35,      ///< 16NxM VSD
808#endif
809
810#if AMP_SAD
811  DF_SAD12    = 43,
812  DF_SAD24    = 44,
813  DF_SAD48    = 45,
814
815  DF_SADS12   = 46,
816  DF_SADS24   = 47,
817  DF_SADS48   = 48,
818
819  DF_SSE_FRAME = 50     ///< Frame-based SSE
820#else
821  DF_SSE_FRAME = 33     ///< Frame-based SSE
822#endif
823};
824
825/// index for SBAC based RD optimization
826enum CI_IDX
827{
828  CI_CURR_BEST = 0,     ///< best mode index
829  CI_NEXT_BEST,         ///< next best index
830  CI_TEMP_BEST,         ///< temporal index
831  CI_CHROMA_INTRA,      ///< chroma intra index
832  CI_QT_TRAFO_TEST,
833  CI_QT_TRAFO_ROOT,
834  CI_NUM,               ///< total number
835};
836
837/// motion vector predictor direction used in AMVP
838enum MVP_DIR
839{
840  MD_LEFT = 0,          ///< MVP of left block
841  MD_ABOVE,             ///< MVP of above block
842  MD_ABOVE_RIGHT,       ///< MVP of above right block
843  MD_BELOW_LEFT,        ///< MVP of below left block
844  MD_ABOVE_LEFT         ///< MVP of above left block
845};
846
847/// coefficient scanning type used in ACS
848enum COEFF_SCAN_TYPE
849{
850  SCAN_DIAG = 0,         ///< up-right diagonal scan
851  SCAN_HOR,              ///< horizontal first scan
852  SCAN_VER               ///< vertical first scan
853};
854
855namespace Profile
856{
857  enum Name
858  {
859    NONE = 0,
860    MAIN = 1,
861    MAIN10 = 2,
862    MAINSTILLPICTURE = 3,
863#if H_MV
864    MAINSTEREO = 4,
865    MAINMULTIVIEW = 5,
866#if H_3D
867    MAIN3D = 6, 
868#endif
869#endif
870  };
871}
872
873namespace Level
874{
875  enum Tier
876  {
877    MAIN = 0,
878    HIGH = 1,
879  };
880
881  enum Name
882  {
883    NONE     = 0,
884    LEVEL1   = 30,
885    LEVEL2   = 60,
886    LEVEL2_1 = 63,
887    LEVEL3   = 90,
888    LEVEL3_1 = 93,
889    LEVEL4   = 120,
890    LEVEL4_1 = 123,
891    LEVEL5   = 150,
892    LEVEL5_1 = 153,
893    LEVEL5_2 = 156,
894    LEVEL6   = 180,
895    LEVEL6_1 = 183,
896    LEVEL6_2 = 186,
897  };
898}
899//! \}
900
901#if H_MV
902
903#if H_MV_HLS_7_GEN_P0166_PPS_EXTENSION
904enum PpsExtensionTypes
905{
906  PPS_EX_T_MV      = 0,
907#if H_3D
908  PPS_EX_T_3D      = 3,
909#endif
910  PPS_EX_T_ESC     = 7,
911  PPS_EX_T_MAX_NUM = 8
912};
913
914//Below for sps, would be good if this could be aligned
915#endif
916
917  enum PsExtensionTypes
918  {
919    PS_EX_T_MV   = 1,
920#if H_3D
921    PS_EX_T_3D   = 3,
922#endif
923    PS_EX_T_ESC  = 7,
924    PS_EX_T_MAX_NUM = 8
925  };
926
927/// scalability types
928  enum ScalabilityType
929  {
930#if H_3D
931    DEPTH_ID = 0,   
932#endif   
933    VIEW_ORDER_INDEX  = 1,
934  };
935#endif
936#if H_3D
937  // Renderer
938  enum BlenMod
939  {
940    BLEND_NONE  = -1,
941    BLEND_AVRG  = 0,
942    BLEND_LEFT  = 1,
943    BLEND_RIGHT = 2,
944    BLEND_GEN   =  3
945  };
946
947 
948  enum
949  {
950    VIEWPOS_INVALID = -1,
951    VIEWPOS_LEFT    = 0,
952    VIEWPOS_RIGHT   = 1,
953    VIEWPOS_MERGED  = 2
954  };
955
956#define Log2( n ) ( log((double)n) / log(2.0) ) // Ed.(GT): This is very very bad and should be fixed to used integer arithmetics ( see gCeilLog2 ) moreover it should not be defined in the tool macro section!
957#endif
958#endif
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