source: 3DVCSoftware/branches/HTM-10.1-dev0/source/Lib/TLibCommon/TypeDef.h @ 879

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Cleanups part 4.

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33
34/** \file     TypeDef.h
35    \brief    Define basic types, new types and enumerations
36*/
37
38#ifndef _TYPEDEF__
39#define _TYPEDEF__
40
41//! \ingroup TLibCommon
42//! \{
43/////////////////////////////////////////////////////////////////////////////////////////
44///////////////////////////////// EXTENSION SELECTION /////////////////////////////////// 
45/////////////////////////////////////////////////////////////////////////////////////////
46
47/* HEVC_EXT might be defined by compiler/makefile options.
48   
49   Linux makefiles support the following settings:   
50   make             -> HEVC_EXT not defined   
51   make HEVC_EXT=0  -> H_MV=0 H_3D=0   --> plain HM
52   make HEVC_EXT=1  -> H_MV=1 H_3D=0   --> MV only
53   make HEVC_EXT=2  -> H_MV=1 H_3D=1   --> full 3D
54*/
55
56#ifndef HEVC_EXT
57#define HEVC_EXT                    2
58#endif
59
60#if ( HEVC_EXT < 0 )||( HEVC_EXT > 2 )
61#error HEVC_EXT must be in the range of 0 to 2, inclusive.
62#endif
63
64#define H_MV          ( HEVC_EXT != 0)
65#define H_3D          ( HEVC_EXT == 2)
66
67
68/////////////////////////////////////////////////////////////////////////////////////////
69///////////////////////////////////   MAJOR DEFINES   /////////////////////////////////// 
70/////////////////////////////////////////////////////////////////////////////////////////
71
72#if H_MV
73#define H_MV_ENC_DEC_TRAC                 1  //< CU/PU level tracking
74#endif
75
76#if H_3D
77#define H_3D_QTLPC                        1   // OL_QTLIMIT_PREDCODING_B0068 //JCT3V-B0068
78                                              // HHI_QTLPC_RAU_OFF_C0160     // JCT3V-C0160 change 2: quadtree limitation and predictive coding switched off in random access units
79
80#define H_3D_VSO                          1   // VSO, View synthesis optimization, includes:
81                                              // HHI_VSO
82                                              // HHI_VSO_LS_TABLE_M23714 enable table base Lagrange multiplier optimization
83                                              // SAIT_VSO_EST_A0033, JCT3V-A0033 modification 3
84                                              // LGE_WVSO_A0119
85                                              // SCU_HS_VSD_BUGFIX_IMPROV_G0163
86#define H_3D_NBDV                         1   // Neighboring block disparity derivation
87                                              // QC_JCT3V-A0097
88                                              // LGE_DVMCP_A0126
89                                              // LGE_DVMCP_MEM_REDUCTION_B0135     
90                                              // QC_SIMPLE_NBDV_B0047
91                                              // FIX_LGE_DVMCP_B0133
92                                              // QC_NBDV_LDB_FIX_C0055
93                                              // MTK_SAIT_TEMPORAL_FIRST_ORDER_C0141_C0097
94                                              // MTK_SIMPLIFY_DVTC_C0135           
95                                              // QC_CU_NBDV_D0181
96                                              // SEC_DEFAULT_DV_D0112
97                                              // MTK_DVMCP_FIX_E0172       fix the mismatch between software and WD for DV derivation from DVMCP blocks, issue 2 in JCT3V-E0172
98                                              // SEC_SIMPLIFIED_NBDV_E0142 Simplified NBDV, JCT3V-E0142 and JCT3V-E0190
99                                              // MTK_NBDV_TN_FIX_E0172     fix the issue of DV derivation from the temporal neighboring blocks, issue 7 in JCT3V-E0172
100                                              // MTK_TEXTURE_MRGCAND_BUGFIX_E0182  Bug fix for TEXTURE MERGING CANDIDATE     , JCT3V-E0182
101#define H_3D_ARP                          1   // Advanced residual prediction (ARP), JCT3V-D0177
102                                              // QC_MTK_INTERVIEW_ARP_F0123_F0108 JCT3V-F0123; JCT3V-F0108
103                                              // SHARP_ARP_REF_CHECK_F0105        ARP reference picture selection and DPB check
104                                              // LGE_ARP_CTX_F0161                JCT3V-F0161
105                                              // MTK_ARP_FLAG_CABAC_SIMP_G0061 Use 2 context for ARP flag referring to only left neighbor block in JCT3V-G0061
106                                              // MTK_ARP_REF_SELECTION_G0053 ARP Reference picture selection in JCT3V-G0053
107
108#define H_3D_IC                           1   // Illumination Compensation, JCT3V-B0045, JCT3V-C0046, JCT3V-D0060
109                                              // Unifying rounding offset, for IC part, JCT3V-D0135
110                                              // Full Pel Interpolation for Depth, HHI_FULL_PEL_DEPTH_MAP_MV_ACC
111                                              // SHARP_ILLUCOMP_REFINE_E0046
112                                              // MTK_CLIPPING_ALIGN_IC_E0168       // To support simplify bi-prediction PU with identical motion checking, JCT3V-E0168
113                                              // LGE_IC_CTX_F0160 //JCT3V-F0160
114                                              // SEC_ONLY_TEXTURE_IC_F0151
115                                              // MTK_IC_FLAG_CABAC_SIMP_G0061
116                                              // SEC_IC_ARP_SIG_G0072, Disabling IC when ARP is enabled, option 1 in JCT3V-G0072, part 2 in JCT3V-G0121
117
118#if H_3D_NBDV
119#define H_3D_NBDV_REF                     1   // Depth oriented neighboring block disparity derivation
120                                              // MTK_D0156
121                                              // MERL_D0166: Reference view selection in NBDV & Bi-VSP
122                                              // MERL_C0152: Basic VSP
123                                              // NBDV_DEFAULT_VIEWIDX_BUGFIX Bug fix for invalid default view index for NBDV
124                                              // NTT_DoNBDV_VECTOR_CLIP_E0141 disparity vector clipping in DoNBDV, JCT3V-E0141 and JCT3V-E0209
125#endif
126
127#define H_3D_VSP                          1   // View synthesis prediction
128                                              // MERL_C0152: Basic VSP
129                                              // MERL_D0166: Reference view selection in NBDV & Bi-VSP
130                                              // MTK_D0105, LG_D0139: No VSP for depth
131                                              // QC_D0191: Clean up
132                                              // LG_D0092: Multiple VSP candidate allowed
133                                              // MTK_VSP_FIX_ALIGN_WD_E0172
134                                              // NTT_VSP_ADAPTIVE_SPLIT_E0207 adaptive sub-PU partitioning in VSP, JCT3V-E0207
135                                              // NTT_VSP_DC_BUGFIX_E0208 bugfix for sub-PU based DC in VSP, JCT3V-E0208
136                                              // NTT_VSP_COMMON_E0207_E0208 common part of JCT3V-E0207 and JCT3V-E0208
137                                              // MTK_F0109_LG_F0120_VSP_BLOCK MTK_LG_SIMPLIFY_VSP_BLOCK_PARTITION_F0109_F0120 
138                                              // SHARP_VSP_BLOCK_IN_AMP_F0102 VSP partitioning for AMP
139                                              // MTK_VSP_SIMPLIFICATION_F0111 1. Inherited VSP also use NBDV of current CU, 2. VSP cannot be inherited from above LCU rowss
140                                              // LGE_SHARP_VSP_INHERIT_F0104
141
142#define H_3D_IV_MERGE                     1   // Inter-view motion merge candidate
143                                              // HHI_INTER_VIEW_MOTION_PRED
144                                              // SAIT_IMPROV_MOTION_PRED_M24829, improved inter-view motion vector prediction
145                                              // QC_MRG_CANS_B0048             , JCT3V-B0048, B0086, B0069
146                                              // OL_DISMV_POS_B0069            , different pos for disparity MV candidate, B0069
147                                              // MTK_INTERVIEW_MERGE_A0049     , second part
148                                              // QC_AMVP_MRG_UNIFY_IVCAN_C0051     
149                                              // TEXTURE MERGING CANDIDATE     , JCT3V-C0137
150                                              // QC_INRIA_MTK_MRG_E0126
151                                              // ETRIKHU_MERGE_REUSE_F0093 QC_DEPTH_IV_MRG_F0125, JCT3V-F0125: Depth oriented Inter-view MV candidate
152                                              // EC_MPI_ENABLING_MERGE_F0150, MPI flag in VPS and enabling in Merge mode
153                                              // MTK_NBDV_IVREF_FIX_G0067      , Disable IvMC, VSP when IVREF is not available, JCT3V-G0067
154                                              // SEC_DEPTH_DV_DERIVAITON_G0074, Simplification of DV derivation for depth, JCT3V-G0074
155                                              // QC_DEPTH_MERGE_SIMP_G0127 Remove DV candidate and shifting candidate for depth coding
156
157#define H_3D_TMVP                         1   // QC_TMVP_C0047
158                                              // Sony_M23639
159
160#define H_3D_DIM                          1   // DIM, Depth intra modes, includes:
161                                              // HHI_DMM_WEDGE_INTRA
162                                              // HHI_DMM_PRED_TEX
163                                              // FIX_WEDGE_NOFLOAT_D0036
164                                              // LGE_EDGE_INTRA_A0070
165                                              // LGE_DMM3_SIMP_C0044
166                                              // QC_DC_PREDICTOR_D0183
167                                              // HHI_DELTADC_DLT_D0035
168                                              // PKU_QC_DEPTH_INTRA_UNI_D0195
169                                              // RWTH_SDC_DLT_B0036
170                                              // INTEL_SDC64_D0193
171                                              // RWTH_SDC_CTX_SIMPL_D0032
172                                              // LGE_CONCATENATE_D0141
173                                              // FIX_SDC_ENC_RD_WVSO_D0163
174                                              // MTK_SAMPLE_BASED_SDC_D0110
175                                              // SEC_DMM2_E0146_HHIFIX Removal of DMM2 from DMMs
176                                              // ZJU_DEPTH_INTRA_MODE_E0204 Simplified Binarization for depth_intra_mode
177                                              // KWU_SDC_SIMPLE_DC_E0117 Simplified DC calculation for SDC
178                                              // SCU_HS_DMM4_REMOVE_DIV_E0242 DMM4 Division Removal
179                                              // LGE_SDC_REMOVE_DC_E0158 Removal of DC mode from SDC
180                                              // LGE_PKU_DMM3_OVERLAP_E0159_HHIFIX 1   Removal of overlap between DMM3 and DMM1
181                                              // LGE_PRED_RES_CODING_DLT_DOMAIN_F0159 JCT3V-F0159
182                                              // HHI_DIM_PREDSAMP_FIX_F0171
183                                              // SEC_DMM3_RBC_F0147 Removal of DMM3 and RBC from DMMs
184                                              // QC_DIM_DELTADC_UNIFY_F0132 Unify delta DC coding in depth intra modes
185                                              // Unify intra SDC and inter SDC
186                                              // QC_GENERIC_SDC_G0122 Generalize SDC to all depth intra modes
187                                              // SCU_HS_DEPTH_DC_PRED_G0143
188                                              // HS_TSINGHUA_SDC_SPLIT_G0111
189                                              // QC_PKU_SDC_SPLIT_G0123 Intra SDC Split
190
191
192
193#define H_3D_INTER_SDC                    1   // INTER SDC, Inter simplified depth coding
194                                              // LGE_INTER_SDC_E0156 Enable inter SDC for depth coding
195                                              // SEC_INTER_SDC_G0101 Improved inter SDC with multiple DC candidates
196
197#define H_3D_SPIVMP                       1   // H_3D_SPIVMP    // JCT3V-F0110: Sub-PU level inter-view motion prediction
198                                              // SEC_SPIVMP_MCP_SIZE_G0077, Apply SPIVMP only to 2Nx2N partition, JCT3V-G0077
199                                              // QC_SPIVMP_MPI_G0119 Sub-PU level MPI merge candidate
200                                              // Simplification on Sub-PU level temporal interview motion prediction
201
202
203#define H_3D_DBBP                         1   // DBBP: Depth-based Block Partitioning and Merging
204
205
206#define H_3D_FCO                          0   // Flexible coding order for 3D
207
208
209
210// OTHERS
211                                              // MTK_SONY_PROGRESSIVE_MV_COMPRESSION_E0170 // Progressive MV Compression, JCT3V-E0170
212#define H_3D_REN_MAX_DEV_OUT              0   // Output maximal possible shift deviation
213#define H_3D_FAST_TEXTURE_ENCODING        1   // Fast merge mode decision and early CU determination for texture component of dependent view, JCT3V-E0173
214                                              // MTK_FAST_TEXTURE_ENCODING_E0173
215#if H_3D_DIM
216#define H_3D_FAST_DEPTH_INTRA             1   // Fast DMM and RBC Mode Selection
217                                              // SCU_HS_FAST_DEPTH_INTRA_E0238_HHIFIX
218#endif
219
220// Rate Control
221#define KWU_FIX_URQ                       1
222#define KWU_RC_VIEWRC_E0227               0  ///< JCT3V-E0227, view-wise target bitrate allocation
223#define KWU_RC_MADPRED_E0227              0  ///< JCT3V-E0227, inter-view MAD prediction
224
225#endif // H_3D
226
227
228
229/////////////////////////////////////////////////////////////////////////////////////////
230///////////////////////////////////   DERIVED DEFINES /////////////////////////////////// 
231/////////////////////////////////////////////////////////////////////////////////////////
232
233///// ***** VIEW SYNTHESIS OPTIMIZAION *********
234#if H_3D_VSO                                 
235#define H_3D_VSO_DIST_INT                 1   // Allow negative synthesized view distortion change
236#define H_3D_VSO_COLOR_PLANES             1   // Compute VSO distortion on color planes
237#define H_3D_VSO_EARLY_SKIP               1   // LGE_VSO_EARLY_SKIP_A0093, A0093 modification 4
238#define H_3D_VSO_RM_ASSERTIONS            0   // Output VSO assertions
239#define H_3D_VSO_SYNTH_DIST_OUT           0   // Output of synthesized view distortion instead of depth distortion in encoder output
240#define H_3D_VSO_FIX                      0   // This fix should be enabled after verification
241#endif
242
243////   ****** NEIGHBOURING BLOCK-BASED DISPARITY VECTOR  *********
244#if H_3D_NBDV
245#define DVFROM_LEFT                       0
246#define DVFROM_ABOVE                      1
247#define IDV_CANDS                         2
248#endif
249
250///// ***** ADVANCED INTERVIEW RESIDUAL PREDICTION *********
251#if H_3D_ARP
252#define H_3D_ARP_WFNR                     3
253#endif
254
255///// ***** DEPTH INTRA MODES *********
256#if H_3D_DIM
257#define H_3D_DIM_DMM                      1   // Depth Modeling Modes
258#define H_3D_DIM_SDC                      1   // Simplified Depth Coding method
259#define H_3D_DIM_DLT                      1   // Depth Lookup Table
260
261#if H_3D_DIM_DLT
262#define H_3D_DELTA_DLT                    1
263#endif
264#define H_3D_DIM_ENC                      1   // Depth Intra encoder optimizations, includes:
265                                              // HHI_DEPTH_INTRA_SEARCH_RAU_C0160
266                                              // LG_ZEROINTRADEPTHRESI_A0087
267#endif
268///// ***** VIEW SYNTHESIS PREDICTION *********
269#if H_3D_VSP
270#define H_3D_VSP_BLOCKSIZE                4   // Supported values: 1, 2, and 4
271#if H_3D_VSP_BLOCKSIZE == 1
272#define H_3D_VSP_CONSTRAINED              1   // Constrained VSP @ 1x1
273#else
274#define H_3D_VSP_CONSTRAINED              0
275#endif
276#endif
277
278
279///// ***** ILLUMATION COMPENSATION *********
280#if H_3D_IC
281#define IC_REG_COST_SHIFT                 7
282#define IC_CONST_SHIFT                    5
283#define IC_SHIFT_DIFF                     12
284#endif
285
286
287///// ***** DEPTH BASED BLOCK PARTITIONING *********
288#if H_3D_DBBP
289#define DBBP_INVALID_SHORT                (-4)
290#define RWTH_DBBP_PACK_MODE               SIZE_2NxN
291#endif
292
293
294///// ***** FCO *********
295#if H_3D_FCO
296#define H_3D_FCO_VSP_DONBDV_E0163               1   // Adaptive depth reference for flexible coding order
297#else
298#define H_3D_FCO_VSP_DONBDV_E0163               0   // Adaptive depth reference for flexible coding order
299#endif
300
301#if H_3D
302#define PPS_FIX_DEPTH                           1
303#endif
304
305
306/////////////////////////////////////////////////////////////////////////////////////////
307///////////////////////////////////   HTM-10.0 Integrations //////////////////////////////
308/////////////////////////////////////////////////////////////////////////////////////////
309#if H_3D
310#if  H_3D_QTLPC
311#define MTK_TEX_DEP_PAR_G0055             1   // Texture-partition-dependent depth partition. JCT3V-G0055
312#endif
313
314#define MTK_DDD_G0063                     1   // Disparity derived depth coding
315#define HTM10RC1_FIX                      1   // Fix of DDD
316
317
318#if H_3D_VSP
319#define MTK_RBIP_VSP_G0069                1   // Restricted bi-prediction for VSP
320#define NTT_STORE_SPDV_VSP_G0148          1   // Storing Sub-PU based DV for VSP
321#endif
322
323
324
325#endif
326
327/////////////////////////////////////////////////////////////////////////////////////////
328///////////////////////////////////   HTM-10.1 Integrations //////////////////////////////
329/////////////////////////////////////////////////////////////////////////////////////////
330
331
332// TBD
333// #define H_MV_HLS_7_POC_P0041_3            0 // (POC/P0041/POC reset) #3 It was remarked that we should require each non-IRAP picture that has discardable_flag equal to 1 to have NUT value indicating that it is a sub-layer non-reference picture. This was agreed. Decision: Adopt (with constraint for discardable_flag as described above)
334// #define H_MV_HLS_7_POC_P0041_FIXES        0 // (POC/P0041/Fixes) For each non-IRAP picture that has discardable_flag equal to 1 to have NUT value indicating that it is a sub-layer non-reference picture.
335// #define H_MV_HLS_7_POC_P0056_4            0 // (POC/P0056/layer tree poc) #4 Proposal 1: If the POC reset approach is adopted as the basis for multi-layer POC derivation, it is proposed to derive the POC anchor picture from the previous TID0 picture (that is not a RASL picture, a RADL picture or a sub-layer non-reference picture and not with discardable_flag equal to 1) of  the current layer or any of its reference layer. This is asserted to improve loss resilience and reduce bit rate overhead. Decision: Adopt Proposal 1 (with the suggested modifications – with text provided as P0297).
336
337// #define H_MV_HLS_7_SEI_P0133_28           0 // (SEI/P0133/Recovery point SEI) #28 Decision: Adopt change to recover point semantics only (-v3)
338// #define H_MV_HLS_7_SEI_P0123_25           0 // (SEI/P0123/Alpha channel info) #25 Add alpha channel information SEI message Decision: Adopt. Constrain the bit depth indicated to be equal to the coded bit depth of the aux picture.
339
340// #define H_MV_HLS_7_HRD_P0138_6            0 // (HRD/P0138/HRD parameters for bitstreams excluding) #6 Decision: Adopt (as revised in updated contribution, with the specification of a flag in the BP SEI (HRD/P0192/sub-DPB) #12 Establish sub-DPBs based on the representation format indicated at the VPS level. It was suggested that the expressed shared capacity limit would need to be less than or equal to the sum of the individual capacity limits. Decision: Adopt as modified. Further study is encouraged on profile/level constraint selections.
341// #define H_MV_HLS_7_OTHER_P0187_1          0 // (OTHER/P0187/NoOutputOfPriorPicsFlag) #1 Inference of NoOutputOfPriorPicsFlag and proposes to take into account colour format and bit depth for the inference in addition to spatial resolution
342// #define H_MV_HLS_7_VPS_P0300_27           0 // Output part only. (VPS/P0300/alt output layer flag) #27 Change alt output layer flag to be signalled within the loop of output layer sets, from JCTVC-P0300-v2. Decision: Adopt.
343
344
345#define H_MV_HLS_7_VPS_P0306_22                1 // (VPS/P0306/ue(v) coded syntax elements) #22 Several minor modifications to the VPS syntax, consistent with eliminating the previous intention to avoid ue(v) parsing in the VPS
346#define H_MV_HLS_7_SEI_P0204_26                1 // (SEI/P0204/sub-bitstream SEI) #26 Add sub-bitstream property SEI message. Decision: Adopt
347#define H_MV_HLS_7_MISC_P0130_20               1 // (MISC/P0130/discardable not in inter-layer RPS) #20 Add constraint restricting pictures marked as discardable from being present in the temporal or inter-layer RPS,
348#define H_MV_HLS_7_VPS_P0125_24                1 // (VPS/P0125/VPS extension offset ) #24 Decision: Keep it as a reserved FFFF value.
349#define H_MV_HLS_7_VPS_P0307_23                1 // (VPS/P0307/VPS VUI extension)  #23 Decision: Adopt modification in P0307.
350#define H_MV_HLS_7_POC_P0041                   1 // Syntax related to POC reset
351
352
353#define H_MV_HLS7_GEN                          0  // General changes (not tested)
354#define H_MV_HLS_7_OUTPUT_LAYERS_5_10_22_27    1  // Output layer sets, various
355                                                  // (VPS/P0300/alt output layer flag) #27 Change alt output layer flag to be signalled within the loop of output layer sets, from JCTVC-P0300-v2. Decision: Adopt.
356                                                  // (VPS/P0156/Num of output_layer_flag) #10 Proposal 3: The output_layer_flag[ i ][ j ] is signalled for j equal to 0 to NumLayersInIdList[ lsIdx ] inclusive. It was remarked that we might be able to just assume that the top layer is always output; however, this was not entirely clear , so the safe thing to do may be to also send the flag for this layer.
357                                                  // (VPS/P0295/Default output layer sets) #5 Discussion from (P0110). Decision: Three-state approach (text in P0295, decoder shall allow 3 to be present and shall treat 3 the same as the value 2).
358
359
360#define H_MV_HLS_7_HRD_P0156_7                 1  // (HRD/P0156/MaxSubLayersInLayerSetMinus1) #7 Proposal 1: signal, in the VPS extension, the DPB parameters for an output layer set for sub-DPBs only up to the maximum temporal sub-layers in the corresponding layer set
361#define H_MV_HLS_7_VPS_P0048_14                1  // (VPS/P0048/profile_ref_minus1 rem) #14 Remove profile_ref_minus1 from the VPS extension, from JCTVC-P0048
362#define H_MV_HLS_7_VPS_P0076_15                1  // (VPS/P0076/video signal info move) #15 Move video signal information syntax structure earlier in the VPS VUI.
363#define H_MV_HLS_7_SPS_P0155_16_32             1  // (SPS/P0155/sps_sub_layer_ordering_info) #16, #32 Not signal the sps_max_num_reorder_pics[], sps_max_latency_increase_plus1[], and sps_max_dec_pic_buffering_minus1[] syntax elements in the SPS when nuh_layer_id > 0.
364#define H_MV_HLS_7_GEN_P0166_PPS_EXTENSION     1  // (GEN/P0166/pps_extension) #17 Add PPS extension type flags for conditional presence of syntax extensions per extension type, aligned with the SPS extension type flags, from JCTVC-P0166. Further align the SPS extension type flags syntax between RExt and MV-HEVC/SHVC
365#define H_MV_HLS_7_FIX_SET_DPB_SIZE            1  // Fix derivation dpb size parameters
366#define H_MV_HLS_7_RESERVED_FLAGS              1  // Added flags
367                                                  // (SPS/P0312/SHVC reserved flag) The flag will be used for the syntax vert_phase_position_enable_flag in SHVC draft
368                                                  // (VPS/O0215/SHVC reserved flag): this flag will be used for the syntax cross_layer_phase_alignment_flag in SHVC draft.
369                                                  // (VPS VUI/O0199,P0312/SHVC reserved flags) the 3 reserved bits will be used for the syntaxes single_layer_for_non_irap_flag, higher_layer_irap_skip_flag and vert_phase_position_not_in_use_flag in SHVC draft.
370#define H_MV_FIX_VPS_LAYER_ID_NOT_EQUAL_ZERO   1  // Discard VPS with nuh_layer_Id > 0
371#define H_MV_HLS_7_MISC_P0130_EOS              1  // (MISC/P0130/EOS NAL layer id) #19 Require that end of bitstream NAL unit shall have nuh_layer_id equal to 0, from JCTVC-P0130. Decoders shall allow an end of bitstream NAL unit with nuh_layer_id > 0 to be present, and shall ignore the NAL unit.
372#define H_MV_HLS_7_MISC_P0182_13               1  // (MISC/P0182/BL PS Compatibility flag) #13 Define the flag (in VPS VUI) with the proposed semantics, without specifying an associated extraction process. Editors to select the position in the VPS VUI.
373#define H_MV_HLS_7_MISC_P0068_21               1  // (MISC/P0068/all irap idr flag) #21 Add flag in VUI to indicate that all IRAP pictures are IDRs and that all layer pictures in an AU are IDR aligned, from JCTVC-P0068 proposal 1.
374#define H_MV_HLS_7_FIX_INFER_CROSS_LAYER_IRAP_ALIGNED_FLAG               1  // Fix inference of cross_layer_irap_aligned_flag
375#define H_MV_HLS_7_MISC_P0079_18               1  // (MISC/P0079/NumActiveRefLayerPics) #18 Modification of derivation of variable NumActiveRefLayerPics.
376#define FIX_CAM_PARS_COLLECTOR                 1
377#define UPDATE_HM13                            1  // Only some parts in H_3D parts are marked!
378#if H_3D
379#define H_3D_FIX_G0148_BRACE                   1
380#endif
381/////////////////////////////////////////////////////////////////////////////////////////
382///////////////////////////////////   HM RELATED DEFINES ////////////////////////////////
383/////////////////////////////////////////////////////////////////////////////////////////
384#define BUGFIX_INTRAPERIOD 1
385#define SAO_ENCODE_ALLOW_USE_PREDEBLOCK 1
386
387#define FIX1172 1 ///< fix ticket #1172
388
389#define MAX_NUM_PICS_IN_SOP           1024
390
391#define MAX_NESTING_NUM_OPS         1024
392#define MAX_NESTING_NUM_LAYER       64
393
394#define MAX_VPS_NUM_HRD_PARAMETERS                1
395#define MAX_VPS_OP_SETS_PLUS1                     1024
396#if H_MV
397#define MAX_VPS_NUH_LAYER_ID_PLUS1  63
398#define MAX_NUM_SCALABILITY_TYPES   16
399#define ENC_CFG_CONSOUT_SPACE       29           
400#else
401#define MAX_VPS_NUH_RESERVED_ZERO_LAYER_ID_PLUS1  1
402#endif
403
404
405#define MAX_CPB_CNT                     32  ///< Upper bound of (cpb_cnt_minus1 + 1)
406#if H_MV
407#define MAX_NUM_LAYER_IDS               63
408#define MAX_NUM_LAYERS                  63
409#define MAX_VPS_PROFILE_TIER_LEVEL      64
410#define MAX_VPS_ADD_OUTPUT_LAYER_SETS   1024
411#define MAX_VPS_OUTPUTLAYER_SETS        ( MAX_VPS_ADD_OUTPUT_LAYER_SETS + MAX_VPS_OP_SETS_PLUS1 )
412#define  MAX_NUM_VIDEO_SIGNAL_INFO      16
413#define MAX_NUM_SCALED_REF_LAYERS       MAX_NUM_LAYERS-1
414#define MAX_NUM_BSP_HRD_PARAMETERS      100 ///< Maximum value is actually not specified
415#define MAX_NUM_BITSTREAM_PARTITIONS    100 ///< Maximum value is actually not specified
416#define MAX_NUM_BSP_SCHED_COMBINATION   100 ///< Maximum value is actually not specified
417#if H_MV_HLS_7_SEI_P0204_26
418#define MAX_SUB_STREAMS                 1024
419#endif
420#else
421#define MAX_NUM_LAYER_IDS                64
422#endif
423
424#define COEF_REMAIN_BIN_REDUCTION        3 ///< indicates the level at which the VLC
425                                           ///< transitions from Golomb-Rice to TU+EG(k)
426
427#define CU_DQP_TU_CMAX 5                   ///< max number bins for truncated unary
428#define CU_DQP_EG_k 0                      ///< expgolomb order
429
430#define SBH_THRESHOLD                    4  ///< I0156: value of the fixed SBH controlling threshold
431 
432#define SEQUENCE_LEVEL_LOSSLESS           0  ///< H0530: used only for sequence or frame-level lossless coding
433
434#define DISABLING_CLIP_FOR_BIPREDME         1  ///< Ticket #175
435 
436#define C1FLAG_NUMBER               8 // maximum number of largerThan1 flag coded in one chunk :  16 in HM5
437#define C2FLAG_NUMBER               1 // maximum number of largerThan2 flag coded in one chunk:  16 in HM5
438#define SAO_ENCODING_CHOICE              1  ///< I0184: picture early termination
439#if SAO_ENCODING_CHOICE
440#define SAO_ENCODING_RATE                0.75
441#define SAO_ENCODING_CHOICE_CHROMA       1 ///< J0044: picture early termination Luma and Chroma are handled separately
442#if SAO_ENCODING_CHOICE_CHROMA
443#define SAO_ENCODING_RATE_CHROMA         0.5
444#endif
445#endif
446
447#define MAX_NUM_VPS                16
448#define MAX_NUM_SPS                16
449#define MAX_NUM_PPS                64
450
451#define RDOQ_CHROMA_LAMBDA          1   ///< F386: weighting of chroma for RDOQ
452
453#define MIN_SCAN_POS_CROSS          4
454
455#define FAST_BIT_EST                1   ///< G763: Table-based bit estimation for CABAC
456
457#define MLS_GRP_NUM                         64     ///< G644 : Max number of coefficient groups, max(16, 64)
458#define MLS_CG_SIZE                         4      ///< G644 : Coefficient group size of 4x4
459
460#define ADAPTIVE_QP_SELECTION               1      ///< G382: Adaptive reconstruction levels, non-normative part for adaptive QP selection
461#if ADAPTIVE_QP_SELECTION
462#define ARL_C_PRECISION                     7      ///< G382: 7-bit arithmetic precision
463#define LEVEL_RANGE                         30     ///< G382: max coefficient level in statistics collection
464#endif
465
466#define HHI_RQT_INTRA_SPEEDUP             1           ///< tests one best mode with full rqt
467#define HHI_RQT_INTRA_SPEEDUP_MOD         0           ///< tests two best modes with full rqt
468
469#if HHI_RQT_INTRA_SPEEDUP_MOD && !HHI_RQT_INTRA_SPEEDUP
470#error
471#endif
472
473#define VERBOSE_RATE 0 ///< Print additional rate information in encoder
474
475#define AMVP_DECIMATION_FACTOR            4
476
477#define SCAN_SET_SIZE                     16
478#define LOG2_SCAN_SET_SIZE                4
479
480#define FAST_UDI_MAX_RDMODE_NUM               35          ///< maximum number of RD comparison in fast-UDI estimation loop
481
482#define ZERO_MVD_EST                          0           ///< Zero Mvd Estimation in normal mode
483
484#define NUM_INTRA_MODE 36
485#if !REMOVE_LM_CHROMA
486#define LM_CHROMA_IDX  35
487#endif
488
489#define WRITE_BACK                      1           ///< Enable/disable the encoder to replace the deltaPOC and Used by current from the config file with the values derived by the refIdc parameter.
490#define AUTO_INTER_RPS                  1           ///< Enable/disable the automatic generation of refIdc from the deltaPOC and Used by current from the config file.
491#define PRINT_RPS_INFO                  0           ///< Enable/disable the printing of bits used to send the RPS.
492                                                    // using one nearest frame as reference frame, and the other frames are high quality (POC%4==0) frames (1+X)
493                                                    // this should be done with encoder only decision
494                                                    // but because of the absence of reference frame management, the related code was hard coded currently
495
496#define RVM_VCEGAM10_M 4
497
498#define PLANAR_IDX             0
499#define VER_IDX                26                    // index for intra VERTICAL   mode
500#define HOR_IDX                10                    // index for intra HORIZONTAL mode
501#define DC_IDX                 1                     // index for intra DC mode
502#define NUM_CHROMA_MODE        5                     // total number of chroma modes
503#define DM_CHROMA_IDX          36                    // chroma mode index for derived from luma intra mode
504
505
506#define FAST_UDI_USE_MPM 1
507
508#define RDO_WITHOUT_DQP_BITS              0           ///< Disable counting dQP bits in RDO-based mode decision
509
510#define FULL_NBIT 0 ///< When enabled, compute costs using full sample bitdepth.  When disabled, compute costs as if it is 8-bit source video.
511#if FULL_NBIT
512# define DISTORTION_PRECISION_ADJUSTMENT(x) 0
513#else
514# define DISTORTION_PRECISION_ADJUSTMENT(x) (x)
515#endif
516
517#define LOG2_MAX_NUM_COLUMNS_MINUS1        7
518#define LOG2_MAX_NUM_ROWS_MINUS1           7
519#define LOG2_MAX_COLUMN_WIDTH              13
520#define LOG2_MAX_ROW_HEIGHT                13
521
522#define MATRIX_MULT                             0   // Brute force matrix multiplication instead of partial butterfly
523
524#define REG_DCT 65535
525
526#define AMP_SAD                               1           ///< dedicated SAD functions for AMP
527#define AMP_ENC_SPEEDUP                       1           ///< encoder only speed-up by AMP mode skipping
528#if AMP_ENC_SPEEDUP
529#define AMP_MRG                               1           ///< encoder only force merge for AMP partition (no motion search for AMP)
530#endif
531
532#define CABAC_INIT_PRESENT_FLAG     1
533
534// ====================================================================================================================
535// Basic type redefinition
536// ====================================================================================================================
537
538typedef       void                Void;
539typedef       bool                Bool;
540
541#ifdef __arm__
542typedef       signed char         Char;
543#else
544typedef       char                Char;
545#endif
546typedef       unsigned char       UChar;
547typedef       short               Short;
548typedef       unsigned short      UShort;
549typedef       int                 Int;
550typedef       unsigned int        UInt;
551typedef       double              Double;
552typedef       float               Float;
553
554// ====================================================================================================================
555// 64-bit integer type
556// ====================================================================================================================
557
558#ifdef _MSC_VER
559typedef       __int64             Int64;
560
561#if _MSC_VER <= 1200 // MS VC6
562typedef       __int64             UInt64;   // MS VC6 does not support unsigned __int64 to double conversion
563#else
564typedef       unsigned __int64    UInt64;
565#endif
566
567#else
568
569typedef       long long           Int64;
570typedef       unsigned long long  UInt64;
571
572#endif
573
574// ====================================================================================================================
575// Type definition
576// ====================================================================================================================
577
578typedef       UChar           Pxl;        ///< 8-bit pixel type
579typedef       Short           Pel;        ///< 16-bit pixel type
580typedef       Int             TCoeff;     ///< transform coefficient
581
582#if H_3D_VSO
583// ====================================================================================================================
584// Define Distortion Types
585// ====================================================================================================================
586typedef       Int64           RMDist;     ///< renderer model distortion
587
588#if H_3D_VSO_DIST_INT
589typedef       Int64            Dist;       ///< RDO distortion
590typedef       Int64            Dist64; 
591#define       RDO_DIST_MIN     MIN_INT
592#define       RDO_DIST_MAX     MAX_INT
593#else
594typedef       UInt             Dist;       ///< RDO distortion
595typedef       UInt64           Dist; 
596#define       RDO_DIST_MIN     0
597#define       RDO_DIST_MAX     MAX_UINT
598#endif
599#endif
600/// parameters for adaptive loop filter
601class TComPicSym;
602
603// Slice / Slice segment encoding modes
604enum SliceConstraint
605{
606  NO_SLICES              = 0,          ///< don't use slices / slice segments
607  FIXED_NUMBER_OF_LCU    = 1,          ///< Limit maximum number of largest coding tree blocks in a slice / slice segments
608  FIXED_NUMBER_OF_BYTES  = 2,          ///< Limit maximum number of bytes in a slice / slice segment
609  FIXED_NUMBER_OF_TILES  = 3,          ///< slices / slice segments span an integer number of tiles
610};
611
612enum SAOComponentIdx
613{
614  SAO_Y =0,
615  SAO_Cb,
616  SAO_Cr,
617  NUM_SAO_COMPONENTS
618};
619
620enum SAOMode //mode
621{
622  SAO_MODE_OFF = 0,
623  SAO_MODE_NEW,
624  SAO_MODE_MERGE,
625  NUM_SAO_MODES
626};
627
628enum SAOModeMergeTypes
629{
630  SAO_MERGE_LEFT =0,
631  SAO_MERGE_ABOVE,
632  NUM_SAO_MERGE_TYPES
633};
634
635
636enum SAOModeNewTypes
637{
638  SAO_TYPE_START_EO =0,
639  SAO_TYPE_EO_0 = SAO_TYPE_START_EO,
640  SAO_TYPE_EO_90,
641  SAO_TYPE_EO_135,
642  SAO_TYPE_EO_45,
643
644  SAO_TYPE_START_BO,
645  SAO_TYPE_BO = SAO_TYPE_START_BO,
646
647  NUM_SAO_NEW_TYPES
648};
649#define NUM_SAO_EO_TYPES_LOG2 2
650
651enum SAOEOClasses
652{
653  SAO_CLASS_EO_FULL_VALLEY = 0,
654  SAO_CLASS_EO_HALF_VALLEY = 1,
655  SAO_CLASS_EO_PLAIN       = 2,
656  SAO_CLASS_EO_HALF_PEAK   = 3,
657  SAO_CLASS_EO_FULL_PEAK   = 4,
658  NUM_SAO_EO_CLASSES,
659};
660
661
662#define NUM_SAO_BO_CLASSES_LOG2  5
663enum SAOBOClasses
664{
665  //SAO_CLASS_BO_BAND0 = 0,
666  //SAO_CLASS_BO_BAND1,
667  //SAO_CLASS_BO_BAND2,
668  //...
669  //SAO_CLASS_BO_BAND31,
670
671  NUM_SAO_BO_CLASSES = (1<<NUM_SAO_BO_CLASSES_LOG2),
672};
673#define MAX_NUM_SAO_CLASSES  32  //(NUM_SAO_EO_GROUPS > NUM_SAO_BO_GROUPS)?NUM_SAO_EO_GROUPS:NUM_SAO_BO_GROUPS
674
675struct SAOOffset
676{
677  Int modeIdc; //NEW, MERGE, OFF
678  Int typeIdc; //NEW: EO_0, EO_90, EO_135, EO_45, BO. MERGE: left, above
679  Int typeAuxInfo; //BO: starting band index
680  Int offset[MAX_NUM_SAO_CLASSES];
681
682  SAOOffset();
683  ~SAOOffset();
684  Void reset();
685
686  const SAOOffset& operator= (const SAOOffset& src);
687};
688
689struct SAOBlkParam
690{
691
692  SAOBlkParam();
693  ~SAOBlkParam();
694  Void reset();
695  const SAOBlkParam& operator= (const SAOBlkParam& src);
696  SAOOffset& operator[](Int compIdx){ return offsetParam[compIdx];}
697private:
698  SAOOffset offsetParam[NUM_SAO_COMPONENTS];
699
700};
701
702/// parameters for deblocking filter
703typedef struct _LFCUParam
704{
705  Bool bInternalEdge;                     ///< indicates internal edge
706  Bool bLeftEdge;                         ///< indicates left edge
707  Bool bTopEdge;                          ///< indicates top edge
708} LFCUParam;
709
710// ====================================================================================================================
711// Enumeration
712// ====================================================================================================================
713
714/// supported slice type
715enum SliceType
716{
717  B_SLICE,
718  P_SLICE,
719  I_SLICE
720};
721
722/// chroma formats (according to semantics of chroma_format_idc)
723enum ChromaFormat
724{
725  CHROMA_400  = 0,
726  CHROMA_420  = 1,
727  CHROMA_422  = 2,
728  CHROMA_444  = 3
729};
730
731/// supported partition shape
732enum PartSize
733{
734  SIZE_2Nx2N,           ///< symmetric motion partition,  2Nx2N
735  SIZE_2NxN,            ///< symmetric motion partition,  2Nx N
736  SIZE_Nx2N,            ///< symmetric motion partition,   Nx2N
737  SIZE_NxN,             ///< symmetric motion partition,   Nx N
738  SIZE_2NxnU,           ///< asymmetric motion partition, 2Nx( N/2) + 2Nx(3N/2)
739  SIZE_2NxnD,           ///< asymmetric motion partition, 2Nx(3N/2) + 2Nx( N/2)
740  SIZE_nLx2N,           ///< asymmetric motion partition, ( N/2)x2N + (3N/2)x2N
741  SIZE_nRx2N,           ///< asymmetric motion partition, (3N/2)x2N + ( N/2)x2N
742  SIZE_NONE = 15
743};
744
745/// supported prediction type
746enum PredMode
747{
748  MODE_INTER,           ///< inter-prediction mode
749  MODE_INTRA,           ///< intra-prediction mode
750  MODE_NONE = 15
751};
752
753/// texture component type
754enum TextType
755{
756  TEXT_LUMA,            ///< luma
757  TEXT_CHROMA,          ///< chroma (U+V)
758  TEXT_CHROMA_U,        ///< chroma U
759  TEXT_CHROMA_V,        ///< chroma V
760  TEXT_ALL,             ///< Y+U+V
761  TEXT_NONE = 15
762};
763
764/// reference list index
765enum RefPicList
766{
767  REF_PIC_LIST_0 = 0,   ///< reference list 0
768  REF_PIC_LIST_1 = 1,   ///< reference list 1
769  REF_PIC_LIST_X = 100  ///< special mark
770};
771
772/// distortion function index
773enum DFunc
774{
775  DF_DEFAULT  = 0,
776  DF_SSE      = 1,      ///< general size SSE
777  DF_SSE4     = 2,      ///<   4xM SSE
778  DF_SSE8     = 3,      ///<   8xM SSE
779  DF_SSE16    = 4,      ///<  16xM SSE
780  DF_SSE32    = 5,      ///<  32xM SSE
781  DF_SSE64    = 6,      ///<  64xM SSE
782  DF_SSE16N   = 7,      ///< 16NxM SSE
783 
784  DF_SAD      = 8,      ///< general size SAD
785  DF_SAD4     = 9,      ///<   4xM SAD
786  DF_SAD8     = 10,     ///<   8xM SAD
787  DF_SAD16    = 11,     ///<  16xM SAD
788  DF_SAD32    = 12,     ///<  32xM SAD
789  DF_SAD64    = 13,     ///<  64xM SAD
790  DF_SAD16N   = 14,     ///< 16NxM SAD
791 
792  DF_SADS     = 15,     ///< general size SAD with step
793  DF_SADS4    = 16,     ///<   4xM SAD with step
794  DF_SADS8    = 17,     ///<   8xM SAD with step
795  DF_SADS16   = 18,     ///<  16xM SAD with step
796  DF_SADS32   = 19,     ///<  32xM SAD with step
797  DF_SADS64   = 20,     ///<  64xM SAD with step
798  DF_SADS16N  = 21,     ///< 16NxM SAD with step
799 
800  DF_HADS     = 22,     ///< general size Hadamard with step
801  DF_HADS4    = 23,     ///<   4xM HAD with step
802  DF_HADS8    = 24,     ///<   8xM HAD with step
803  DF_HADS16   = 25,     ///<  16xM HAD with step
804  DF_HADS32   = 26,     ///<  32xM HAD with step
805  DF_HADS64   = 27,     ///<  64xM HAD with step
806  DF_HADS16N  = 28,     ///< 16NxM HAD with step
807#if H_3D_VSO
808  DF_VSD      = 29,      ///< general size VSD
809  DF_VSD4     = 30,      ///<   4xM VSD
810  DF_VSD8     = 31,      ///<   8xM VSD
811  DF_VSD16    = 32,      ///<  16xM VSD
812  DF_VSD32    = 33,      ///<  32xM VSD
813  DF_VSD64    = 34,      ///<  64xM VSD
814  DF_VSD16N   = 35,      ///< 16NxM VSD
815#endif
816
817#if AMP_SAD
818  DF_SAD12    = 43,
819  DF_SAD24    = 44,
820  DF_SAD48    = 45,
821
822  DF_SADS12   = 46,
823  DF_SADS24   = 47,
824  DF_SADS48   = 48,
825
826  DF_SSE_FRAME = 50     ///< Frame-based SSE
827#else
828  DF_SSE_FRAME = 33     ///< Frame-based SSE
829#endif
830};
831
832/// index for SBAC based RD optimization
833enum CI_IDX
834{
835  CI_CURR_BEST = 0,     ///< best mode index
836  CI_NEXT_BEST,         ///< next best index
837  CI_TEMP_BEST,         ///< temporal index
838  CI_CHROMA_INTRA,      ///< chroma intra index
839  CI_QT_TRAFO_TEST,
840  CI_QT_TRAFO_ROOT,
841  CI_NUM,               ///< total number
842};
843
844/// motion vector predictor direction used in AMVP
845enum MVP_DIR
846{
847  MD_LEFT = 0,          ///< MVP of left block
848  MD_ABOVE,             ///< MVP of above block
849  MD_ABOVE_RIGHT,       ///< MVP of above right block
850  MD_BELOW_LEFT,        ///< MVP of below left block
851  MD_ABOVE_LEFT         ///< MVP of above left block
852};
853
854/// coefficient scanning type used in ACS
855enum COEFF_SCAN_TYPE
856{
857  SCAN_DIAG = 0,         ///< up-right diagonal scan
858  SCAN_HOR,              ///< horizontal first scan
859  SCAN_VER               ///< vertical first scan
860};
861
862namespace Profile
863{
864  enum Name
865  {
866    NONE = 0,
867    MAIN = 1,
868    MAIN10 = 2,
869    MAINSTILLPICTURE = 3,
870#if H_MV
871    MAINSTEREO = 4,
872    MAINMULTIVIEW = 5,
873#if H_3D
874    MAIN3D = 6, 
875#endif
876#endif
877  };
878}
879
880namespace Level
881{
882  enum Tier
883  {
884    MAIN = 0,
885    HIGH = 1,
886  };
887
888  enum Name
889  {
890    NONE     = 0,
891    LEVEL1   = 30,
892    LEVEL2   = 60,
893    LEVEL2_1 = 63,
894    LEVEL3   = 90,
895    LEVEL3_1 = 93,
896    LEVEL4   = 120,
897    LEVEL4_1 = 123,
898    LEVEL5   = 150,
899    LEVEL5_1 = 153,
900    LEVEL5_2 = 156,
901    LEVEL6   = 180,
902    LEVEL6_1 = 183,
903    LEVEL6_2 = 186,
904  };
905}
906//! \}
907
908#if H_MV
909
910#if H_MV_HLS_7_GEN_P0166_PPS_EXTENSION
911enum PpsExtensionTypes
912{
913  PPS_EX_T_MV      = 0,
914#if H_3D
915  PPS_EX_T_3D      = 3,
916#endif
917  PPS_EX_T_ESC     = 7,
918  PPS_EX_T_MAX_NUM = 8
919};
920
921//Below for sps, would be good if this could be aligned
922#endif
923
924  enum PsExtensionTypes
925  {
926    PS_EX_T_MV   = 1,
927#if H_3D
928    PS_EX_T_3D   = 3,
929#endif
930    PS_EX_T_ESC  = 7,
931    PS_EX_T_MAX_NUM = 8
932  };
933
934/// scalability types
935  enum ScalabilityType
936  {
937#if H_3D
938    DEPTH_ID = 0,   
939#endif   
940    VIEW_ORDER_INDEX  = 1,
941  };
942#endif
943#if H_3D
944  // Renderer
945  enum BlenMod
946  {
947    BLEND_NONE  = -1,
948    BLEND_AVRG  = 0,
949    BLEND_LEFT  = 1,
950    BLEND_RIGHT = 2,
951    BLEND_GEN   =  3
952  };
953
954 
955  enum
956  {
957    VIEWPOS_INVALID = -1,
958    VIEWPOS_LEFT    = 0,
959    VIEWPOS_RIGHT   = 1,
960    VIEWPOS_MERGED  = 2
961  };
962
963#define Log2( n ) ( log((double)n) / log(2.0) ) // Ed.(GT): This is very very bad and should be fixed to used integer arithmetics ( see gCeilLog2 ) moreover it should not be defined in the tool macro section!
964#endif
965#endif
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