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33
34	/** \file TypeDef.h
35	\brief Define basic types, new types and enumerations
36	*/
37
38	#ifndef _TYPEDEF__
39	#define _TYPEDEF__
40
41	//! \ingroup TLibCommon
42	//! \{
43	/////////////////////////////////////////////////////////////////////////////////////////
44	///////////////////////////////// EXTENSION SELECTION ///////////////////////////////////
45	/////////////////////////////////////////////////////////////////////////////////////////
46
47	/* HEVC_EXT might be defined by compiler/makefile options.
48
49	Linux makefiles support the following settings:
50	make -> HEVC_EXT not defined
51	make HEVC_EXT=0 -> H_MV=0 H_3D=0 --> plain HM
52	make HEVC_EXT=1 -> H_MV=1 H_3D=0 --> MV only
53	make HEVC_EXT=2 -> H_MV=1 H_3D=1 --> full 3D
54	*/
55
56	#ifndef HEVC_EXT
57	#define HEVC_EXT 2
58	#endif
59
60	#if ( HEVC_EXT < 0 )\|\|( HEVC_EXT > 2 )
61	#error HEVC_EXT must be in the range of 0 to 2, inclusive.
62	#endif
63
64	#define H_MV ( HEVC_EXT != 0)
65	#define H_3D ( HEVC_EXT == 2)
66
67
68	/////////////////////////////////////////////////////////////////////////////////////////
69	/////////////////////////////////// MAJOR DEFINES ///////////////////////////////////
70	/////////////////////////////////////////////////////////////////////////////////////////
71
72	#if H_MV
73	#define H_MV_ENC_DEC_TRAC 1 //< CU/PU level tracking
74	#endif
75
76	#if H_3D
77	#define H_3D_QTLPC 1 // OL_QTLIMIT_PREDCODING_B0068 //JCT3V-B0068
78	// HHI_QTLPC_RAU_OFF_C0160 // JCT3V-C0160 change 2: quadtree limitation and predictive coding switched off in random access units
79
80	#define H_3D_VSO 1 // VSO, View synthesis optimization, includes:
81	// HHI_VSO
82	// HHI_VSO_LS_TABLE_M23714 enable table base Lagrange multiplier optimization
83	// SAIT_VSO_EST_A0033, JCT3V-A0033 modification 3
84	// LGE_WVSO_A0119
85	#define H_3D_NBDV 1 // Neighboring block disparity derivation
86	// QC_JCT3V-A0097
87	// LGE_DVMCP_A0126
88	// LGE_DVMCP_MEM_REDUCTION_B0135
89	// QC_SIMPLE_NBDV_B0047
90	// FIX_LGE_DVMCP_B0133
91	// QC_NBDV_LDB_FIX_C0055
92	// MTK_SAIT_TEMPORAL_FIRST_ORDER_C0141_C0097
93	// MTK_SIMPLIFY_DVTC_C0135
94	// QC_CU_NBDV_D0181
95	// SEC_DEFAULT_DV_D0112
96	// MTK_DVMCP_FIX_E0172 fix the mismatch between software and WD for DV derivation from DVMCP blocks, issue 2 in JCT3V-E0172
97	// SEC_SIMPLIFIED_NBDV_E0142 Simplified NBDV, JCT3V-E0142 and JCT3V-E0190
98	// MTK_NBDV_TN_FIX_E0172 fix the issue of DV derivation from the temporal neighboring blocks, issue 7 in JCT3V-E0172
99	// MTK_TEXTURE_MRGCAND_BUGFIX_E0182 Bug fix for TEXTURE MERGING CANDIDATE , JCT3V-E0182
100	#define H_3D_ARP 1 // Advanced residual prediction (ARP), JCT3V-D0177
101	// QC_MTK_INTERVIEW_ARP_F0123_F0108 JCT3V-F0123; JCT3V-F0108
102	// SHARP_ARP_REF_CHECK_F0105 ARP reference picture selection and DPB check
103	// LGE_ARP_CTX_F0161 JCT3V-F0161
104	#define H_3D_IC 1 // Illumination Compensation, JCT3V-B0045, JCT3V-C0046, JCT3V-D0060
105	// Unifying rounding offset, for IC part, JCT3V-D0135
106	// Full Pel Interpolation for Depth, HHI_FULL_PEL_DEPTH_MAP_MV_ACC
107	// SHARP_ILLUCOMP_REFINE_E0046
108	// MTK_CLIPPING_ALIGN_IC_E0168 // To support simplify bi-prediction PU with identical motion checking, JCT3V-E0168
109	// LGE_IC_CTX_F0160 //JCT3V-F0160
110	// SEC_ONLY_TEXTURE_IC_F0151
111
112	#if H_3D_NBDV
113	#define H_3D_NBDV_REF 1 // Depth oriented neighboring block disparity derivation
114	// MTK_D0156
115	// MERL_D0166: Reference view selection in NBDV & Bi-VSP
116	// MERL_C0152: Basic VSP
117	// NBDV_DEFAULT_VIEWIDX_BUGFIX Bug fix for invalid default view index for NBDV
118	// NTT_DoNBDV_VECTOR_CLIP_E0141 disparity vector clipping in DoNBDV, JCT3V-E0141 and JCT3V-E0209
119	#endif
120
121	#define H_3D_VSP 1 // View synthesis prediction
122	// MERL_C0152: Basic VSP
123	// MERL_D0166: Reference view selection in NBDV & Bi-VSP
124	// MTK_D0105, LG_D0139: No VSP for depth
125	// QC_D0191: Clean up
126	// LG_D0092: Multiple VSP candidate allowed
127	// MTK_VSP_FIX_ALIGN_WD_E0172
128	// NTT_VSP_ADAPTIVE_SPLIT_E0207 adaptive sub-PU partitioning in VSP, JCT3V-E0207
129	// NTT_VSP_DC_BUGFIX_E0208 bugfix for sub-PU based DC in VSP, JCT3V-E0208
130	// NTT_VSP_COMMON_E0207_E0208 common part of JCT3V-E0207 and JCT3V-E0208
131	// MTK_F0109_LG_F0120_VSP_BLOCK MTK_LG_SIMPLIFY_VSP_BLOCK_PARTITION_F0109_F0120
132	// SHARP_VSP_BLOCK_IN_AMP_F0102 VSP partitioning for AMP
133	// MTK_VSP_SIMPLIFICATION_F0111 1. Inherited VSP also use NBDV of current CU, 2. VSP cannot be inherited from above LCU rowss
134	// LGE_SHARP_VSP_INHERIT_F0104
135
136	#define H_3D_IV_MERGE 1 // Inter-view motion merge candidate
137	// HHI_INTER_VIEW_MOTION_PRED
138	// SAIT_IMPROV_MOTION_PRED_M24829, improved inter-view motion vector prediction
139	// QC_MRG_CANS_B0048 , JCT3V-B0048, B0086, B0069
140	// OL_DISMV_POS_B0069 , different pos for disparity MV candidate, B0069
141	// MTK_INTERVIEW_MERGE_A0049 , second part
142	// QC_AMVP_MRG_UNIFY_IVCAN_C0051
143	// TEXTURE MERGING CANDIDATE , JCT3V-C0137
144	// QC_INRIA_MTK_MRG_E0126
145	// ETRIKHU_MERGE_REUSE_F0093 QC_DEPTH_IV_MRG_F0125, JCT3V-F0125: Depth oriented Inter-view MV candidate
146	// EC_MPI_ENABLING_MERGE_F0150, MPI flag in VPS and enabling in Merge mode
147	#define H_3D_TMVP 1 // QC_TMVP_C0047
148	// Sony_M23639
149
150	#define H_3D_DIM 1 // DIM, Depth intra modes, includes:
151	// HHI_DMM_WEDGE_INTRA
152	// HHI_DMM_PRED_TEX
153	// FIX_WEDGE_NOFLOAT_D0036
154	// LGE_EDGE_INTRA_A0070
155	// LGE_DMM3_SIMP_C0044
156	// QC_DC_PREDICTOR_D0183
157	// HHI_DELTADC_DLT_D0035
158	// PKU_QC_DEPTH_INTRA_UNI_D0195
159	// RWTH_SDC_DLT_B0036
160	// INTEL_SDC64_D0193
161	// RWTH_SDC_CTX_SIMPL_D0032
162	// LGE_CONCATENATE_D0141
163	// FIX_SDC_ENC_RD_WVSO_D0163
164	// MTK_SAMPLE_BASED_SDC_D0110
165	// SEC_DMM2_E0146_HHIFIX Removal of DMM2 from DMMs
166	// ZJU_DEPTH_INTRA_MODE_E0204 Simplified Binarization for depth_intra_mode
167	// KWU_SDC_SIMPLE_DC_E0117 Simplified DC calculation for SDC
168	// SCU_HS_DMM4_REMOVE_DIV_E0242 DMM4 Division Removal
169	// LGE_SDC_REMOVE_DC_E0158 Removal of DC mode from SDC
170	// LGE_PKU_DMM3_OVERLAP_E0159_HHIFIX 1 Removal of overlap between DMM3 and DMM1
171	// LGE_PRED_RES_CODING_DLT_DOMAIN_F0159 JCT3V-F0159
172	// HHI_DIM_PREDSAMP_FIX_F0171
173	// SEC_DMM3_RBC_F0147 Removal of DMM3 and RBC from DMMs
174	// QC_DIM_DELTADC_UNIFY_F0132 Unify delta DC coding in depth intra modes
175
176	#define H_3D_INTER_SDC 1 // INTER SDC, Inter simplified depth coding
177	// LGE_INTER_SDC_E0156 Enable inter SDC for depth coding
178	#define H_3D_SPIVMP 1 // H_3D_SPIVMP // JCT3V-F0110: Sub-PU level inter-view motion prediction
179	#define H_3D_FCO 0 // Flexible coding order for 3D
180
181
182
183	// OTHERS
184	// MTK_SONY_PROGRESSIVE_MV_COMPRESSION_E0170 // Progressive MV Compression, JCT3V-E0170
185	#define H_3D_REN_MAX_DEV_OUT 0 // Output maximal possible shift deviation
186	#define H_3D_FAST_TEXTURE_ENCODING 1 // Fast merge mode decision and early CU determination for texture component of dependent view, JCT3V-E0173
187	// MTK_FAST_TEXTURE_ENCODING_E0173
188	#if H_3D_DIM
189	#define H_3D_FAST_DEPTH_INTRA 1 // Fast DMM and RBC Mode Selection
190	// SCU_HS_FAST_DEPTH_INTRA_E0238_HHIFIX
191	#endif
192
193	// Rate Control
194	#define KWU_FIX_URQ 1
195	#define KWU_RC_VIEWRC_E0227 0 ///< JCT3V-E0227, view-wise target bitrate allocation
196	#define KWU_RC_MADPRED_E0227 0 ///< JCT3V-E0227, inter-view MAD prediction
197
198	#endif // H_3D
199
200
201
202	/////////////////////////////////////////////////////////////////////////////////////////
203	/////////////////////////////////// DERIVED DEFINES ///////////////////////////////////
204	/////////////////////////////////////////////////////////////////////////////////////////
205
206	///// *** VIEW SYNTHESIS OPTIMIZAION *******
207	#if H_3D_VSO
208	#define H_3D_VSO_DIST_INT 1 // Allow negative synthesized view distortion change
209	#define H_3D_VSO_COLOR_PLANES 1 // Compute VSO distortion on color planes
210	#define H_3D_VSO_EARLY_SKIP 1 // LGE_VSO_EARLY_SKIP_A0093, A0093 modification 4
211	#define H_3D_VSO_RM_ASSERTIONS 0 // Output VSO assertions
212	#define H_3D_VSO_SYNTH_DIST_OUT 0 // Output of synthesized view distortion instead of depth distortion in encoder output
213	#define H_3D_VSO_FIX 0 // This fix should be enabled after verification
214	#endif
215
216	//// **** NEIGHBOURING BLOCK-BASED DISPARITY VECTOR *******
217	#if H_3D_NBDV
218	#define DVFROM_LEFT 0
219	#define DVFROM_ABOVE 1
220	#define IDV_CANDS 2
221	#endif
222
223	///// *** ADVANCED INTERVIEW RESIDUAL PREDICTION *******
224	#if H_3D_ARP
225	#define H_3D_ARP_WFNR 3
226	#endif
227
228	///// *** DEPTH INTRA MODES *******
229	#if H_3D_DIM
230	#define H_3D_DIM_DMM 1 // Depth Modeling Modes
231	#define H_3D_DIM_SDC 1 // Simplified Depth Coding method
232	#define H_3D_DIM_DLT 1 // Depth Lookup Table
233
234	#if H_3D_DIM_DLT
235	#define H_3D_DELTA_DLT 1
236	#endif
237	#define H_3D_DIM_ENC 1 // Depth Intra encoder optimizations, includes:
238	// HHI_DEPTH_INTRA_SEARCH_RAU_C0160
239	// LG_ZEROINTRADEPTHRESI_A0087
240	#endif
241	///// *** VIEW SYNTHESIS PREDICTION *******
242	#if H_3D_VSP
243	#define H_3D_VSP_BLOCKSIZE 4 // Supported values: 1, 2, and 4
244	#if H_3D_VSP_BLOCKSIZE == 1
245	#define H_3D_VSP_CONSTRAINED 1 // Constrained VSP @ 1x1
246	#else
247	#define H_3D_VSP_CONSTRAINED 0
248	#endif
249	#endif
250
251
252	///// *** ILLUMATION COMPENSATION *******
253	#if H_3D_IC
254	#define IC_REG_COST_SHIFT 7
255	#define IC_CONST_SHIFT 5
256	#define IC_SHIFT_DIFF 12
257	#endif
258
259
260	///// *** FCO *******
261	#if H_3D_FCO
262	#define H_3D_FCO_VSP_DONBDV_E0163 1 // Adaptive depth reference for flexible coding order
263	#else
264	#define H_3D_FCO_VSP_DONBDV_E0163 0 // Adaptive depth reference for flexible coding order
265	#endif
266
267	#if H_3D
268	#define PPS_FIX_DEPTH 1
269	#endif
270
271
272	/////////////////////////////////////////////////////////////////////////////////////////
273	/////////////////////////////////// HTM-10.0 Integrations //////////////////////////////
274	/////////////////////////////////////////////////////////////////////////////////////////
275	#if H_3D
276	#if H_3D_QTLPC
277	#define MTK_TEX_DEP_PAR_G0055 1 // Texture-partition-dependent depth partition. JCT3V-G0055
278	#endif
279
280	#define MTK_DDD_G0063 1 // Disparity derived depth coding
281	#define HTM10RC1_FIX 1 // Fix of DDD
282
283
284	#if H_3D_VSP
285	#define MTK_RBIP_VSP_G0069 1 // Restricted bi-prediction for VSP
286	#define NTT_STORE_SPDV_VSP_G0148 1 // Storing Sub-PU based DV for VSP
287	#endif
288
289	#define H_3D_DBBP 1 // DBBP: Depth-based Block Partitioning and Merging
290
291	#if H_3D_DBBP
292	#define DBBP_INVALID_SHORT (-4)
293	#define RWTH_DBBP_PACK_MODE SIZE_2NxN
294	#endif
295
296	#if H_3D_DIM
297	#define QC_PKU_SDC_SPLIT_G0123 1 // Intra SDC Split
298	#if QC_PKU_SDC_SPLIT_G0123
299	#define HS_TSINGHUA_SDC_SPLIT_G0111 1
300	#endif
301	#define SCU_HS_DEPTH_DC_PRED_G0143 1
302	#define QC_GENERIC_SDC_G0122 1 // Generalize SDC to all depth intra modes
303	#if H_3D_DIM_SDC && H_3D_INTER_SDC
304	#define QC_SDC_UNIFY_G0130 1 // Unify intra SDC and inter SDC
305	#define QC_SDC_UNIFY_G0130_FIX 1 // Fix bug of G0130
306	#define QC_SDC_UNIFY_G0130_FIX2 1 // Fix bug of G0130
307	#endif
308	#define SEC_INTER_SDC_G0101 1 // Improved inter SDC with multiple DC candidates
309	#endif
310
311	#define KHU_SIMP_SPIVMP_G0147 1 // Simplification on Sub-PU level temporal interview motion prediction
312
313	#if H_3D_SPIVMP
314	#define QC_SPIVMP_MPI_G0119 1 // Sub-PU level MPI merge candidate
315	#endif
316
317	#define QC_DEPTH_MERGE_SIMP_G0127 1 // Remove DV candidate and shifting candidate for depth coding
318	#define SEC_IC_ARP_SIG_G0072 1 // Disabling IC when ARP is enabled, option 1 in JCT3V-G0072, part 2 in JCT3V-G0121
319	#define SCU_HS_VSD_BUGFIX_IMPROV_G0163 1
320	#define SEC_SPIVMP_MCP_SIZE_G0077 1 // Apply SPIVMP only to 2Nx2N partition, JCT3V-G0077
321	#define SEC_DEPTH_DV_DERIVAITON_G0074 1 // Simplification of DV derivation for depth, JCT3V-G0074
322	#define MTK_ARP_REF_SELECTION_G0053 1 // ARP Reference picture selection in JCT3V-G0053
323	#define MTK_ARP_FLAG_CABAC_SIMP_G0061 1 // Use 2 context for ARP flag referring to only left neighbor block in JCT3V-G0061
324	#define MTK_IC_FLAG_CABAC_SIMP_G0061 1 // Use only 1 context for IC flag in JCT3V-G0061
325	#define MTK_NBDV_IVREF_FIX_G0067 1 // Disable IvMC, VSP when IVREF is not available, JCT3V-G0067
326	#endif
327
328	/////////////////////////////////////////////////////////////////////////////////////////
329	/////////////////////////////////// HTM-10.1 Integrations //////////////////////////////
330	/////////////////////////////////////////////////////////////////////////////////////////
331
332
333	// TBD
334
335	// #define H_MV_HLS_7_ED_FIX_P0130_34 0 // (ED.FIX/P0130/il ref pic set no reference pic) #34 For proposal 5, delegated to editors
336	// #define H_MV_HLS_7_OTHER_P0187_1 0 // (OTHER/P0187/NoOutputOfPriorPicsFlag) #1 Inference of NoOutputOfPriorPicsFlag and proposes to take into account colour format and bit depth for the inference in addition to spatial resolution
337	#define H_MV_HLS_7_VPS_P0306_22 0 // (VPS/P0306/ue(v) coded syntax elements) #22 Several minor modifications to the VPS syntax, consistent with eliminating the previous intention to avoid ue(v) parsing in the VPS
338	// #define H_MV_HLS_7_SEI_P0133_28 0 // (SEI/P0133/Recovery point SEI) #28 Decision: Adopt change to recover point semantics only (-v3)
339	#define H_MV_HLS_7_VPS_P0125_24 1 // (VPS/P0125/VPS extension offset ) #24 Decision: Keep it as a reserved FFFF value.
340	#define H_MV_HLS_7_VPS_P0307_23 1 // (VPS/P0307/VPS VUI extension) #23 Decision: Adopt modification in P0307.
341	#define H_MV_HLS_7_POC_P0041 1 // Syntax related to POC reset
342	// #define H_MV_HLS_7_POC_P0041_3 0 // (POC/P0041/POC reset) #3 It was remarked that we should require each non-IRAP picture that has discardable_flag equal to 1 to have NUT value indicating that it is a sub-layer non-reference picture. This was agreed. Decision: Adopt (with constraint for discardable_flag as described above)
343	// #define H_MV_HLS_7_POC_P0041_FIXES 0 // (POC/P0041/Fixes) For each non-IRAP picture that has discardable_flag equal to 1 to have NUT value indicating that it is a sub-layer non-reference picture.
344	#define H_MV_HLS_7_SEI_P0204_26 1 // (SEI/P0204/sub-bitstream SEI) #26 Add sub-bitstream property SEI message. Decision: Adopt
345	#define H_MV_HLS_7_MISC_P0130_20 1 // (MISC/P0130/discardable not in inter-layer RPS) #20 Add constraint restricting pictures marked as discardable from being present in the temporal or inter-layer RPS,
346
347
348	// #define H_MV_HLS_7_SEI_P0123_25 0 // (SEI/P0123/Alpha channel info) #25 Add alpha channel information SEI message Decision: Adopt. Constrain the bit depth indicated to be equal to the coded bit depth of the aux picture.
349	// #define H_MV_HLS_7_VPS_P0300_27 0 // Output part only. (VPS/P0300/alt output layer flag) #27 Change alt output layer flag to be signalled within the loop of output layer sets, from JCTVC-P0300-v2. Decision: Adopt.
350	// #define H_MV_HLS_7_POC_P0056_4 0 // (POC/P0056/layer tree poc) #4 Proposal 1: If the POC reset approach is adopted as the basis for multi-layer POC derivation, it is proposed to derive the POC anchor picture from the previous TID0 picture (that is not a RASL picture, a RADL picture or a sub-layer non-reference picture and not with discardable_flag equal to 1) of the current layer or any of its reference layer. This is asserted to improve loss resilience and reduce bit rate overhead. Decision: Adopt Proposal 1 (with the suggested modifications with text provided as P0297).
351	// #define H_MV_HLS_7_HRD_P0138_6 0 // (HRD/P0138/HRD parameters for bitstreams excluding) #6 Decision: Adopt (as revised in updated contribution, with the specification of a flag in the BP SEI (HRD/P0192/sub-DPB) #12 Establish sub-DPBs based on the representation format indicated at the VPS level. It was suggested that the expressed shared capacity limit would need to be less than or equal to the sum of the individual capacity limits. Decision: Adopt as modified. Further study is encouraged on profile/level constraint selections.
352
353
354
355
356
357	#define H_MV_HLS7_GEN 0 // General changes (not tested)
358	#define H_MV_HLS_7_OUTPUT_LAYERS_5_10_22_27 1 // Output layer sets, various
359	// (VPS/P0300/alt output layer flag) #27 Change alt output layer flag to be signalled within the loop of output layer sets, from JCTVC-P0300-v2. Decision: Adopt.
360	// (VPS/P0156/Num of output_layer_flag) #10 Proposal 3: The output_layer_flag[ i ][ j ] is signalled for j equal to 0 to NumLayersInIdList[ lsIdx ] inclusive. It was remarked that we might be able to just assume that the top layer is always output; however, this was not entirely clear , so the safe thing to do may be to also send the flag for this layer.
361	// (VPS/P0295/Default output layer sets) #5 Discussion from (P0110). Decision: Three-state approach (text in P0295, decoder shall allow 3 to be present and shall treat 3 the same as the value 2).
362
363
364	#define H_MV_HLS_7_HRD_P0156_7 1 // (HRD/P0156/MaxSubLayersInLayerSetMinus1) #7 Proposal 1: signal, in the VPS extension, the DPB parameters for an output layer set for sub-DPBs only up to the maximum temporal sub-layers in the corresponding layer set
365	#define H_MV_HLS_7_VPS_P0048_14 1 // (VPS/P0048/profile_ref_minus1 rem) #14 Remove profile_ref_minus1 from the VPS extension, from JCTVC-P0048
366	#define H_MV_HLS_7_VPS_P0076_15 1 // (VPS/P0076/video signal info move) #15 Move video signal information syntax structure earlier in the VPS VUI.
367	#define H_MV_HLS_7_SPS_P0155_16_32 1 // (SPS/P0155/sps_sub_layer_ordering_info) #16, #32 Not signal the sps_max_num_reorder_pics[], sps_max_latency_increase_plus1[], and sps_max_dec_pic_buffering_minus1[] syntax elements in the SPS when nuh_layer_id > 0.
368	#define H_MV_HLS_7_GEN_P0166_PPS_EXTENSION 1 // (GEN/P0166/pps_extension) #17 Add PPS extension type flags for conditional presence of syntax extensions per extension type, aligned with the SPS extension type flags, from JCTVC-P0166. Further align the SPS extension type flags syntax between RExt and MV-HEVC/SHVC
369	#define H_MV_HLS_7_FIX_SET_DPB_SIZE 1 // Fix derivation dpb size parameters
370	#define H_MV_HLS_7_RESERVED_FLAGS 1 // Added flags
371	// (SPS/P0312/SHVC reserved flag) The flag will be used for the syntax vert_phase_position_enable_flag in SHVC draft
372	// (VPS/O0215/SHVC reserved flag): this flag will be used for the syntax cross_layer_phase_alignment_flag in SHVC draft.
373	// (VPS VUI/O0199,P0312/SHVC reserved flags) the 3 reserved bits will be used for the syntaxes single_layer_for_non_irap_flag, higher_layer_irap_skip_flag and vert_phase_position_not_in_use_flag in SHVC draft.
374	#define H_MV_FIX_VPS_LAYER_ID_NOT_EQUAL_ZERO 1 // Discard VPS with nuh_layer_Id > 0
375	#define H_MV_HLS_7_MISC_P0130_EOS 1 // (MISC/P0130/EOS NAL layer id) #19 Require that end of bitstream NAL unit shall have nuh_layer_id equal to 0, from JCTVC-P0130. Decoders shall allow an end of bitstream NAL unit with nuh_layer_id > 0 to be present, and shall ignore the NAL unit.
376	#define H_MV_HLS_7_MISC_P0182_13 1 // (MISC/P0182/BL PS Compatibility flag) #13 Define the flag (in VPS VUI) with the proposed semantics, without specifying an associated extraction process. Editors to select the position in the VPS VUI.
377	#define H_MV_HLS_7_MISC_P0068_21 1 // (MISC/P0068/all irap idr flag) #21 Add flag in VUI to indicate that all IRAP pictures are IDRs and that all layer pictures in an AU are IDR aligned, from JCTVC-P0068 proposal 1.
378	#define H_MV_HLS_7_FIX_INFER_CROSS_LAYER_IRAP_ALIGNED_FLAG 1 // Fix inference of cross_layer_irap_aligned_flag
379	#define H_MV_HLS_7_MISC_P0079_18 1 // (MISC/P0079/NumActiveRefLayerPics) #18 Modification of derivation of variable NumActiveRefLayerPics.
380	#define FIX_CAM_PARS_COLLECTOR 1
381	#define UPDATE_HM13 1 // Only some parts in H_3D parts are marked!
382	#if H_3D
383	#define H_3D_FIX_G0148_BRACE 1
384	#endif
385	/////////////////////////////////////////////////////////////////////////////////////////
386	/////////////////////////////////// HM RELATED DEFINES ////////////////////////////////
387	/////////////////////////////////////////////////////////////////////////////////////////
388	#define BUGFIX_INTRAPERIOD 1
389	#define SAO_ENCODE_ALLOW_USE_PREDEBLOCK 1
390
391	#define FIX1172 1 ///< fix ticket #1172
392
393	#define MAX_NUM_PICS_IN_SOP 1024
394
395	#define MAX_NESTING_NUM_OPS 1024
396	#define MAX_NESTING_NUM_LAYER 64
397
398	#define MAX_VPS_NUM_HRD_PARAMETERS 1
399	#define MAX_VPS_OP_SETS_PLUS1 1024
400	#if H_MV
401	#define MAX_VPS_NUH_LAYER_ID_PLUS1 63
402	#define MAX_NUM_SCALABILITY_TYPES 16
403	#define ENC_CFG_CONSOUT_SPACE 29
404	#else
405	#define MAX_VPS_NUH_RESERVED_ZERO_LAYER_ID_PLUS1 1
406	#endif
407
408
409	#define MAX_CPB_CNT 32 ///< Upper bound of (cpb_cnt_minus1 + 1)
410	#if H_MV
411	#define MAX_NUM_LAYER_IDS 63
412	#define MAX_NUM_LAYERS 63
413	#define MAX_VPS_PROFILE_TIER_LEVEL 64
414	#define MAX_VPS_ADD_OUTPUT_LAYER_SETS 1024
415	#define MAX_VPS_OUTPUTLAYER_SETS ( MAX_VPS_ADD_OUTPUT_LAYER_SETS + MAX_VPS_OP_SETS_PLUS1 )
416	#define MAX_NUM_VIDEO_SIGNAL_INFO 16
417	#define MAX_NUM_SCALED_REF_LAYERS MAX_NUM_LAYERS-1
418	#define MAX_NUM_BSP_HRD_PARAMETERS 100 ///< Maximum value is actually not specified
419	#define MAX_NUM_BITSTREAM_PARTITIONS 100 ///< Maximum value is actually not specified
420	#define MAX_NUM_BSP_SCHED_COMBINATION 100 ///< Maximum value is actually not specified
421	#if H_MV_HLS_7_SEI_P0204_26
422	#define MAX_SUB_STREAMS 1024
423	#endif
424	#else
425	#define MAX_NUM_LAYER_IDS 64
426	#endif
427
428	#define COEF_REMAIN_BIN_REDUCTION 3 ///< indicates the level at which the VLC
429	///< transitions from Golomb-Rice to TU+EG(k)
430
431	#define CU_DQP_TU_CMAX 5 ///< max number bins for truncated unary
432	#define CU_DQP_EG_k 0 ///< expgolomb order
433
434	#define SBH_THRESHOLD 4 ///< I0156: value of the fixed SBH controlling threshold
435
436	#define SEQUENCE_LEVEL_LOSSLESS 0 ///< H0530: used only for sequence or frame-level lossless coding
437
438	#define DISABLING_CLIP_FOR_BIPREDME 1 ///< Ticket #175
439
440	#define C1FLAG_NUMBER 8 // maximum number of largerThan1 flag coded in one chunk : 16 in HM5
441	#define C2FLAG_NUMBER 1 // maximum number of largerThan2 flag coded in one chunk: 16 in HM5
442	#define SAO_ENCODING_CHOICE 1 ///< I0184: picture early termination
443	#if SAO_ENCODING_CHOICE
444	#define SAO_ENCODING_RATE 0.75
445	#define SAO_ENCODING_CHOICE_CHROMA 1 ///< J0044: picture early termination Luma and Chroma are handled separately
446	#if SAO_ENCODING_CHOICE_CHROMA
447	#define SAO_ENCODING_RATE_CHROMA 0.5
448	#endif
449	#endif
450
451	#define MAX_NUM_VPS 16
452	#define MAX_NUM_SPS 16
453	#define MAX_NUM_PPS 64
454
455	#define RDOQ_CHROMA_LAMBDA 1 ///< F386: weighting of chroma for RDOQ
456
457	#define MIN_SCAN_POS_CROSS 4
458
459	#define FAST_BIT_EST 1 ///< G763: Table-based bit estimation for CABAC
460
461	#define MLS_GRP_NUM 64 ///< G644 : Max number of coefficient groups, max(16, 64)
462	#define MLS_CG_SIZE 4 ///< G644 : Coefficient group size of 4x4
463
464	#define ADAPTIVE_QP_SELECTION 1 ///< G382: Adaptive reconstruction levels, non-normative part for adaptive QP selection
465	#if ADAPTIVE_QP_SELECTION
466	#define ARL_C_PRECISION 7 ///< G382: 7-bit arithmetic precision
467	#define LEVEL_RANGE 30 ///< G382: max coefficient level in statistics collection
468	#endif
469
470	#define HHI_RQT_INTRA_SPEEDUP 1 ///< tests one best mode with full rqt
471	#define HHI_RQT_INTRA_SPEEDUP_MOD 0 ///< tests two best modes with full rqt
472
473	#if HHI_RQT_INTRA_SPEEDUP_MOD && !HHI_RQT_INTRA_SPEEDUP
474	#error
475	#endif
476
477	#define VERBOSE_RATE 0 ///< Print additional rate information in encoder
478
479	#define AMVP_DECIMATION_FACTOR 4
480
481	#define SCAN_SET_SIZE 16
482	#define LOG2_SCAN_SET_SIZE 4
483
484	#define FAST_UDI_MAX_RDMODE_NUM 35 ///< maximum number of RD comparison in fast-UDI estimation loop
485
486	#define ZERO_MVD_EST 0 ///< Zero Mvd Estimation in normal mode
487
488	#define NUM_INTRA_MODE 36
489	#if !REMOVE_LM_CHROMA
490	#define LM_CHROMA_IDX 35
491	#endif
492
493	#define WRITE_BACK 1 ///< Enable/disable the encoder to replace the deltaPOC and Used by current from the config file with the values derived by the refIdc parameter.
494	#define AUTO_INTER_RPS 1 ///< Enable/disable the automatic generation of refIdc from the deltaPOC and Used by current from the config file.
495	#define PRINT_RPS_INFO 0 ///< Enable/disable the printing of bits used to send the RPS.
496	// using one nearest frame as reference frame, and the other frames are high quality (POC%4==0) frames (1+X)
497	// this should be done with encoder only decision
498	// but because of the absence of reference frame management, the related code was hard coded currently
499
500	#define RVM_VCEGAM10_M 4
501
502	#define PLANAR_IDX 0
503	#define VER_IDX 26 // index for intra VERTICAL mode
504	#define HOR_IDX 10 // index for intra HORIZONTAL mode
505	#define DC_IDX 1 // index for intra DC mode
506	#define NUM_CHROMA_MODE 5 // total number of chroma modes
507	#define DM_CHROMA_IDX 36 // chroma mode index for derived from luma intra mode
508
509
510	#define FAST_UDI_USE_MPM 1
511
512	#define RDO_WITHOUT_DQP_BITS 0 ///< Disable counting dQP bits in RDO-based mode decision
513
514	#define FULL_NBIT 0 ///< When enabled, compute costs using full sample bitdepth. When disabled, compute costs as if it is 8-bit source video.
515	#if FULL_NBIT
516	# define DISTORTION_PRECISION_ADJUSTMENT(x) 0
517	#else
518	# define DISTORTION_PRECISION_ADJUSTMENT(x) (x)
519	#endif
520
521	#define LOG2_MAX_NUM_COLUMNS_MINUS1 7
522	#define LOG2_MAX_NUM_ROWS_MINUS1 7
523	#define LOG2_MAX_COLUMN_WIDTH 13
524	#define LOG2_MAX_ROW_HEIGHT 13
525
526	#define MATRIX_MULT 0 // Brute force matrix multiplication instead of partial butterfly
527
528	#define REG_DCT 65535
529
530	#define AMP_SAD 1 ///< dedicated SAD functions for AMP
531	#define AMP_ENC_SPEEDUP 1 ///< encoder only speed-up by AMP mode skipping
532	#if AMP_ENC_SPEEDUP
533	#define AMP_MRG 1 ///< encoder only force merge for AMP partition (no motion search for AMP)
534	#endif
535
536	#define CABAC_INIT_PRESENT_FLAG 1
537
538	// ====================================================================================================================
539	// Basic type redefinition
540	// ====================================================================================================================
541
542	typedef void Void;
543	typedef bool Bool;
544
545	#ifdef __arm__
546	typedef signed char Char;
547	#else
548	typedef char Char;
549	#endif
550	typedef unsigned char UChar;
551	typedef short Short;
552	typedef unsigned short UShort;
553	typedef int Int;
554	typedef unsigned int UInt;
555	typedef double Double;
556	typedef float Float;
557
558	// ====================================================================================================================
559	// 64-bit integer type
560	// ====================================================================================================================
561
562	#ifdef _MSC_VER
563	typedef __int64 Int64;
564
565	#if _MSC_VER <= 1200 // MS VC6
566	typedef __int64 UInt64; // MS VC6 does not support unsigned __int64 to double conversion
567	#else
568	typedef unsigned __int64 UInt64;
569	#endif
570
571	#else
572
573	typedef long long Int64;
574	typedef unsigned long long UInt64;
575
576	#endif
577
578	// ====================================================================================================================
579	// Type definition
580	// ====================================================================================================================
581
582	typedef UChar Pxl; ///< 8-bit pixel type
583	typedef Short Pel; ///< 16-bit pixel type
584	typedef Int TCoeff; ///< transform coefficient
585
586	#if H_3D_VSO
587	// ====================================================================================================================
588	// Define Distortion Types
589	// ====================================================================================================================
590	typedef Int64 RMDist; ///< renderer model distortion
591
592	#if H_3D_VSO_DIST_INT
593	typedef Int64 Dist; ///< RDO distortion
594	typedef Int64 Dist64;
595	#define RDO_DIST_MIN MIN_INT
596	#define RDO_DIST_MAX MAX_INT
597	#else
598	typedef UInt Dist; ///< RDO distortion
599	typedef UInt64 Dist;
600	#define RDO_DIST_MIN 0
601	#define RDO_DIST_MAX MAX_UINT
602	#endif
603	#endif
604	/// parameters for adaptive loop filter
605	class TComPicSym;
606
607	// Slice / Slice segment encoding modes
608	enum SliceConstraint
609	{
610	NO_SLICES = 0, ///< don't use slices / slice segments
611	FIXED_NUMBER_OF_LCU = 1, ///< Limit maximum number of largest coding tree blocks in a slice / slice segments
612	FIXED_NUMBER_OF_BYTES = 2, ///< Limit maximum number of bytes in a slice / slice segment
613	FIXED_NUMBER_OF_TILES = 3, ///< slices / slice segments span an integer number of tiles
614	};
615
616	enum SAOComponentIdx
617	{
618	SAO_Y =0,
619	SAO_Cb,
620	SAO_Cr,
621	NUM_SAO_COMPONENTS
622	};
623
624	enum SAOMode //mode
625	{
626	SAO_MODE_OFF = 0,
627	SAO_MODE_NEW,
628	SAO_MODE_MERGE,
629	NUM_SAO_MODES
630	};
631
632	enum SAOModeMergeTypes
633	{
634	SAO_MERGE_LEFT =0,
635	SAO_MERGE_ABOVE,
636	NUM_SAO_MERGE_TYPES
637	};
638
639
640	enum SAOModeNewTypes
641	{
642	SAO_TYPE_START_EO =0,
643	SAO_TYPE_EO_0 = SAO_TYPE_START_EO,
644	SAO_TYPE_EO_90,
645	SAO_TYPE_EO_135,
646	SAO_TYPE_EO_45,
647
648	SAO_TYPE_START_BO,
649	SAO_TYPE_BO = SAO_TYPE_START_BO,
650
651	NUM_SAO_NEW_TYPES
652	};
653	#define NUM_SAO_EO_TYPES_LOG2 2
654
655	enum SAOEOClasses
656	{
657	SAO_CLASS_EO_FULL_VALLEY = 0,
658	SAO_CLASS_EO_HALF_VALLEY = 1,
659	SAO_CLASS_EO_PLAIN = 2,
660	SAO_CLASS_EO_HALF_PEAK = 3,
661	SAO_CLASS_EO_FULL_PEAK = 4,
662	NUM_SAO_EO_CLASSES,
663	};
664
665
666	#define NUM_SAO_BO_CLASSES_LOG2 5
667	enum SAOBOClasses
668	{
669	//SAO_CLASS_BO_BAND0 = 0,
670	//SAO_CLASS_BO_BAND1,
671	//SAO_CLASS_BO_BAND2,
672	//...
673	//SAO_CLASS_BO_BAND31,
674
675	NUM_SAO_BO_CLASSES = (1<<NUM_SAO_BO_CLASSES_LOG2),
676	};
677	#define MAX_NUM_SAO_CLASSES 32 //(NUM_SAO_EO_GROUPS > NUM_SAO_BO_GROUPS)?NUM_SAO_EO_GROUPS:NUM_SAO_BO_GROUPS
678
679	struct SAOOffset
680	{
681	Int modeIdc; //NEW, MERGE, OFF
682	Int typeIdc; //NEW: EO_0, EO_90, EO_135, EO_45, BO. MERGE: left, above
683	Int typeAuxInfo; //BO: starting band index
684	Int offset[MAX_NUM_SAO_CLASSES];
685
686	SAOOffset();
687	~SAOOffset();
688	Void reset();
689
690	const SAOOffset& operator= (const SAOOffset& src);
691	};
692
693	struct SAOBlkParam
694	{
695
696	SAOBlkParam();
697	~SAOBlkParam();
698	Void reset();
699	const SAOBlkParam& operator= (const SAOBlkParam& src);
700	SAOOffset& operator[](Int compIdx){ return offsetParam[compIdx];}
701	private:
702	SAOOffset offsetParam[NUM_SAO_COMPONENTS];
703
704	};
705
706	/// parameters for deblocking filter
707	typedef struct _LFCUParam
708	{
709	Bool bInternalEdge; ///< indicates internal edge
710	Bool bLeftEdge; ///< indicates left edge
711	Bool bTopEdge; ///< indicates top edge
712	} LFCUParam;
713
714	// ====================================================================================================================
715	// Enumeration
716	// ====================================================================================================================
717
718	/// supported slice type
719	enum SliceType
720	{
721	B_SLICE,
722	P_SLICE,
723	I_SLICE
724	};
725
726	/// chroma formats (according to semantics of chroma_format_idc)
727	enum ChromaFormat
728	{
729	CHROMA_400 = 0,
730	CHROMA_420 = 1,
731	CHROMA_422 = 2,
732	CHROMA_444 = 3
733	};
734
735	/// supported partition shape
736	enum PartSize
737	{
738	SIZE_2Nx2N, ///< symmetric motion partition, 2Nx2N
739	SIZE_2NxN, ///< symmetric motion partition, 2Nx N
740	SIZE_Nx2N, ///< symmetric motion partition, Nx2N
741	SIZE_NxN, ///< symmetric motion partition, Nx N
742	SIZE_2NxnU, ///< asymmetric motion partition, 2Nx( N/2) + 2Nx(3N/2)
743	SIZE_2NxnD, ///< asymmetric motion partition, 2Nx(3N/2) + 2Nx( N/2)
744	SIZE_nLx2N, ///< asymmetric motion partition, ( N/2)x2N + (3N/2)x2N
745	SIZE_nRx2N, ///< asymmetric motion partition, (3N/2)x2N + ( N/2)x2N
746	SIZE_NONE = 15
747	};
748
749	/// supported prediction type
750	enum PredMode
751	{
752	MODE_INTER, ///< inter-prediction mode
753	MODE_INTRA, ///< intra-prediction mode
754	MODE_NONE = 15
755	};
756
757	/// texture component type
758	enum TextType
759	{
760	TEXT_LUMA, ///< luma
761	TEXT_CHROMA, ///< chroma (U+V)
762	TEXT_CHROMA_U, ///< chroma U
763	TEXT_CHROMA_V, ///< chroma V
764	TEXT_ALL, ///< Y+U+V
765	TEXT_NONE = 15
766	};
767
768	/// reference list index
769	enum RefPicList
770	{
771	REF_PIC_LIST_0 = 0, ///< reference list 0
772	REF_PIC_LIST_1 = 1, ///< reference list 1
773	REF_PIC_LIST_X = 100 ///< special mark
774	};
775
776	/// distortion function index
777	enum DFunc
778	{
779	DF_DEFAULT = 0,
780	DF_SSE = 1, ///< general size SSE
781	DF_SSE4 = 2, ///< 4xM SSE
782	DF_SSE8 = 3, ///< 8xM SSE
783	DF_SSE16 = 4, ///< 16xM SSE
784	DF_SSE32 = 5, ///< 32xM SSE
785	DF_SSE64 = 6, ///< 64xM SSE
786	DF_SSE16N = 7, ///< 16NxM SSE
787
788	DF_SAD = 8, ///< general size SAD
789	DF_SAD4 = 9, ///< 4xM SAD
790	DF_SAD8 = 10, ///< 8xM SAD
791	DF_SAD16 = 11, ///< 16xM SAD
792	DF_SAD32 = 12, ///< 32xM SAD
793	DF_SAD64 = 13, ///< 64xM SAD
794	DF_SAD16N = 14, ///< 16NxM SAD
795
796	DF_SADS = 15, ///< general size SAD with step
797	DF_SADS4 = 16, ///< 4xM SAD with step
798	DF_SADS8 = 17, ///< 8xM SAD with step
799	DF_SADS16 = 18, ///< 16xM SAD with step
800	DF_SADS32 = 19, ///< 32xM SAD with step
801	DF_SADS64 = 20, ///< 64xM SAD with step
802	DF_SADS16N = 21, ///< 16NxM SAD with step
803
804	DF_HADS = 22, ///< general size Hadamard with step
805	DF_HADS4 = 23, ///< 4xM HAD with step
806	DF_HADS8 = 24, ///< 8xM HAD with step
807	DF_HADS16 = 25, ///< 16xM HAD with step
808	DF_HADS32 = 26, ///< 32xM HAD with step
809	DF_HADS64 = 27, ///< 64xM HAD with step
810	DF_HADS16N = 28, ///< 16NxM HAD with step
811	#if H_3D_VSO
812	DF_VSD = 29, ///< general size VSD
813	DF_VSD4 = 30, ///< 4xM VSD
814	DF_VSD8 = 31, ///< 8xM VSD
815	DF_VSD16 = 32, ///< 16xM VSD
816	DF_VSD32 = 33, ///< 32xM VSD
817	DF_VSD64 = 34, ///< 64xM VSD
818	DF_VSD16N = 35, ///< 16NxM VSD
819	#endif
820
821	#if AMP_SAD
822	DF_SAD12 = 43,
823	DF_SAD24 = 44,
824	DF_SAD48 = 45,
825
826	DF_SADS12 = 46,
827	DF_SADS24 = 47,
828	DF_SADS48 = 48,
829
830	DF_SSE_FRAME = 50 ///< Frame-based SSE
831	#else
832	DF_SSE_FRAME = 33 ///< Frame-based SSE
833	#endif
834	};
835
836	/// index for SBAC based RD optimization
837	enum CI_IDX
838	{
839	CI_CURR_BEST = 0, ///< best mode index
840	CI_NEXT_BEST, ///< next best index
841	CI_TEMP_BEST, ///< temporal index
842	CI_CHROMA_INTRA, ///< chroma intra index
843	CI_QT_TRAFO_TEST,
844	CI_QT_TRAFO_ROOT,
845	CI_NUM, ///< total number
846	};
847
848	/// motion vector predictor direction used in AMVP
849	enum MVP_DIR
850	{
851	MD_LEFT = 0, ///< MVP of left block
852	MD_ABOVE, ///< MVP of above block
853	MD_ABOVE_RIGHT, ///< MVP of above right block
854	MD_BELOW_LEFT, ///< MVP of below left block
855	MD_ABOVE_LEFT ///< MVP of above left block
856	};
857
858	/// coefficient scanning type used in ACS
859	enum COEFF_SCAN_TYPE
860	{
861	SCAN_DIAG = 0, ///< up-right diagonal scan
862	SCAN_HOR, ///< horizontal first scan
863	SCAN_VER ///< vertical first scan
864	};
865
866	namespace Profile
867	{
868	enum Name
869	{
870	NONE = 0,
871	MAIN = 1,
872	MAIN10 = 2,
873	MAINSTILLPICTURE = 3,
874	#if H_MV
875	MAINSTEREO = 4,
876	MAINMULTIVIEW = 5,
877	#if H_3D
878	MAIN3D = 6,
879	#endif
880	#endif
881	};
882	}
883
884	namespace Level
885	{
886	enum Tier
887	{
888	MAIN = 0,
889	HIGH = 1,
890	};
891
892	enum Name
893	{
894	NONE = 0,
895	LEVEL1 = 30,
896	LEVEL2 = 60,
897	LEVEL2_1 = 63,
898	LEVEL3 = 90,
899	LEVEL3_1 = 93,
900	LEVEL4 = 120,
901	LEVEL4_1 = 123,
902	LEVEL5 = 150,
903	LEVEL5_1 = 153,
904	LEVEL5_2 = 156,
905	LEVEL6 = 180,
906	LEVEL6_1 = 183,
907	LEVEL6_2 = 186,
908	};
909	}
910	//! \}
911
912	#if H_MV
913
914	#if H_MV_HLS_7_GEN_P0166_PPS_EXTENSION
915	enum PpsExtensionTypes
916	{
917	PPS_EX_T_MV = 0,
918	#if H_3D
919	PPS_EX_T_3D = 3,
920	#endif
921	PPS_EX_T_ESC = 7,
922	PPS_EX_T_MAX_NUM = 8
923	};
924
925	//Below for sps, would be good if this could be aligned
926	#endif
927
928	enum PsExtensionTypes
929	{
930	PS_EX_T_MV = 1,
931	#if H_3D
932	PS_EX_T_3D = 3,
933	#endif
934	PS_EX_T_ESC = 7,
935	PS_EX_T_MAX_NUM = 8
936	};
937
938	/// scalability types
939	enum ScalabilityType
940	{
941	#if H_3D
942	DEPTH_ID = 0,
943	#endif
944	VIEW_ORDER_INDEX = 1,
945	};
946	#endif
947	#if H_3D
948	// Renderer
949	enum BlenMod
950	{
951	BLEND_NONE = -1,
952	BLEND_AVRG = 0,
953	BLEND_LEFT = 1,
954	BLEND_RIGHT = 2,
955	BLEND_GEN = 3
956	};
957
958
959	enum
960	{
961	VIEWPOS_INVALID = -1,
962	VIEWPOS_LEFT = 0,
963	VIEWPOS_RIGHT = 1,
964	VIEWPOS_MERGED = 2
965	};
966
967	#define Log2( n ) ( log((double)n) / log(2.0) ) // Ed.(GT): This is very very bad and should be fixed to used integer arithmetics ( see gCeilLog2 ) moreover it should not be defined in the tool macro section!
968	#endif
969	#endif

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