source: 3DVCSoftware/branches/HTM-10.0-dev0/source/Lib/TLibCommon/TypeDef.h @ 866

Last change on this file since 866 was 866, checked in by qualcomm, 10 years ago

POC-related in PPS (Macro: H_MV_HLS_7_POC_P0041)

POC-related signaling in PPS tested and included. SH signaling in a subsequent patch.

From: Adarsh K. Ramasubramonian <aramasub@…>

  • Property svn:eol-style set to native
File size: 44.0 KB
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33
34/** \file     TypeDef.h
35    \brief    Define basic types, new types and enumerations
36*/
37
38#ifndef _TYPEDEF__
39#define _TYPEDEF__
40
41//! \ingroup TLibCommon
42//! \{
43/////////////////////////////////////////////////////////////////////////////////////////
44///////////////////////////////// EXTENSION SELECTION /////////////////////////////////// 
45/////////////////////////////////////////////////////////////////////////////////////////
46
47/* HEVC_EXT might be defined by compiler/makefile options.
48   
49   Linux makefiles support the following settings:   
50   make             -> HEVC_EXT not defined   
51   make HEVC_EXT=0  -> H_MV=0 H_3D=0   --> plain HM
52   make HEVC_EXT=1  -> H_MV=1 H_3D=0   --> MV only
53   make HEVC_EXT=2  -> H_MV=1 H_3D=1   --> full 3D
54*/
55
56#ifndef HEVC_EXT
57#define HEVC_EXT                    1
58#endif
59
60#if ( HEVC_EXT < 0 )||( HEVC_EXT > 2 )
61#error HEVC_EXT must be in the range of 0 to 2, inclusive.
62#endif
63
64#define H_MV          ( HEVC_EXT != 0)
65#define H_3D          ( HEVC_EXT == 2)
66
67
68/////////////////////////////////////////////////////////////////////////////////////////
69///////////////////////////////////   MAJOR DEFINES   /////////////////////////////////// 
70/////////////////////////////////////////////////////////////////////////////////////////
71
72#if H_MV
73#define H_MV_ENC_DEC_TRAC                 1  //< CU/PU level tracking
74#endif
75
76#if H_3D
77#define H_3D_QTLPC                        1   // OL_QTLIMIT_PREDCODING_B0068 //JCT3V-B0068
78                                              // HHI_QTLPC_RAU_OFF_C0160     // JCT3V-C0160 change 2: quadtree limitation and predictive coding switched off in random access units
79
80#define H_3D_VSO                          1   // VSO, View synthesis optimization, includes:
81                                              // HHI_VSO
82                                              // HHI_VSO_LS_TABLE_M23714 enable table base Lagrange multiplier optimization
83                                              // SAIT_VSO_EST_A0033, JCT3V-A0033 modification 3
84                                              // LGE_WVSO_A0119
85#define H_3D_NBDV                         1   // Neighboring block disparity derivation
86                                              // QC_JCT3V-A0097
87                                              // LGE_DVMCP_A0126
88                                              // LGE_DVMCP_MEM_REDUCTION_B0135     
89                                              // QC_SIMPLE_NBDV_B0047
90                                              // FIX_LGE_DVMCP_B0133
91                                              // QC_NBDV_LDB_FIX_C0055
92                                              // MTK_SAIT_TEMPORAL_FIRST_ORDER_C0141_C0097
93                                              // MTK_SIMPLIFY_DVTC_C0135           
94                                              // QC_CU_NBDV_D0181
95                                              // SEC_DEFAULT_DV_D0112
96                                              // MTK_DVMCP_FIX_E0172       fix the mismatch between software and WD for DV derivation from DVMCP blocks, issue 2 in JCT3V-E0172
97                                              // SEC_SIMPLIFIED_NBDV_E0142 Simplified NBDV, JCT3V-E0142 and JCT3V-E0190
98                                              // MTK_NBDV_TN_FIX_E0172     fix the issue of DV derivation from the temporal neighboring blocks, issue 7 in JCT3V-E0172
99                                              // MTK_TEXTURE_MRGCAND_BUGFIX_E0182  Bug fix for TEXTURE MERGING CANDIDATE     , JCT3V-E0182
100#define H_3D_ARP                          1   // Advanced residual prediction (ARP), JCT3V-D0177
101                                              // QC_MTK_INTERVIEW_ARP_F0123_F0108 JCT3V-F0123; JCT3V-F0108
102                                              // SHARP_ARP_REF_CHECK_F0105        ARP reference picture selection and DPB check
103                                              // LGE_ARP_CTX_F0161                JCT3V-F0161
104#define H_3D_IC                           1   // Illumination Compensation, JCT3V-B0045, JCT3V-C0046, JCT3V-D0060
105                                              // Unifying rounding offset, for IC part, JCT3V-D0135
106                                              // Full Pel Interpolation for Depth, HHI_FULL_PEL_DEPTH_MAP_MV_ACC
107                                              // SHARP_ILLUCOMP_REFINE_E0046
108                                              // MTK_CLIPPING_ALIGN_IC_E0168       // To support simplify bi-prediction PU with identical motion checking, JCT3V-E0168
109                                              // LGE_IC_CTX_F0160 //JCT3V-F0160
110                                              // SEC_ONLY_TEXTURE_IC_F0151
111
112#if H_3D_NBDV
113#define H_3D_NBDV_REF                     1   // Depth oriented neighboring block disparity derivation
114                                              // MTK_D0156
115                                              // MERL_D0166: Reference view selection in NBDV & Bi-VSP
116                                              // MERL_C0152: Basic VSP
117                                              // NBDV_DEFAULT_VIEWIDX_BUGFIX Bug fix for invalid default view index for NBDV
118                                              // NTT_DoNBDV_VECTOR_CLIP_E0141 disparity vector clipping in DoNBDV, JCT3V-E0141 and JCT3V-E0209
119#endif
120
121#define H_3D_VSP                          1   // View synthesis prediction
122                                              // MERL_C0152: Basic VSP
123                                              // MERL_D0166: Reference view selection in NBDV & Bi-VSP
124                                              // MTK_D0105, LG_D0139: No VSP for depth
125                                              // QC_D0191: Clean up
126                                              // LG_D0092: Multiple VSP candidate allowed
127                                              // MTK_VSP_FIX_ALIGN_WD_E0172
128                                              // NTT_VSP_ADAPTIVE_SPLIT_E0207 adaptive sub-PU partitioning in VSP, JCT3V-E0207
129                                              // NTT_VSP_DC_BUGFIX_E0208 bugfix for sub-PU based DC in VSP, JCT3V-E0208
130                                              // NTT_VSP_COMMON_E0207_E0208 common part of JCT3V-E0207 and JCT3V-E0208
131                                              // MTK_F0109_LG_F0120_VSP_BLOCK MTK_LG_SIMPLIFY_VSP_BLOCK_PARTITION_F0109_F0120 
132                                              // SHARP_VSP_BLOCK_IN_AMP_F0102 VSP partitioning for AMP
133                                              // MTK_VSP_SIMPLIFICATION_F0111 1. Inherited VSP also use NBDV of current CU, 2. VSP cannot be inherited from above LCU rowss
134                                              // LGE_SHARP_VSP_INHERIT_F0104
135
136#define H_3D_IV_MERGE                     1   // Inter-view motion merge candidate
137                                              // HHI_INTER_VIEW_MOTION_PRED
138                                              // SAIT_IMPROV_MOTION_PRED_M24829, improved inter-view motion vector prediction
139                                              // QC_MRG_CANS_B0048             , JCT3V-B0048, B0086, B0069
140                                              // OL_DISMV_POS_B0069            , different pos for disparity MV candidate, B0069
141                                              // MTK_INTERVIEW_MERGE_A0049     , second part
142                                              // QC_AMVP_MRG_UNIFY_IVCAN_C0051     
143                                              // TEXTURE MERGING CANDIDATE     , JCT3V-C0137
144                                              // QC_INRIA_MTK_MRG_E0126
145                                              // ETRIKHU_MERGE_REUSE_F0093 QC_DEPTH_IV_MRG_F0125, JCT3V-F0125: Depth oriented Inter-view MV candidate
146                                              // EC_MPI_ENABLING_MERGE_F0150, MPI flag in VPS and enabling in Merge mode
147#define H_3D_TMVP                         1   // QC_TMVP_C0047
148                                              // Sony_M23639
149
150#define H_3D_DIM                          1   // DIM, Depth intra modes, includes:
151                                              // HHI_DMM_WEDGE_INTRA
152                                              // HHI_DMM_PRED_TEX
153                                              // FIX_WEDGE_NOFLOAT_D0036
154                                              // LGE_EDGE_INTRA_A0070
155                                              // LGE_DMM3_SIMP_C0044
156                                              // QC_DC_PREDICTOR_D0183
157                                              // HHI_DELTADC_DLT_D0035
158                                              // PKU_QC_DEPTH_INTRA_UNI_D0195
159                                              // RWTH_SDC_DLT_B0036
160                                              // INTEL_SDC64_D0193
161                                              // RWTH_SDC_CTX_SIMPL_D0032
162                                              // LGE_CONCATENATE_D0141
163                                              // FIX_SDC_ENC_RD_WVSO_D0163
164                                              // MTK_SAMPLE_BASED_SDC_D0110
165                                              // SEC_DMM2_E0146_HHIFIX Removal of DMM2 from DMMs
166                                              // ZJU_DEPTH_INTRA_MODE_E0204 Simplified Binarization for depth_intra_mode
167                                              // KWU_SDC_SIMPLE_DC_E0117 Simplified DC calculation for SDC
168                                              // SCU_HS_DMM4_REMOVE_DIV_E0242 DMM4 Division Removal
169                                              // LGE_SDC_REMOVE_DC_E0158 Removal of DC mode from SDC
170                                              // LGE_PKU_DMM3_OVERLAP_E0159_HHIFIX 1   Removal of overlap between DMM3 and DMM1
171                                              // LGE_PRED_RES_CODING_DLT_DOMAIN_F0159 JCT3V-F0159
172                                              // HHI_DIM_PREDSAMP_FIX_F0171
173                                              // SEC_DMM3_RBC_F0147 Removal of DMM3 and RBC from DMMs
174                                              // QC_DIM_DELTADC_UNIFY_F0132 Unify delta DC coding in depth intra modes
175
176#define H_3D_INTER_SDC                    1   // INTER SDC, Inter simplified depth coding
177                                              // LGE_INTER_SDC_E0156  Enable inter SDC for depth coding
178#define H_3D_SPIVMP                       1   // H_3D_SPIVMP    // JCT3V-F0110: Sub-PU level inter-view motion prediction
179#define H_3D_FCO                          0   // Flexible coding order for 3D
180
181
182
183// OTHERS
184                                              // MTK_SONY_PROGRESSIVE_MV_COMPRESSION_E0170 // Progressive MV Compression, JCT3V-E0170
185#define H_3D_REN_MAX_DEV_OUT              0   // Output maximal possible shift deviation
186#define H_3D_FAST_TEXTURE_ENCODING        1   // Fast merge mode decision and early CU determination for texture component of dependent view, JCT3V-E0173
187                                              // MTK_FAST_TEXTURE_ENCODING_E0173
188#if H_3D_DIM
189#define H_3D_FAST_DEPTH_INTRA             1   // Fast DMM and RBC Mode Selection
190                                              // SCU_HS_FAST_DEPTH_INTRA_E0238_HHIFIX
191#endif
192
193// Rate Control
194#define KWU_FIX_URQ                       1
195#define KWU_RC_VIEWRC_E0227               0  ///< JCT3V-E0227, view-wise target bitrate allocation
196#define KWU_RC_MADPRED_E0227              0  ///< JCT3V-E0227, inter-view MAD prediction
197
198#endif // H_3D
199
200
201
202/////////////////////////////////////////////////////////////////////////////////////////
203///////////////////////////////////   DERIVED DEFINES /////////////////////////////////// 
204/////////////////////////////////////////////////////////////////////////////////////////
205
206///// ***** VIEW SYNTHESIS OPTIMIZAION *********
207#if H_3D_VSO                                 
208#define H_3D_VSO_DIST_INT                 1   // Allow negative synthesized view distortion change
209#define H_3D_VSO_COLOR_PLANES             1   // Compute VSO distortion on color planes
210#define H_3D_VSO_EARLY_SKIP               1   // LGE_VSO_EARLY_SKIP_A0093, A0093 modification 4
211#define H_3D_VSO_RM_ASSERTIONS            0   // Output VSO assertions
212#define H_3D_VSO_SYNTH_DIST_OUT           0   // Output of synthesized view distortion instead of depth distortion in encoder output
213#define H_3D_VSO_FIX                      0   // This fix should be enabled after verification
214#endif
215
216////   ****** NEIGHBOURING BLOCK-BASED DISPARITY VECTOR  *********
217#if H_3D_NBDV
218#define DVFROM_LEFT                       0
219#define DVFROM_ABOVE                      1
220#define IDV_CANDS                         2
221#endif
222
223///// ***** ADVANCED INTERVIEW RESIDUAL PREDICTION *********
224#if H_3D_ARP
225#define H_3D_ARP_WFNR                     3
226#endif
227
228///// ***** DEPTH INTRA MODES *********
229#if H_3D_DIM
230#define H_3D_DIM_DMM                      1   // Depth Modeling Modes
231#define H_3D_DIM_SDC                      1   // Simplified Depth Coding method
232#define H_3D_DIM_DLT                      1   // Depth Lookup Table
233
234#if H_3D_DIM_DLT
235#define H_3D_DELTA_DLT                    1
236#endif
237#define H_3D_DIM_ENC                      1   // Depth Intra encoder optimizations, includes:
238                                              // HHI_DEPTH_INTRA_SEARCH_RAU_C0160
239                                              // LG_ZEROINTRADEPTHRESI_A0087
240#endif
241///// ***** VIEW SYNTHESIS PREDICTION *********
242#if H_3D_VSP
243#define H_3D_VSP_BLOCKSIZE                4   // Supported values: 1, 2, and 4
244#if H_3D_VSP_BLOCKSIZE == 1
245#define H_3D_VSP_CONSTRAINED              1   // Constrained VSP @ 1x1
246#else
247#define H_3D_VSP_CONSTRAINED              0
248#endif
249#endif
250
251
252///// ***** ILLUMATION COMPENSATION *********
253#if H_3D_IC
254#define IC_REG_COST_SHIFT                 7
255#define IC_CONST_SHIFT                    5
256#define IC_SHIFT_DIFF                     12
257#endif
258
259
260///// ***** FCO *********
261#if H_3D_FCO
262#define H_3D_FCO_VSP_DONBDV_E0163               1   // Adaptive depth reference for flexible coding order
263#else
264#define H_3D_FCO_VSP_DONBDV_E0163               0   // Adaptive depth reference for flexible coding order
265#endif
266
267#if H_3D
268#define PPS_FIX_DEPTH                           1
269#endif
270
271
272/////////////////////////////////////////////////////////////////////////////////////////
273///////////////////////////////////   HTM-10.0 Integrations //////////////////////////////
274/////////////////////////////////////////////////////////////////////////////////////////
275#if H_3D
276#if  H_3D_QTLPC
277#define MTK_TEX_DEP_PAR_G0055             1   // Texture-partition-dependent depth partition. JCT3V-G0055
278#endif
279
280#define MTK_DDD_G0063                     1   // Disparity derived depth coding
281
282#if H_3D_VSP
283#define MTK_RBIP_VSP_G0069                1   // Restricted bi-prediction for VSP
284#define NTT_STORE_SPDV_VSP_G0148          1   // Storing Sub-PU based DV for VSP
285#endif
286
287#define H_3D_DBBP                         1   // DBBP: Depth-based Block Partitioning and Merging
288
289#if H_3D_DBBP
290#define DBBP_INVALID_SHORT                (-4)
291#define RWTH_DBBP_PACK_MODE               SIZE_2NxN
292#endif
293
294#if H_3D_DIM
295#define QC_PKU_SDC_SPLIT_G0123            1   // Intra SDC Split
296#if QC_PKU_SDC_SPLIT_G0123
297#define HS_TSINGHUA_SDC_SPLIT_G0111       1
298#endif
299#define SCU_HS_DEPTH_DC_PRED_G0143        1
300#define QC_GENERIC_SDC_G0122              1  // Generalize SDC to all depth intra modes
301#if H_3D_DIM_SDC && H_3D_INTER_SDC
302#define QC_SDC_UNIFY_G0130                1  // Unify intra SDC and inter SDC
303#define QC_SDC_UNIFY_G0130_FIX            1  // Fix bug of G0130
304#define QC_SDC_UNIFY_G0130_FIX2           1  // Fix bug of G0130
305#endif
306#define SEC_INTER_SDC_G0101               1  // Improved inter SDC with multiple DC candidates
307#endif
308
309#define KHU_SIMP_SPIVMP_G0147             1  // Simplification on Sub-PU level temporal interview motion prediction
310
311#if H_3D_SPIVMP
312#define QC_SPIVMP_MPI_G0119               1 // Sub-PU level MPI merge candidate
313#endif
314
315#define QC_DEPTH_MERGE_SIMP_G0127         1 // Remove DV candidate and shifting candidate for depth coding
316#define SEC_IC_ARP_SIG_G0072              1   // Disabling IC when ARP is enabled, option 1 in JCT3V-G0072, part 2 in JCT3V-G0121
317#define SCU_HS_VSD_BUGFIX_IMPROV_G0163    1
318#define SEC_SPIVMP_MCP_SIZE_G0077         1  // Apply SPIVMP only to 2Nx2N partition, JCT3V-G0077
319#define SEC_DEPTH_DV_DERIVAITON_G0074     1  // Simplification of DV derivation for depth, JCT3V-G0074
320#define MTK_ARP_REF_SELECTION_G0053       1   // ARP Reference picture selection in JCT3V-G0053
321#define MTK_ARP_FLAG_CABAC_SIMP_G0061     1   // Use 2 context for ARP flag referring to only left neighbor block in JCT3V-G0061
322#define MTK_IC_FLAG_CABAC_SIMP_G0061      1   // Use only 1 context for IC flag in JCT3V-G0061
323#define MTK_NBDV_IVREF_FIX_G0067          1   // Disable IvMC, VSP when IVREF is not available, JCT3V-G0067
324#endif
325
326/////////////////////////////////////////////////////////////////////////////////////////
327///////////////////////////////////   HTM-10.1 Integrations //////////////////////////////
328/////////////////////////////////////////////////////////////////////////////////////////
329
330
331// TBD
332
333// #define H_MV_HLS_7_ED_FIX_P0130_34        0 // (ED.FIX/P0130/il ref pic set no reference pic) #34 For proposal 5, delegated to editors
334// #define H_MV_HLS_7_OTHER_P0187_1          0 // (OTHER/P0187/NoOutputOfPriorPicsFlag) #1 Inference of NoOutputOfPriorPicsFlag and proposes to take into account colour format and bit depth for the inference in addition to spatial resolution
335#define H_MV_HLS_7_VPS_P0306_22           0 // (VPS/P0306/ue(v) coded syntax elements) #22 Several minor modifications to the VPS syntax, consistent with eliminating the previous intention to avoid ue(v) parsing in the VPS
336// #define H_MV_HLS_7_SEI_P0133_28           0 // (SEI/P0133/Recovery point SEI) #28 Decision: Adopt change to recover point semantics only (-v3)
337#define H_MV_HLS_7_VPS_P0125_24           1 // (VPS/P0125/VPS extension offset ) #24 Decision: Keep it as a reserved FFFF value.
338#define H_MV_HLS_7_VPS_P0307_23           1 // (VPS/P0307/VPS VUI extension)  #23 Decision: Adopt modification in P0307.
339#define H_MV_HLS_7_POC_P0041              1 // Syntax related to POC reset
340// #define H_MV_HLS_7_POC_P0041_3            0 // (POC/P0041/POC reset) #3 It was remarked that we should require each non-IRAP picture that has discardable_flag equal to 1 to have NUT value indicating that it is a sub-layer non-reference picture. This was agreed. Decision: Adopt (with constraint for discardable_flag as described above)
341// #define H_MV_HLS_7_POC_P0041_FIXES        0 // (POC/P0041/Fixes) For each non-IRAP picture that has discardable_flag equal to 1 to have NUT value indicating that it is a sub-layer non-reference picture.
342#define H_MV_HLS_7_SEI_P0204_26           1 // (SEI/P0204/sub-bitstream SEI) #26 Add sub-bitstream property SEI message. Decision: Adopt
343#define H_MV_HLS_7_MISC_P0130_20          1 // (MISC/P0130/discardable not in inter-layer RPS) #20 Add constraint restricting pictures marked as discardable from being present in the temporal or inter-layer RPS,
344
345
346// #define H_MV_HLS_7_SEI_P0123_25           0 // (SEI/P0123/Alpha channel info) #25 Add alpha channel information SEI message Decision: Adopt. Constrain the bit depth indicated to be equal to the coded bit depth of the aux picture.
347// #define H_MV_HLS_7_VPS_P0300_27           0 // Output part only. (VPS/P0300/alt output layer flag) #27 Change alt output layer flag to be signalled within the loop of output layer sets, from JCTVC-P0300-v2. Decision: Adopt.
348// #define H_MV_HLS_7_POC_P0056_4            0 // (POC/P0056/layer tree poc) #4 Proposal 1: If the POC reset approach is adopted as the basis for multi-layer POC derivation, it is proposed to derive the POC anchor picture from the previous TID0 picture (that is not a RASL picture, a RADL picture or a sub-layer non-reference picture and not with discardable_flag equal to 1) of  the current layer or any of its reference layer. This is asserted to improve loss resilience and reduce bit rate overhead. Decision: Adopt Proposal 1 (with the suggested modifications – with text provided as P0297).
349// #define H_MV_HLS_7_HRD_P0138_6            0 // (HRD/P0138/HRD parameters for bitstreams excluding) #6 Decision: Adopt (as revised in updated contribution, with the specification of a flag in the BP SEI (HRD/P0192/sub-DPB) #12 Establish sub-DPBs based on the representation format indicated at the VPS level. It was suggested that the expressed shared capacity limit would need to be less than or equal to the sum of the individual capacity limits. Decision: Adopt as modified. Further study is encouraged on profile/level constraint selections.
350
351
352
353
354
355#define H_MV_HLS7_GEN                          0  // General changes (not tested)
356#define H_MV_HLS_7_OUTPUT_LAYERS_5_10_22_27    1  // Output layer sets, various
357                                                  // (VPS/P0300/alt output layer flag) #27 Change alt output layer flag to be signalled within the loop of output layer sets, from JCTVC-P0300-v2. Decision: Adopt.
358                                                  // (VPS/P0156/Num of output_layer_flag) #10 Proposal 3: The output_layer_flag[ i ][ j ] is signalled for j equal to 0 to NumLayersInIdList[ lsIdx ] inclusive. It was remarked that we might be able to just assume that the top layer is always output; however, this was not entirely clear , so the safe thing to do may be to also send the flag for this layer.
359                                                  // (VPS/P0295/Default output layer sets) #5 Discussion from (P0110). Decision: Three-state approach (text in P0295, decoder shall allow 3 to be present and shall treat 3 the same as the value 2).
360
361
362#define H_MV_HLS_7_HRD_P0156_7                 1  // (HRD/P0156/MaxSubLayersInLayerSetMinus1) #7 Proposal 1: signal, in the VPS extension, the DPB parameters for an output layer set for sub-DPBs only up to the maximum temporal sub-layers in the corresponding layer set
363#define H_MV_HLS_7_VPS_P0048_14                1  // (VPS/P0048/profile_ref_minus1 rem) #14 Remove profile_ref_minus1 from the VPS extension, from JCTVC-P0048
364#define H_MV_HLS_7_VPS_P0076_15                1  // (VPS/P0076/video signal info move) #15 Move video signal information syntax structure earlier in the VPS VUI.
365#define H_MV_HLS_7_SPS_P0155_16_32             1  // (SPS/P0155/sps_sub_layer_ordering_info) #16, #32 Not signal the sps_max_num_reorder_pics[], sps_max_latency_increase_plus1[], and sps_max_dec_pic_buffering_minus1[] syntax elements in the SPS when nuh_layer_id > 0.
366#define H_MV_HLS_7_GEN_P0166_PPS_EXTENSION     1  // (GEN/P0166/pps_extension) #17 Add PPS extension type flags for conditional presence of syntax extensions per extension type, aligned with the SPS extension type flags, from JCTVC-P0166. Further align the SPS extension type flags syntax between RExt and MV-HEVC/SHVC
367#define H_MV_HLS_7_FIX_SET_DPB_SIZE            1  // Fix derivation dpb size parameters
368#define H_MV_HLS_7_RESERVED_FLAGS              1  // Added flags
369                                                  // (SPS/P0312/SHVC reserved flag) The flag will be used for the syntax vert_phase_position_enable_flag in SHVC draft
370                                                  // (VPS/O0215/SHVC reserved flag): this flag will be used for the syntax cross_layer_phase_alignment_flag in SHVC draft.
371                                                  // (VPS VUI/O0199,P0312/SHVC reserved flags) the 3 reserved bits will be used for the syntaxes single_layer_for_non_irap_flag, higher_layer_irap_skip_flag and vert_phase_position_not_in_use_flag in SHVC draft.
372#define H_MV_FIX_VPS_LAYER_ID_NOT_EQUAL_ZERO   1  // Discard VPS with nuh_layer_Id > 0
373#define H_MV_HLS_7_MISC_P0130_EOS              1  // (MISC/P0130/EOS NAL layer id) #19 Require that end of bitstream NAL unit shall have nuh_layer_id equal to 0, from JCTVC-P0130. Decoders shall allow an end of bitstream NAL unit with nuh_layer_id > 0 to be present, and shall ignore the NAL unit.
374#define H_MV_HLS_7_MISC_P0182_13               1  // (MISC/P0182/BL PS Compatibility flag) #13 Define the flag (in VPS VUI) with the proposed semantics, without specifying an associated extraction process. Editors to select the position in the VPS VUI.
375#define H_MV_HLS_7_MISC_P0068_21               1  // (MISC/P0068/all irap idr flag) #21 Add flag in VUI to indicate that all IRAP pictures are IDRs and that all layer pictures in an AU are IDR aligned, from JCTVC-P0068 proposal 1.
376#define H_MV_HLS_7_FIX_INFER_CROSS_LAYER_IRAP_ALIGNED_FLAG               1  // Fix inference of cross_layer_irap_aligned_flag
377#define H_MV_HLS_7_MISC_P0079_18               1  // (MISC/P0079/NumActiveRefLayerPics) #18 Modification of derivation of variable NumActiveRefLayerPics.
378#define FIX_CAM_PARS_COLLECTOR                 1
379#define UPDATE_HM13                            1  // Only some parts in H_3D parts are marked!
380#if H_3D
381#define H_3D_FIX_G0148_BRACE              1
382#endif
383/////////////////////////////////////////////////////////////////////////////////////////
384///////////////////////////////////   HM RELATED DEFINES ////////////////////////////////
385/////////////////////////////////////////////////////////////////////////////////////////
386#define BUGFIX_INTRAPERIOD 1
387#define SAO_ENCODE_ALLOW_USE_PREDEBLOCK 1
388
389#define FIX1172 1 ///< fix ticket #1172
390
391#define MAX_NUM_PICS_IN_SOP           1024
392
393#define MAX_NESTING_NUM_OPS         1024
394#define MAX_NESTING_NUM_LAYER       64
395
396#define MAX_VPS_NUM_HRD_PARAMETERS                1
397#define MAX_VPS_OP_SETS_PLUS1                     1024
398#if H_MV
399#define MAX_VPS_NUH_LAYER_ID_PLUS1  63
400#define MAX_NUM_SCALABILITY_TYPES   16
401#define ENC_CFG_CONSOUT_SPACE       29           
402#else
403#define MAX_VPS_NUH_RESERVED_ZERO_LAYER_ID_PLUS1  1
404#endif
405
406
407#define MAX_CPB_CNT                     32  ///< Upper bound of (cpb_cnt_minus1 + 1)
408#if H_MV
409#define MAX_NUM_LAYER_IDS               63
410#define MAX_NUM_LAYERS                  63
411#define MAX_VPS_PROFILE_TIER_LEVEL      64
412#define MAX_VPS_ADD_OUTPUT_LAYER_SETS   1024
413#define MAX_VPS_OUTPUTLAYER_SETS        ( MAX_VPS_ADD_OUTPUT_LAYER_SETS + MAX_VPS_OP_SETS_PLUS1 )
414#define  MAX_NUM_VIDEO_SIGNAL_INFO      16
415#define MAX_NUM_SCALED_REF_LAYERS       MAX_NUM_LAYERS-1
416#define MAX_NUM_BSP_HRD_PARAMETERS      100 ///< Maximum value is actually not specified
417#define MAX_NUM_BITSTREAM_PARTITIONS    100 ///< Maximum value is actually not specified
418#define MAX_NUM_BSP_SCHED_COMBINATION   100 ///< Maximum value is actually not specified
419#if H_MV_HLS_7_SEI_P0204_26
420#define MAX_SUB_STREAMS                 1024
421#endif
422#else
423#define MAX_NUM_LAYER_IDS                64
424#endif
425
426#define COEF_REMAIN_BIN_REDUCTION        3 ///< indicates the level at which the VLC
427                                           ///< transitions from Golomb-Rice to TU+EG(k)
428
429#define CU_DQP_TU_CMAX 5                   ///< max number bins for truncated unary
430#define CU_DQP_EG_k 0                      ///< expgolomb order
431
432#define SBH_THRESHOLD                    4  ///< I0156: value of the fixed SBH controlling threshold
433 
434#define SEQUENCE_LEVEL_LOSSLESS           0  ///< H0530: used only for sequence or frame-level lossless coding
435
436#define DISABLING_CLIP_FOR_BIPREDME         1  ///< Ticket #175
437 
438#define C1FLAG_NUMBER               8 // maximum number of largerThan1 flag coded in one chunk :  16 in HM5
439#define C2FLAG_NUMBER               1 // maximum number of largerThan2 flag coded in one chunk:  16 in HM5
440#define SAO_ENCODING_CHOICE              1  ///< I0184: picture early termination
441#if SAO_ENCODING_CHOICE
442#define SAO_ENCODING_RATE                0.75
443#define SAO_ENCODING_CHOICE_CHROMA       1 ///< J0044: picture early termination Luma and Chroma are handled separately
444#if SAO_ENCODING_CHOICE_CHROMA
445#define SAO_ENCODING_RATE_CHROMA         0.5
446#endif
447#endif
448
449#define MAX_NUM_VPS                16
450#define MAX_NUM_SPS                16
451#define MAX_NUM_PPS                64
452
453#define RDOQ_CHROMA_LAMBDA          1   ///< F386: weighting of chroma for RDOQ
454
455#define MIN_SCAN_POS_CROSS          4
456
457#define FAST_BIT_EST                1   ///< G763: Table-based bit estimation for CABAC
458
459#define MLS_GRP_NUM                         64     ///< G644 : Max number of coefficient groups, max(16, 64)
460#define MLS_CG_SIZE                         4      ///< G644 : Coefficient group size of 4x4
461
462#define ADAPTIVE_QP_SELECTION               1      ///< G382: Adaptive reconstruction levels, non-normative part for adaptive QP selection
463#if ADAPTIVE_QP_SELECTION
464#define ARL_C_PRECISION                     7      ///< G382: 7-bit arithmetic precision
465#define LEVEL_RANGE                         30     ///< G382: max coefficient level in statistics collection
466#endif
467
468#define HHI_RQT_INTRA_SPEEDUP             1           ///< tests one best mode with full rqt
469#define HHI_RQT_INTRA_SPEEDUP_MOD         0           ///< tests two best modes with full rqt
470
471#if HHI_RQT_INTRA_SPEEDUP_MOD && !HHI_RQT_INTRA_SPEEDUP
472#error
473#endif
474
475#define VERBOSE_RATE 0 ///< Print additional rate information in encoder
476
477#define AMVP_DECIMATION_FACTOR            4
478
479#define SCAN_SET_SIZE                     16
480#define LOG2_SCAN_SET_SIZE                4
481
482#define FAST_UDI_MAX_RDMODE_NUM               35          ///< maximum number of RD comparison in fast-UDI estimation loop
483
484#define ZERO_MVD_EST                          0           ///< Zero Mvd Estimation in normal mode
485
486#define NUM_INTRA_MODE 36
487#if !REMOVE_LM_CHROMA
488#define LM_CHROMA_IDX  35
489#endif
490
491#define WRITE_BACK                      1           ///< Enable/disable the encoder to replace the deltaPOC and Used by current from the config file with the values derived by the refIdc parameter.
492#define AUTO_INTER_RPS                  1           ///< Enable/disable the automatic generation of refIdc from the deltaPOC and Used by current from the config file.
493#define PRINT_RPS_INFO                  0           ///< Enable/disable the printing of bits used to send the RPS.
494                                                    // using one nearest frame as reference frame, and the other frames are high quality (POC%4==0) frames (1+X)
495                                                    // this should be done with encoder only decision
496                                                    // but because of the absence of reference frame management, the related code was hard coded currently
497
498#define RVM_VCEGAM10_M 4
499
500#define PLANAR_IDX             0
501#define VER_IDX                26                    // index for intra VERTICAL   mode
502#define HOR_IDX                10                    // index for intra HORIZONTAL mode
503#define DC_IDX                 1                     // index for intra DC mode
504#define NUM_CHROMA_MODE        5                     // total number of chroma modes
505#define DM_CHROMA_IDX          36                    // chroma mode index for derived from luma intra mode
506
507
508#define FAST_UDI_USE_MPM 1
509
510#define RDO_WITHOUT_DQP_BITS              0           ///< Disable counting dQP bits in RDO-based mode decision
511
512#define FULL_NBIT 0 ///< When enabled, compute costs using full sample bitdepth.  When disabled, compute costs as if it is 8-bit source video.
513#if FULL_NBIT
514# define DISTORTION_PRECISION_ADJUSTMENT(x) 0
515#else
516# define DISTORTION_PRECISION_ADJUSTMENT(x) (x)
517#endif
518
519#define LOG2_MAX_NUM_COLUMNS_MINUS1        7
520#define LOG2_MAX_NUM_ROWS_MINUS1           7
521#define LOG2_MAX_COLUMN_WIDTH              13
522#define LOG2_MAX_ROW_HEIGHT                13
523
524#define MATRIX_MULT                             0   // Brute force matrix multiplication instead of partial butterfly
525
526#define REG_DCT 65535
527
528#define AMP_SAD                               1           ///< dedicated SAD functions for AMP
529#define AMP_ENC_SPEEDUP                       1           ///< encoder only speed-up by AMP mode skipping
530#if AMP_ENC_SPEEDUP
531#define AMP_MRG                               1           ///< encoder only force merge for AMP partition (no motion search for AMP)
532#endif
533
534#define CABAC_INIT_PRESENT_FLAG     1
535
536// ====================================================================================================================
537// Basic type redefinition
538// ====================================================================================================================
539
540typedef       void                Void;
541typedef       bool                Bool;
542
543#ifdef __arm__
544typedef       signed char         Char;
545#else
546typedef       char                Char;
547#endif
548typedef       unsigned char       UChar;
549typedef       short               Short;
550typedef       unsigned short      UShort;
551typedef       int                 Int;
552typedef       unsigned int        UInt;
553typedef       double              Double;
554typedef       float               Float;
555
556// ====================================================================================================================
557// 64-bit integer type
558// ====================================================================================================================
559
560#ifdef _MSC_VER
561typedef       __int64             Int64;
562
563#if _MSC_VER <= 1200 // MS VC6
564typedef       __int64             UInt64;   // MS VC6 does not support unsigned __int64 to double conversion
565#else
566typedef       unsigned __int64    UInt64;
567#endif
568
569#else
570
571typedef       long long           Int64;
572typedef       unsigned long long  UInt64;
573
574#endif
575
576// ====================================================================================================================
577// Type definition
578// ====================================================================================================================
579
580typedef       UChar           Pxl;        ///< 8-bit pixel type
581typedef       Short           Pel;        ///< 16-bit pixel type
582typedef       Int             TCoeff;     ///< transform coefficient
583
584#if H_3D_VSO
585// ====================================================================================================================
586// Define Distortion Types
587// ====================================================================================================================
588typedef       Int64           RMDist;     ///< renderer model distortion
589
590#if H_3D_VSO_DIST_INT
591typedef       Int64            Dist;       ///< RDO distortion
592typedef       Int64            Dist64; 
593#define       RDO_DIST_MIN     MIN_INT
594#define       RDO_DIST_MAX     MAX_INT
595#else
596typedef       UInt             Dist;       ///< RDO distortion
597typedef       UInt64           Dist; 
598#define       RDO_DIST_MIN     0
599#define       RDO_DIST_MAX     MAX_UINT
600#endif
601#endif
602/// parameters for adaptive loop filter
603class TComPicSym;
604
605// Slice / Slice segment encoding modes
606enum SliceConstraint
607{
608  NO_SLICES              = 0,          ///< don't use slices / slice segments
609  FIXED_NUMBER_OF_LCU    = 1,          ///< Limit maximum number of largest coding tree blocks in a slice / slice segments
610  FIXED_NUMBER_OF_BYTES  = 2,          ///< Limit maximum number of bytes in a slice / slice segment
611  FIXED_NUMBER_OF_TILES  = 3,          ///< slices / slice segments span an integer number of tiles
612};
613
614enum SAOComponentIdx
615{
616  SAO_Y =0,
617  SAO_Cb,
618  SAO_Cr,
619  NUM_SAO_COMPONENTS
620};
621
622enum SAOMode //mode
623{
624  SAO_MODE_OFF = 0,
625  SAO_MODE_NEW,
626  SAO_MODE_MERGE,
627  NUM_SAO_MODES
628};
629
630enum SAOModeMergeTypes
631{
632  SAO_MERGE_LEFT =0,
633  SAO_MERGE_ABOVE,
634  NUM_SAO_MERGE_TYPES
635};
636
637
638enum SAOModeNewTypes
639{
640  SAO_TYPE_START_EO =0,
641  SAO_TYPE_EO_0 = SAO_TYPE_START_EO,
642  SAO_TYPE_EO_90,
643  SAO_TYPE_EO_135,
644  SAO_TYPE_EO_45,
645
646  SAO_TYPE_START_BO,
647  SAO_TYPE_BO = SAO_TYPE_START_BO,
648
649  NUM_SAO_NEW_TYPES
650};
651#define NUM_SAO_EO_TYPES_LOG2 2
652
653enum SAOEOClasses
654{
655  SAO_CLASS_EO_FULL_VALLEY = 0,
656  SAO_CLASS_EO_HALF_VALLEY = 1,
657  SAO_CLASS_EO_PLAIN       = 2,
658  SAO_CLASS_EO_HALF_PEAK   = 3,
659  SAO_CLASS_EO_FULL_PEAK   = 4,
660  NUM_SAO_EO_CLASSES,
661};
662
663
664#define NUM_SAO_BO_CLASSES_LOG2  5
665enum SAOBOClasses
666{
667  //SAO_CLASS_BO_BAND0 = 0,
668  //SAO_CLASS_BO_BAND1,
669  //SAO_CLASS_BO_BAND2,
670  //...
671  //SAO_CLASS_BO_BAND31,
672
673  NUM_SAO_BO_CLASSES = (1<<NUM_SAO_BO_CLASSES_LOG2),
674};
675#define MAX_NUM_SAO_CLASSES  32  //(NUM_SAO_EO_GROUPS > NUM_SAO_BO_GROUPS)?NUM_SAO_EO_GROUPS:NUM_SAO_BO_GROUPS
676
677struct SAOOffset
678{
679  Int modeIdc; //NEW, MERGE, OFF
680  Int typeIdc; //NEW: EO_0, EO_90, EO_135, EO_45, BO. MERGE: left, above
681  Int typeAuxInfo; //BO: starting band index
682  Int offset[MAX_NUM_SAO_CLASSES];
683
684  SAOOffset();
685  ~SAOOffset();
686  Void reset();
687
688  const SAOOffset& operator= (const SAOOffset& src);
689};
690
691struct SAOBlkParam
692{
693
694  SAOBlkParam();
695  ~SAOBlkParam();
696  Void reset();
697  const SAOBlkParam& operator= (const SAOBlkParam& src);
698  SAOOffset& operator[](Int compIdx){ return offsetParam[compIdx];}
699private:
700  SAOOffset offsetParam[NUM_SAO_COMPONENTS];
701
702};
703
704/// parameters for deblocking filter
705typedef struct _LFCUParam
706{
707  Bool bInternalEdge;                     ///< indicates internal edge
708  Bool bLeftEdge;                         ///< indicates left edge
709  Bool bTopEdge;                          ///< indicates top edge
710} LFCUParam;
711
712// ====================================================================================================================
713// Enumeration
714// ====================================================================================================================
715
716/// supported slice type
717enum SliceType
718{
719  B_SLICE,
720  P_SLICE,
721  I_SLICE
722};
723
724/// chroma formats (according to semantics of chroma_format_idc)
725enum ChromaFormat
726{
727  CHROMA_400  = 0,
728  CHROMA_420  = 1,
729  CHROMA_422  = 2,
730  CHROMA_444  = 3
731};
732
733/// supported partition shape
734enum PartSize
735{
736  SIZE_2Nx2N,           ///< symmetric motion partition,  2Nx2N
737  SIZE_2NxN,            ///< symmetric motion partition,  2Nx N
738  SIZE_Nx2N,            ///< symmetric motion partition,   Nx2N
739  SIZE_NxN,             ///< symmetric motion partition,   Nx N
740  SIZE_2NxnU,           ///< asymmetric motion partition, 2Nx( N/2) + 2Nx(3N/2)
741  SIZE_2NxnD,           ///< asymmetric motion partition, 2Nx(3N/2) + 2Nx( N/2)
742  SIZE_nLx2N,           ///< asymmetric motion partition, ( N/2)x2N + (3N/2)x2N
743  SIZE_nRx2N,           ///< asymmetric motion partition, (3N/2)x2N + ( N/2)x2N
744  SIZE_NONE = 15
745};
746
747/// supported prediction type
748enum PredMode
749{
750  MODE_INTER,           ///< inter-prediction mode
751  MODE_INTRA,           ///< intra-prediction mode
752  MODE_NONE = 15
753};
754
755/// texture component type
756enum TextType
757{
758  TEXT_LUMA,            ///< luma
759  TEXT_CHROMA,          ///< chroma (U+V)
760  TEXT_CHROMA_U,        ///< chroma U
761  TEXT_CHROMA_V,        ///< chroma V
762  TEXT_ALL,             ///< Y+U+V
763  TEXT_NONE = 15
764};
765
766/// reference list index
767enum RefPicList
768{
769  REF_PIC_LIST_0 = 0,   ///< reference list 0
770  REF_PIC_LIST_1 = 1,   ///< reference list 1
771  REF_PIC_LIST_X = 100  ///< special mark
772};
773
774/// distortion function index
775enum DFunc
776{
777  DF_DEFAULT  = 0,
778  DF_SSE      = 1,      ///< general size SSE
779  DF_SSE4     = 2,      ///<   4xM SSE
780  DF_SSE8     = 3,      ///<   8xM SSE
781  DF_SSE16    = 4,      ///<  16xM SSE
782  DF_SSE32    = 5,      ///<  32xM SSE
783  DF_SSE64    = 6,      ///<  64xM SSE
784  DF_SSE16N   = 7,      ///< 16NxM SSE
785 
786  DF_SAD      = 8,      ///< general size SAD
787  DF_SAD4     = 9,      ///<   4xM SAD
788  DF_SAD8     = 10,     ///<   8xM SAD
789  DF_SAD16    = 11,     ///<  16xM SAD
790  DF_SAD32    = 12,     ///<  32xM SAD
791  DF_SAD64    = 13,     ///<  64xM SAD
792  DF_SAD16N   = 14,     ///< 16NxM SAD
793 
794  DF_SADS     = 15,     ///< general size SAD with step
795  DF_SADS4    = 16,     ///<   4xM SAD with step
796  DF_SADS8    = 17,     ///<   8xM SAD with step
797  DF_SADS16   = 18,     ///<  16xM SAD with step
798  DF_SADS32   = 19,     ///<  32xM SAD with step
799  DF_SADS64   = 20,     ///<  64xM SAD with step
800  DF_SADS16N  = 21,     ///< 16NxM SAD with step
801 
802  DF_HADS     = 22,     ///< general size Hadamard with step
803  DF_HADS4    = 23,     ///<   4xM HAD with step
804  DF_HADS8    = 24,     ///<   8xM HAD with step
805  DF_HADS16   = 25,     ///<  16xM HAD with step
806  DF_HADS32   = 26,     ///<  32xM HAD with step
807  DF_HADS64   = 27,     ///<  64xM HAD with step
808  DF_HADS16N  = 28,     ///< 16NxM HAD with step
809#if H_3D_VSO
810  DF_VSD      = 29,      ///< general size VSD
811  DF_VSD4     = 30,      ///<   4xM VSD
812  DF_VSD8     = 31,      ///<   8xM VSD
813  DF_VSD16    = 32,      ///<  16xM VSD
814  DF_VSD32    = 33,      ///<  32xM VSD
815  DF_VSD64    = 34,      ///<  64xM VSD
816  DF_VSD16N   = 35,      ///< 16NxM VSD
817#endif
818
819#if AMP_SAD
820  DF_SAD12    = 43,
821  DF_SAD24    = 44,
822  DF_SAD48    = 45,
823
824  DF_SADS12   = 46,
825  DF_SADS24   = 47,
826  DF_SADS48   = 48,
827
828  DF_SSE_FRAME = 50     ///< Frame-based SSE
829#else
830  DF_SSE_FRAME = 33     ///< Frame-based SSE
831#endif
832};
833
834/// index for SBAC based RD optimization
835enum CI_IDX
836{
837  CI_CURR_BEST = 0,     ///< best mode index
838  CI_NEXT_BEST,         ///< next best index
839  CI_TEMP_BEST,         ///< temporal index
840  CI_CHROMA_INTRA,      ///< chroma intra index
841  CI_QT_TRAFO_TEST,
842  CI_QT_TRAFO_ROOT,
843  CI_NUM,               ///< total number
844};
845
846/// motion vector predictor direction used in AMVP
847enum MVP_DIR
848{
849  MD_LEFT = 0,          ///< MVP of left block
850  MD_ABOVE,             ///< MVP of above block
851  MD_ABOVE_RIGHT,       ///< MVP of above right block
852  MD_BELOW_LEFT,        ///< MVP of below left block
853  MD_ABOVE_LEFT         ///< MVP of above left block
854};
855
856/// coefficient scanning type used in ACS
857enum COEFF_SCAN_TYPE
858{
859  SCAN_DIAG = 0,         ///< up-right diagonal scan
860  SCAN_HOR,              ///< horizontal first scan
861  SCAN_VER               ///< vertical first scan
862};
863
864namespace Profile
865{
866  enum Name
867  {
868    NONE = 0,
869    MAIN = 1,
870    MAIN10 = 2,
871    MAINSTILLPICTURE = 3,
872#if H_MV
873    MAINSTEREO = 4,
874    MAINMULTIVIEW = 5,
875#if H_3D
876    MAIN3D = 6, 
877#endif
878#endif
879  };
880}
881
882namespace Level
883{
884  enum Tier
885  {
886    MAIN = 0,
887    HIGH = 1,
888  };
889
890  enum Name
891  {
892    NONE     = 0,
893    LEVEL1   = 30,
894    LEVEL2   = 60,
895    LEVEL2_1 = 63,
896    LEVEL3   = 90,
897    LEVEL3_1 = 93,
898    LEVEL4   = 120,
899    LEVEL4_1 = 123,
900    LEVEL5   = 150,
901    LEVEL5_1 = 153,
902    LEVEL5_2 = 156,
903    LEVEL6   = 180,
904    LEVEL6_1 = 183,
905    LEVEL6_2 = 186,
906  };
907}
908//! \}
909
910#if H_MV
911
912#if H_MV_HLS_7_GEN_P0166_PPS_EXTENSION
913enum PpsExtensionTypes
914{
915  PPS_EX_T_MV      = 0,
916#if H_3D
917  PPS_EX_T_3D      = 3,
918#endif
919  PPS_EX_T_ESC     = 7,
920  PPS_EX_T_MAX_NUM = 8
921};
922
923//Below for sps, would be good if this could be aligned
924#endif
925
926  enum PsExtensionTypes
927  {
928    PS_EX_T_MV   = 1,
929#if H_3D
930    PS_EX_T_3D   = 3,
931#endif
932    PS_EX_T_ESC  = 7,
933    PS_EX_T_MAX_NUM = 8
934  };
935
936/// scalability types
937  enum ScalabilityType
938  {
939#if H_3D
940    DEPTH_ID = 0,   
941#endif   
942    VIEW_ORDER_INDEX  = 1,
943  };
944#endif
945#if H_3D
946  // Renderer
947  enum BlenMod
948  {
949    BLEND_NONE  = -1,
950    BLEND_AVRG  = 0,
951    BLEND_LEFT  = 1,
952    BLEND_RIGHT = 2,
953    BLEND_GEN   =  3
954  };
955
956 
957  enum
958  {
959    VIEWPOS_INVALID = -1,
960    VIEWPOS_LEFT    = 0,
961    VIEWPOS_RIGHT   = 1,
962    VIEWPOS_MERGED  = 2
963  };
964
965#define Log2( n ) ( log((double)n) / log(2.0) ) // Ed.(GT): This is very very bad and should be fixed to used integer arithmetics ( see gCeilLog2 ) moreover it should not be defined in the tool macro section!
966#endif
967#endif
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