1 | /* The copyright in this software is being made available under the BSD |
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2 | * License, included below. This software may be subject to other third party |
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3 | * and contributor rights, including patent rights, and no such rights are |
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4 | * granted under this license. |
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5 | * |
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6 | * Copyright (c) 2010-2012, ITU/ISO/IEC |
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7 | * All rights reserved. |
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8 | * |
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9 | * Redistribution and use in source and binary forms, with or without |
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10 | * modification, are permitted provided that the following conditions are met: |
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11 | * |
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12 | * * Redistributions of source code must retain the above copyright notice, |
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13 | * this list of conditions and the following disclaimer. |
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14 | * * Redistributions in binary form must reproduce the above copyright notice, |
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15 | * this list of conditions and the following disclaimer in the documentation |
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16 | * and/or other materials provided with the distribution. |
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17 | * * Neither the name of the ITU/ISO/IEC nor the names of its contributors may |
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18 | * be used to endorse or promote products derived from this software without |
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19 | * specific prior written permission. |
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20 | * |
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21 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
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22 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
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23 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
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24 | * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS |
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25 | * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
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26 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
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27 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
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28 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
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29 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
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30 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF |
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31 | * THE POSSIBILITY OF SUCH DAMAGE. |
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32 | */ |
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33 | |
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34 | /** \file ContextTables.h |
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35 | \brief Defines constants and tables for SBAC |
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36 | \todo number of context models is not matched to actual use, should be fixed |
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37 | */ |
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38 | |
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39 | #ifndef __CONTEXTTABLES__ |
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40 | #define __CONTEXTTABLES__ |
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41 | |
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42 | //! \ingroup TLibCommon |
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43 | //! \{ |
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44 | |
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45 | // ==================================================================================================================== |
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46 | // Constants |
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47 | // ==================================================================================================================== |
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48 | |
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49 | #define MAX_NUM_CTX_MOD 512 ///< maximum number of supported contexts |
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50 | |
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51 | #define NUM_SPLIT_FLAG_CTX 3 ///< number of context models for split flag |
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52 | #define NUM_SKIP_FLAG_CTX 3 ///< number of context models for skip flag |
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53 | |
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54 | #if LGE_ILLUCOMP_B0045 |
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55 | #define NUM_IC_FLAG_CTX 3 ///< number of context models for illumination compensation flag |
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56 | #endif |
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57 | |
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58 | #define NUM_MERGE_FLAG_EXT_CTX 1 ///< number of context models for merge flag of merge extended |
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59 | #define NUM_MERGE_IDX_EXT_CTX 1 ///< number of context models for merge index of merge extended |
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60 | |
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61 | #if H3D_IVRP |
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62 | #define NUM_RES_PRED_FLAG_CTX 4 ///< number of context for residual prediction flag |
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63 | #endif |
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64 | |
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65 | #define NUM_ALF_CTRL_FLAG_CTX 1 ///< number of context models for ALF control flag |
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66 | #define NUM_PART_SIZE_CTX 4 ///< number of context models for partition size |
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67 | #define NUM_CU_AMP_CTX 1 ///< number of context models for partition size (AMP) |
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68 | #define NUM_PRED_MODE_CTX 1 ///< number of context models for prediction mode |
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69 | |
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70 | #define NUM_ADI_CTX 1 ///< number of context models for intra prediction |
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71 | |
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72 | #define NUM_CHROMA_PRED_CTX 2 ///< number of context models for intra prediction (chroma) |
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73 | #define NUM_INTER_DIR_CTX 4 ///< number of context models for inter prediction direction |
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74 | #define NUM_MV_RES_CTX 2 ///< number of context models for motion vector difference |
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75 | |
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76 | #define NUM_REF_NO_CTX 4 ///< number of context models for reference index |
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77 | #define NUM_TRANS_SUBDIV_FLAG_CTX 10 ///< number of context models for transform subdivision flags |
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78 | #define NUM_QT_CBF_CTX 5 ///< number of context models for QT CBF |
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79 | #define NUM_QT_ROOT_CBF_CTX 1 ///< number of context models for QT ROOT CBF |
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80 | #define NUM_DELTA_QP_CTX 3 ///< number of context models for dQP |
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81 | |
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82 | #define NUM_SIG_CG_FLAG_CTX 2 ///< number of context models for MULTI_LEVEL_SIGNIFICANCE |
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83 | |
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84 | #define NUM_SIG_FLAG_CTX 48 ///< number of context models for sig flag |
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85 | |
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86 | #define NUM_SIG_FLAG_CTX_LUMA 27 ///< number of context models for luma sig flag |
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87 | #define NUM_SIG_FLAG_CTX_CHROMA 21 ///< number of context models for chroma sig flag |
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88 | #define NUM_CTX_LAST_FLAG_XY 15 ///< number of context models for last coefficient position |
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89 | |
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90 | #define NUM_ONE_FLAG_CTX 24 ///< number of context models for greater than 1 flag |
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91 | #define NUM_ONE_FLAG_CTX_LUMA 16 ///< number of context models for greater than 1 flag of luma |
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92 | #define NUM_ONE_FLAG_CTX_CHROMA 8 ///< number of context models for greater than 1 flag of chroma |
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93 | #define NUM_ABS_FLAG_CTX 6 ///< number of context models for greater than 2 flag |
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94 | #define NUM_ABS_FLAG_CTX_LUMA 4 ///< number of context models for greater than 2 flag of luma |
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95 | #define NUM_ABS_FLAG_CTX_CHROMA 2 ///< number of context models for greater than 2 flag of chroma |
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96 | |
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97 | #define NUM_MVP_IDX_CTX 2 ///< number of context models for MVP index |
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98 | |
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99 | #define NUM_ALF_FLAG_CTX 1 ///< number of context models for ALF flag |
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100 | #define NUM_ALF_UVLC_CTX 2 ///< number of context models for ALF UVLC (filter length) |
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101 | #define NUM_ALF_SVLC_CTX 3 ///< number of context models for ALF SVLC (filter coeff.) |
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102 | |
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103 | #define NUM_SAO_FLAG_CTX 1 ///< number of context models for SAO flag |
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104 | #define NUM_SAO_UVLC_CTX 2 ///< number of context models for SAO UVLC |
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105 | #define NUM_SAO_SVLC_CTX 3 ///< number of context models for SAO SVLC |
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106 | #define NUM_SAO_RUN_CTX 3 ///< number of context models for AO SVLC (filter coeff.) |
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107 | #define NUM_SAO_MERGE_LEFT_FLAG_CTX 3 ///< number of context models for AO SVLC (filter coeff.) |
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108 | #define NUM_SAO_MERGE_UP_FLAG_CTX 1 ///< number of context models for AO SVLC (filter coeff.) |
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109 | #define NUM_SAO_TYPE_IDX_CTX 2 ///< number of context models for AO SVLC (filter coeff.) |
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110 | #define CNU 154 ///< dummy initialization value for unused context models 'Context model Not Used' |
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111 | |
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112 | #if HHI_DMM_WEDGE_INTRA || HHI_DMM_PRED_TEX |
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113 | #define NUM_DMM_FLAG_CTX 1 ///< number of context models for DMM flag |
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114 | #define NUM_DMM_MODE_CTX 1 ///< number of context models for DMM mode |
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115 | #if LGE_DMM3_SIMP_C0044 |
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116 | #define NUM_DMM_DATA_CTX 4 ///< number of context models for DMM data |
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117 | #else |
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118 | #define NUM_DMM_DATA_CTX 3 ///< number of context models for DMM data |
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119 | #endif |
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120 | #endif |
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121 | |
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122 | #if LGE_EDGE_INTRA_A0070 |
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123 | #define NUM_EDGE_INTRA_CTX 1 |
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124 | #if LGE_EDGE_INTRA_DELTA_DC |
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125 | #define NUM_EDGE_INTRA_DELTA_DC_CTX 2 // one for Delta_DC flag, another for Delta_DC value |
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126 | #endif |
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127 | #endif |
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128 | |
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129 | #if RWTH_SDC_DLT_B0036 |
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130 | #if PKU_QC_DEPTH_INTRA_UNI_D0195 |
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131 | #define DEPTH_MODE_NUM_FLAG_CTX 8 |
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132 | #define DMM_DELTA_NUM_FLAG_CTX 1 |
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133 | #else |
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134 | #define SDC_NUM_FLAG_CTX 3 |
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135 | #endif |
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136 | #define SDC_NUM_RESIDUAL_FLAG_CTX 1 |
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137 | #if !RWTH_SDC_CTX_SIMPL_D0032 |
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138 | #define SDC_NUM_SIGN_FLAG_CTX 1 |
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139 | #endif |
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140 | #if LGE_CONCATENATE_D0141 |
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141 | #define SDC_NUM_RESIDUAL_CTX 1 |
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142 | #else |
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143 | #if RWTH_SDC_CTX_SIMPL_D0032 |
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144 | #define SDC_NUM_RESIDUAL_CTX 8 |
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145 | #else |
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146 | #define SDC_NUM_RESIDUAL_CTX 10 |
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147 | #endif |
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148 | #endif |
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149 | |
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150 | #define SDC_NUM_PRED_MODE_CTX 5 |
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151 | #endif |
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152 | |
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153 | // ==================================================================================================================== |
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154 | // Tables |
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155 | // ==================================================================================================================== |
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156 | |
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157 | // initial probability for split flag |
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158 | static const UChar |
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159 | INIT_SPLIT_FLAG[3][NUM_SPLIT_FLAG_CTX] = |
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160 | { |
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161 | { 139, 141, 157, }, |
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162 | { 107, 139, 126, }, |
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163 | { 107, 139, 126, }, |
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164 | }; |
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165 | |
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166 | static const UChar |
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167 | INIT_SKIP_FLAG[3][NUM_SKIP_FLAG_CTX] = |
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168 | { |
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169 | { CNU, CNU, CNU, }, |
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170 | { 197, 185, 201, }, |
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171 | { 197, 185, 201, }, |
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172 | }; |
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173 | |
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174 | #if LGE_ILLUCOMP_B0045 |
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175 | static const UChar |
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176 | INIT_IC_FLAG[3][NUM_IC_FLAG_CTX] = |
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177 | { |
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178 | { CNU, CNU, CNU, }, |
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179 | { 197, 185, 201, }, |
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180 | { 197, 185, 201, }, |
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181 | }; |
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182 | #endif |
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183 | |
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184 | static const UChar |
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185 | INIT_ALF_CTRL_FLAG[3][NUM_ALF_CTRL_FLAG_CTX] = |
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186 | { |
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187 | { 200, }, |
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188 | { 139, }, |
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189 | { 169, }, |
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190 | }; |
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191 | |
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192 | static const UChar |
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193 | INIT_MERGE_FLAG_EXT[3][NUM_MERGE_FLAG_EXT_CTX] = |
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194 | { |
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195 | { CNU, }, |
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196 | { 110, }, |
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197 | { 154, }, |
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198 | }; |
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199 | |
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200 | static const UChar |
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201 | INIT_MERGE_IDX_EXT[3][NUM_MERGE_IDX_EXT_CTX] = |
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202 | { |
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203 | { CNU, }, |
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204 | { 122, }, |
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205 | { 137, }, |
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206 | }; |
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207 | |
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208 | #if H3D_IVRP |
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209 | static const UChar |
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210 | INIT_RES_PRED_FLAG[3][NUM_RES_PRED_FLAG_CTX] = |
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211 | { |
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212 | { CNU, CNU, CNU, CNU }, |
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213 | { 154, 154, 154, 154 }, |
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214 | { 154, 154, 154, 154 }, |
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215 | }; |
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216 | #endif |
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217 | |
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218 | static const UChar |
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219 | INIT_PART_SIZE[3][NUM_PART_SIZE_CTX] = |
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220 | { |
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221 | { 184, CNU, CNU, CNU, }, |
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222 | { 154, 139, CNU, CNU, }, |
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223 | { 154, 139, CNU, CNU, }, |
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224 | }; |
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225 | |
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226 | static const UChar |
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227 | INIT_CU_AMP_POS[3][NUM_CU_AMP_CTX] = |
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228 | { |
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229 | { CNU, }, |
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230 | { 154, }, |
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231 | { 154, }, |
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232 | }; |
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233 | |
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234 | static const UChar |
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235 | INIT_PRED_MODE[3][NUM_PRED_MODE_CTX] = |
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236 | { |
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237 | { CNU, }, |
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238 | { 149, }, |
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239 | { 134, }, |
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240 | }; |
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241 | |
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242 | static const UChar |
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243 | INIT_INTRA_PRED_MODE[3][NUM_ADI_CTX] = |
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244 | { |
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245 | { 184, }, |
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246 | { 154, }, |
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247 | { 183, }, |
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248 | }; |
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249 | |
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250 | static const UChar |
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251 | INIT_CHROMA_PRED_MODE[3][NUM_CHROMA_PRED_CTX] = |
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252 | { |
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253 | { 63, 139, }, |
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254 | { 152, 139, }, |
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255 | { 152, 139, }, |
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256 | }; |
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257 | |
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258 | static const UChar |
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259 | INIT_INTER_DIR[3][NUM_INTER_DIR_CTX] = |
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260 | { |
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261 | { CNU, CNU, CNU, CNU, }, |
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262 | #if CABAC_INIT_FLAG |
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263 | { 95, 79, 63, 31, }, |
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264 | #else |
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265 | { CNU, CNU, CNU, CNU, }, |
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266 | #endif |
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267 | { 95, 79, 63, 31, }, |
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268 | }; |
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269 | |
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270 | static const UChar |
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271 | INIT_MVD[3][NUM_MV_RES_CTX] = |
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272 | { |
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273 | { CNU, CNU, }, |
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274 | { 140, 198, }, |
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275 | { 169, 198, }, |
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276 | }; |
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277 | |
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278 | static const UChar |
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279 | INIT_REF_PIC[3][NUM_REF_NO_CTX] = |
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280 | { |
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281 | { CNU, CNU, CNU, CNU, }, |
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282 | { 153, 153, 139, CNU, }, |
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283 | { 153, 153, 168, CNU, }, |
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284 | }; |
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285 | |
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286 | static const UChar |
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287 | INIT_DQP[3][NUM_DELTA_QP_CTX] = |
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288 | { |
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289 | { 154, 154, 154, }, |
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290 | { 154, 154, 154, }, |
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291 | { 154, 154, 154, }, |
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292 | }; |
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293 | |
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294 | static const UChar |
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295 | INIT_QT_CBF[3][2*NUM_QT_CBF_CTX] = |
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296 | { |
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297 | { 111, 141, CNU, CNU, CNU, 94, 138, 182, CNU, CNU, }, |
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298 | { 153, 111, CNU, CNU, CNU, 149, 107, 167, CNU, CNU, }, |
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299 | { 153, 111, CNU, CNU, CNU, 149, 92, 167, CNU, CNU, }, |
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300 | }; |
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301 | |
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302 | static const UChar |
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303 | INIT_QT_ROOT_CBF[3][NUM_QT_ROOT_CBF_CTX] = |
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304 | { |
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305 | { CNU, }, |
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306 | { 79, }, |
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307 | { 79, }, |
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308 | }; |
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309 | |
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310 | static const UChar |
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311 | INIT_LAST[3][2*NUM_CTX_LAST_FLAG_XY] = |
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312 | { |
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313 | { 110, 110, 124, 110, 140, 111, 125, 111, 127, 111, 111, 156, 127, 127, 111, |
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314 | 108, 123, 63, CNU, CNU, CNU, CNU, CNU, CNU, CNU, CNU, CNU, CNU, CNU, CNU, |
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315 | }, |
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316 | { 125, 110, 94, 110, 125, 110, 125, 111, 111, 110, 139, 111, 111, 111, 125, |
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317 | 108, 123, 108, CNU, CNU, CNU, CNU, CNU, CNU, CNU, CNU, CNU, CNU, CNU, CNU, |
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318 | }, |
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319 | { 125, 110, 124, 110, 125, 110, 125, 111, 111, 110, 139, 111, 111, 111, 125, |
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320 | 108, 123, 93, CNU, CNU, CNU, CNU, CNU, CNU, CNU, CNU, CNU, CNU, CNU, CNU, |
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321 | }, |
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322 | }; |
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323 | |
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324 | static const UChar |
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325 | INIT_SIG_CG_FLAG[3][2 * NUM_SIG_CG_FLAG_CTX] = |
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326 | { |
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327 | { 91, 171, |
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328 | 134, 141, |
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329 | }, |
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330 | { 121, 140, |
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331 | 61, 154, |
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332 | }, |
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333 | { 121, 140, |
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334 | 61, 154, |
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335 | }, |
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336 | }; |
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337 | |
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338 | static const UChar |
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339 | INIT_SIG_FLAG[3][NUM_SIG_FLAG_CTX] = |
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340 | { |
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341 | { 141, 111, 125, 110, 110, 94, 124, 108, 124, 125, 139, 124, 63, 139, 168, 138, 107, 123, 92, 111, 141, 107, 125, 141, 179, 153, 125, 140, 139, 182, 123, 47, 153, 182, 137, 149, 192, 152, 224, 136, 31, 136, 74, 140, 141, 136, 139, 111, }, |
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342 | { 170, 154, 139, 153, 139, 123, 123, 63, 153, 168, 153, 152, 92, 152, 152, 137, 122, 92, 61, 155, 185, 166, 183, 140, 136, 153, 154, 155, 153, 123, 63, 61, 167, 153, 167, 136, 149, 107, 136, 121, 122, 91, 149, 170, 185, 151, 183, 140, }, |
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343 | { 170, 154, 139, 153, 139, 123, 123, 63, 124, 139, 153, 152, 92, 152, 152, 137, 137, 92, 61, 170, 185, 166, 183, 140, 136, 153, 154, 155, 153, 138, 107, 61, 167, 153, 167, 136, 121, 122, 136, 121, 122, 91, 149, 170, 170, 151, 183, 140, }, |
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344 | }; |
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345 | |
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346 | static const UChar |
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347 | INIT_ONE_FLAG[3][NUM_ONE_FLAG_CTX] = |
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348 | { |
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349 | { 140, 92, 137, 138, 140, 152, 138, 139, 153, 74, 149, 92, 139, 107, 122, 152, 140, 179, 166, 182, 140, 227, 122, 197, }, |
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350 | { 154, 196, 196, 167, 154, 152, 167, 182, 182, 134, 149, 136, 153, 121, 136, 137, 169, 194, 166, 167, 154, 167, 137, 182, }, |
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351 | { 154, 196, 167, 167, 154, 152, 167, 182, 182, 134, 149, 136, 153, 121, 136, 122, 169, 208, 166, 167, 154, 152, 167, 182, }, |
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352 | }; |
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353 | |
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354 | static const UChar |
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355 | INIT_ABS_FLAG[3][NUM_ABS_FLAG_CTX] = |
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356 | { |
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357 | { 138, 153, 136, 167, 152, 152, }, |
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358 | { 107, 167, 91, 122, 107, 167, }, |
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359 | { 107, 167, 91, 107, 107, 167, }, |
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360 | }; |
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361 | |
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362 | static const UChar |
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363 | INIT_MVP_IDX[3][NUM_MVP_IDX_CTX] = |
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364 | { |
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365 | { CNU, CNU, }, |
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366 | { 168, CNU, }, |
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367 | { 168, CNU, }, |
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368 | }; |
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369 | |
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370 | static const UChar |
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371 | INIT_ALF_FLAG[3][NUM_ALF_FLAG_CTX] = |
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372 | { |
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373 | { 153, }, |
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374 | { 153, }, |
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375 | { 153, }, |
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376 | }; |
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377 | |
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378 | static const UChar |
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379 | INIT_ALF_UVLC[3][NUM_ALF_UVLC_CTX] = |
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380 | { |
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381 | { 140, 154, }, |
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382 | { 154, 154, }, |
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383 | { 154, 154, }, |
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384 | }; |
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385 | |
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386 | static const UChar |
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387 | INIT_ALF_SVLC[3][NUM_ALF_SVLC_CTX] = |
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388 | { |
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389 | { 187, 154, 159, }, |
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390 | { 141, 154, 189, }, |
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391 | { 141, 154, 159, }, |
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392 | }; |
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393 | |
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394 | static const UChar |
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395 | INIT_SAO_FLAG[3][NUM_SAO_FLAG_CTX] = |
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396 | { |
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397 | { 154, }, |
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398 | { 153, }, |
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399 | { 153, }, |
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400 | }; |
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401 | |
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402 | static const UChar |
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403 | INIT_SAO_UVLC[3][NUM_SAO_UVLC_CTX] = |
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404 | { |
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405 | { 143, 140, }, |
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406 | { 185, 140, }, |
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407 | { 200, 140, }, |
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408 | }; |
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409 | |
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410 | static const UChar |
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411 | INIT_SAO_SVLC[3][NUM_SAO_SVLC_CTX] = |
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412 | { |
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413 | { 247, 154, 244, }, |
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414 | { 215, 154, 169, }, |
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415 | { 215, 154, 169, }, |
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416 | }; |
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417 | |
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418 | static const UChar |
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419 | INIT_SAO_MERGE_LEFT_FLAG[3][NUM_SAO_MERGE_LEFT_FLAG_CTX] = |
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420 | { |
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421 | { 153, 153, 153, }, |
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422 | { 153, 153, 153, }, |
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423 | { 153, 153, 153, }, |
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424 | }; |
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425 | |
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426 | static const UChar |
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427 | INIT_SAO_MERGE_UP_FLAG[3][NUM_SAO_MERGE_UP_FLAG_CTX] = |
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428 | { |
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429 | { 175, }, |
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430 | { 153, }, |
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431 | { 153, }, |
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432 | }; |
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433 | |
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434 | static const UChar |
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435 | INIT_SAO_TYPE_IDX[3][NUM_SAO_TYPE_IDX_CTX] = |
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436 | { |
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437 | { 160, 140, }, |
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438 | { 185, 140, }, |
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439 | { 200, 140, }, |
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440 | }; |
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441 | |
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442 | static const UChar |
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443 | INIT_TRANS_SUBDIV_FLAG[3][NUM_TRANS_SUBDIV_FLAG_CTX] = |
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444 | { |
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445 | { CNU, 224, 167, 122, CNU, CNU, CNU, CNU, CNU, CNU, }, |
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446 | { CNU, 124, 138, 94, CNU, CNU, CNU, CNU, CNU, CNU, }, |
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447 | { CNU, 153, 138, 138, CNU, CNU, CNU, CNU, CNU, CNU, }, |
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448 | }; |
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449 | |
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450 | #if HHI_DMM_WEDGE_INTRA || HHI_DMM_PRED_TEX |
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451 | static const UChar |
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452 | INIT_DMM_FLAG[3][NUM_DMM_FLAG_CTX] = |
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453 | { |
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454 | { |
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455 | CNU |
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456 | }, |
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457 | { |
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458 | CNU |
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459 | }, |
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460 | { |
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461 | CNU |
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462 | } |
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463 | }; |
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464 | |
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465 | static const UChar |
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466 | INIT_DMM_MODE[3][NUM_DMM_MODE_CTX] = |
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467 | { |
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468 | { |
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469 | CNU |
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470 | }, |
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471 | { |
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472 | CNU |
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473 | }, |
---|
474 | { |
---|
475 | CNU |
---|
476 | } |
---|
477 | }; |
---|
478 | |
---|
479 | static const UChar |
---|
480 | INIT_DMM_DATA[3][NUM_DMM_DATA_CTX] = |
---|
481 | { |
---|
482 | #if LGE_DMM3_SIMP_C0044 |
---|
483 | { |
---|
484 | CNU, CNU, CNU, CNU |
---|
485 | }, |
---|
486 | { |
---|
487 | CNU, CNU, CNU, CNU |
---|
488 | }, |
---|
489 | { |
---|
490 | CNU, CNU, CNU, CNU |
---|
491 | } |
---|
492 | #else |
---|
493 | { |
---|
494 | CNU, CNU, CNU |
---|
495 | }, |
---|
496 | { |
---|
497 | CNU, CNU, CNU |
---|
498 | }, |
---|
499 | { |
---|
500 | CNU, CNU, CNU |
---|
501 | } |
---|
502 | #endif |
---|
503 | }; |
---|
504 | |
---|
505 | #if LGE_EDGE_INTRA_A0070 |
---|
506 | static const Short |
---|
507 | INIT_EDGE_INTRA[3][NUM_EDGE_INTRA_CTX] = |
---|
508 | { |
---|
509 | { |
---|
510 | CNU |
---|
511 | }, |
---|
512 | { |
---|
513 | CNU |
---|
514 | }, |
---|
515 | { |
---|
516 | CNU |
---|
517 | } |
---|
518 | }; |
---|
519 | |
---|
520 | #if LGE_EDGE_INTRA_DELTA_DC |
---|
521 | static const Short |
---|
522 | INIT_EDGE_INTRA_DELTA_DC[3][NUM_EDGE_INTRA_DELTA_DC_CTX] = |
---|
523 | { |
---|
524 | { |
---|
525 | CNU, CNU |
---|
526 | }, |
---|
527 | { |
---|
528 | CNU, CNU |
---|
529 | }, |
---|
530 | { |
---|
531 | CNU, CNU |
---|
532 | } |
---|
533 | }; |
---|
534 | #endif |
---|
535 | #endif |
---|
536 | |
---|
537 | #endif |
---|
538 | |
---|
539 | #if RWTH_SDC_DLT_B0036 |
---|
540 | #if PKU_QC_DEPTH_INTRA_UNI_D0195 |
---|
541 | static const UChar INIT_DEPTHMODE_FLAG[3][DEPTH_MODE_NUM_FLAG_CTX]= |
---|
542 | { |
---|
543 | {0, 0, 64, 0, CNU, 0, CNU, 0}, |
---|
544 | {0, 64, 0, CNU, 0, CNU, 0, 0}, |
---|
545 | {64, 0, CNU, 0, CNU, 0, 0, 0} |
---|
546 | }; |
---|
547 | static const UChar INIT_DMMDELTA_FLAG[3][DMM_DELTA_NUM_FLAG_CTX]= |
---|
548 | { |
---|
549 | {0}, |
---|
550 | {0}, |
---|
551 | {64} |
---|
552 | }; |
---|
553 | #else |
---|
554 | static const Short INIT_SDC_FLAG[3][SDC_NUM_FLAG_CTX][2] = |
---|
555 | { |
---|
556 | { |
---|
557 | { 0, 64 }, { 0, 64 }, { 0, 64 } |
---|
558 | }, |
---|
559 | { |
---|
560 | { 0, 64 }, { 0, 64 }, { 0, 64 } |
---|
561 | }, |
---|
562 | { |
---|
563 | { 0, 64 }, { 0, 64 }, { 0, 64 } |
---|
564 | } |
---|
565 | }; |
---|
566 | #endif |
---|
567 | |
---|
568 | #if RWTH_SDC_CTX_SIMPL_D0032 |
---|
569 | static const UChar INIT_SDC_RESIDUAL_FLAG[3][SDC_NUM_RESIDUAL_FLAG_CTX] = |
---|
570 | { |
---|
571 | { |
---|
572 | CNU |
---|
573 | |
---|
574 | }, |
---|
575 | { |
---|
576 | CNU |
---|
577 | }, |
---|
578 | { |
---|
579 | CNU |
---|
580 | } |
---|
581 | }; |
---|
582 | |
---|
583 | #if LGE_CONCATENATE_D0141 |
---|
584 | static const UChar INIT_SDC_RESIDUAL[3][SDC_NUM_RESIDUAL_CTX] = |
---|
585 | { |
---|
586 | { |
---|
587 | 155 |
---|
588 | }, |
---|
589 | { |
---|
590 | 155 |
---|
591 | }, |
---|
592 | { |
---|
593 | 155 |
---|
594 | } |
---|
595 | }; |
---|
596 | #else |
---|
597 | static const UChar INIT_SDC_RESIDUAL[3][SDC_NUM_RESIDUAL_CTX] = |
---|
598 | { |
---|
599 | { |
---|
600 | CNU, CNU, CNU, CNU, CNU, CNU, CNU, CNU |
---|
601 | }, |
---|
602 | { |
---|
603 | CNU, CNU, CNU, CNU, CNU, CNU, CNU, CNU |
---|
604 | }, |
---|
605 | { |
---|
606 | CNU, CNU, CNU, CNU, CNU, CNU, CNU, CNU |
---|
607 | } |
---|
608 | }; |
---|
609 | #endif |
---|
610 | |
---|
611 | static const UChar INIT_SDC_PRED_MODE[3][3*SDC_NUM_PRED_MODE_CTX] = |
---|
612 | { |
---|
613 | { |
---|
614 | CNU, CNU |
---|
615 | ,CNU, CNU, CNU, CNU, CNU, CNU, CNU, CNU, CNU, CNU, CNU, CNU, CNU |
---|
616 | }, |
---|
617 | { |
---|
618 | CNU, CNU |
---|
619 | ,CNU, CNU, CNU, CNU, CNU, CNU, CNU, CNU, CNU, CNU, CNU, CNU, CNU |
---|
620 | }, |
---|
621 | { |
---|
622 | CNU, CNU |
---|
623 | ,CNU, CNU, CNU, CNU, CNU, CNU, CNU, CNU, CNU, CNU, CNU, CNU, CNU |
---|
624 | } |
---|
625 | }; |
---|
626 | #else |
---|
627 | static const Short INIT_SDC_RESIDUAL_FLAG[3][3*SDC_NUM_RESIDUAL_FLAG_CTX][2] = |
---|
628 | { |
---|
629 | { |
---|
630 | { -5, 35 }, |
---|
631 | { -0, 56 }, |
---|
632 | { -0, 56 } |
---|
633 | |
---|
634 | }, |
---|
635 | { |
---|
636 | { -5, 35 }, |
---|
637 | { -0, 56 }, |
---|
638 | { -0, 56 } |
---|
639 | }, |
---|
640 | { |
---|
641 | { -5, 35 }, |
---|
642 | { -0, 56 }, |
---|
643 | { -0, 56 } |
---|
644 | } |
---|
645 | }; |
---|
646 | |
---|
647 | static const Short INIT_SDC_SIGN_FLAG[3][3*SDC_NUM_SIGN_FLAG_CTX][2] = |
---|
648 | { |
---|
649 | { |
---|
650 | { -1, 56 }, |
---|
651 | { -4, 55 }, |
---|
652 | { -4, 55 } |
---|
653 | }, |
---|
654 | { |
---|
655 | { -1, 56 }, |
---|
656 | { -4, 55 }, |
---|
657 | { -4, 55 } |
---|
658 | }, |
---|
659 | { |
---|
660 | { -1, 56 }, |
---|
661 | { -4, 55 }, |
---|
662 | { -4, 55 } |
---|
663 | } |
---|
664 | }; |
---|
665 | |
---|
666 | static const Short INIT_SDC_RESIDUAL[3][3*SDC_NUM_RESIDUAL_CTX][2] = |
---|
667 | { |
---|
668 | { |
---|
669 | { -1, 64 }, { 2, 64 }, { 6, 67 }, { 8, 61 }, { 7, 47 }, { 10, 33 }, { 12, 14 }, { 33, -13 }, { 12, 14 }, { 33, -13 }, |
---|
670 | { 2, 66 }, { -0, 63 }, { 1, 64 }, { 6, 65 }, { 7, 59 }, { 12, 50 }, { 14, 27 }, { -0, -17 }, { 14, 27 }, { -0, -17 }, |
---|
671 | { 2, 66 }, { -0, 63 }, { 1, 64 }, { 6, 65 }, { 7, 59 }, { 12, 50 }, { 14, 27 }, { -0, -17 }, { 14, 27 }, { -0, -17 } |
---|
672 | }, |
---|
673 | { |
---|
674 | { -1, 64 }, { 2, 64 }, { 6, 67 }, { 8, 61 }, { 7, 47 }, { 10, 33 }, { 12, 14 }, { 33, -13 }, { 12, 14 }, { 33, -13 }, |
---|
675 | { 2, 66 }, { -0, 63 }, { 1, 64 }, { 6, 65 }, { 7, 59 }, { 12, 50 }, { 14, 27 }, { -0, -17 }, { 14, 27 }, { -0, -17 }, |
---|
676 | { 2, 66 }, { -0, 63 }, { 1, 64 }, { 6, 65 }, { 7, 59 }, { 12, 50 }, { 14, 27 }, { -0, -17 }, { 14, 27 }, { -0, -17 } |
---|
677 | }, |
---|
678 | { |
---|
679 | { -1, 64 }, { 2, 64 }, { 6, 67 }, { 8, 61 }, { 7, 47 }, { 10, 33 }, { 12, 14 }, { 33, -13 }, { 12, 14 }, { 33, -13 }, |
---|
680 | { 2, 66 }, { -0, 63 }, { 1, 64 }, { 6, 65 }, { 7, 59 }, { 12, 50 }, { 14, 27 }, { -0, -17 }, { 14, 27 }, { -0, -17 }, |
---|
681 | { 2, 66 }, { -0, 63 }, { 1, 64 }, { 6, 65 }, { 7, 59 }, { 12, 50 }, { 14, 27 }, { -0, -17 }, { 14, 27 }, { -0, -17 } |
---|
682 | } |
---|
683 | }; |
---|
684 | |
---|
685 | static const Short INIT_SDC_PRED_MODE[3][3*SDC_NUM_PRED_MODE_CTX][2] = |
---|
686 | { |
---|
687 | { |
---|
688 | { 9, 85 }, { -4, 60 }, { 4, 70 }, { 4, 70 }, { 4, 70 }, |
---|
689 | { 9, 85 }, { -4, 60 }, { 4, 70 }, { 4, 70 }, { 4, 70 }, |
---|
690 | { 9, 85 }, { -4, 60 }, { 4, 70 }, { 4, 70 }, { 4, 70 } |
---|
691 | }, |
---|
692 | { |
---|
693 | { 9, 85 }, { -4, 60 }, { 4, 70 }, { 4, 70 }, { 4, 70 }, |
---|
694 | { 9, 85 }, { -4, 60 }, { 4, 70 }, { 4, 70 }, { 4, 70 }, |
---|
695 | { 9, 85 }, { -4, 60 }, { 4, 70 }, { 4, 70 }, { 4, 70 } |
---|
696 | }, |
---|
697 | { |
---|
698 | { 9, 85 }, { -4, 60 }, { 4, 70 }, { 4, 70 }, { 4, 70 }, |
---|
699 | { 9, 85 }, { -4, 60 }, { 4, 70 }, { 4, 70 }, { 4, 70 }, |
---|
700 | { 9, 85 }, { -4, 60 }, { 4, 70 }, { 4, 70 }, { 4, 70 } |
---|
701 | } |
---|
702 | }; |
---|
703 | #endif |
---|
704 | #endif |
---|
705 | |
---|
706 | //! \} |
---|
707 | |
---|
708 | #endif |
---|
709 | |
---|