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1/* The copyright in this software is being made available under the BSD
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33
34/** \file     TypeDef.h
35    \brief    Define basic types, new types and enumerations
36*/
37
38#ifndef _TYPEDEF__
39#define _TYPEDEF__
40
41//! \ingroup TLibCommon
42//! \{
43/////////////////////////////////////////////////////////////////////////////////////////
44///////////////////////////////// EXTENSION SELECTION /////////////////////////////////// 
45/////////////////////////////////////////////////////////////////////////////////////////
46
47/* HEVC_EXT might be defined by compiler/makefile options.
48   
49   Linux makefiles support the following settings:   
50   make             -> HEVC_EXT not defined   
51   make HEVC_EXT=0  -> H_MV=0 H_3D=0   --> plain HM
52   make HEVC_EXT=1  -> H_MV=1 H_3D=0   --> MV only
53   make HEVC_EXT=2  -> H_MV=1 H_3D=1   --> full 3D
54*/
55
56#ifndef HEVC_EXT
57#define HEVC_EXT                    2
58#endif
59
60#if ( HEVC_EXT < 0 )||( HEVC_EXT > 2 )
61#error HEVC_EXT must be in the range of 0 to 2, inclusive.
62#endif
63
64#define H_MV          ( HEVC_EXT != 0)
65#define H_3D          ( HEVC_EXT == 2)
66
67#define NTT_BUG_FIX_TK54    1
68#define BUG_FIX_TK65        1
69
70#define MTK_I0093           1
71/////////////////////////////////////////////////////////////////////////////////////////
72///////////////////////////////////   MAJOR DEFINES   /////////////////////////////////// 
73/////////////////////////////////////////////////////////////////////////////////////////
74
75#if H_MV
76#define H_MV_ENC_DEC_TRAC                 1  //< CU/PU level tracking
77#endif
78
79#if H_3D
80#define H_3D_QTLPC                        1   // OL_QTLIMIT_PREDCODING_B0068 //JCT3V-B0068
81                                              // HHI_QTLPC_RAU_OFF_C0160 JCT3V-C0160 change 2: quadtree limitation and predictive coding switched off in random access units
82                                              // MTK_TEX_DEP_PAR_G0055 Texture-partition-dependent depth partition. JCT3V-G0055
83
84#define H_3D_VSO                          1   // VSO, View synthesis optimization, includes:
85                                              // HHI_VSO
86                                              // HHI_VSO_LS_TABLE_M23714 enable table base Lagrange multiplier optimization
87                                              // SAIT_VSO_EST_A0033, JCT3V-A0033 modification 3
88                                              // LGE_WVSO_A0119
89                                              // SCU_HS_VSD_BUGFIX_IMPROV_G0163
90#define H_3D_NBDV                         1   // Neighboring block disparity derivation
91                                              // QC_JCT3V-A0097
92                                              // LGE_DVMCP_A0126
93                                              // LGE_DVMCP_MEM_REDUCTION_B0135     
94                                              // QC_SIMPLE_NBDV_B0047
95                                              // FIX_LGE_DVMCP_B0133
96                                              // QC_NBDV_LDB_FIX_C0055
97                                              // MTK_SAIT_TEMPORAL_FIRST_ORDER_C0141_C0097
98                                              // MTK_SIMPLIFY_DVTC_C0135           
99                                              // QC_CU_NBDV_D0181
100                                              // SEC_DEFAULT_DV_D0112
101                                              // MTK_DVMCP_FIX_E0172       fix the mismatch between software and WD for DV derivation from DVMCP blocks, issue 2 in JCT3V-E0172
102                                              // SEC_SIMPLIFIED_NBDV_E0142 Simplified NBDV, JCT3V-E0142 and JCT3V-E0190
103                                              // MTK_NBDV_TN_FIX_E0172     fix the issue of DV derivation from the temporal neighboring blocks, issue 7 in JCT3V-E0172
104                                              // MTK_TEXTURE_MRGCAND_BUGFIX_E0182  Bug fix for TEXTURE MERGING CANDIDATE     , JCT3V-E0182
105#define LGE_SIMP_DISP_AVAIL_J0041    1   // Use 2 status for disparity availability - DISP_AVAILABLE and DISP_NONE
106
107#define H_3D_ARP                          1   // Advanced residual prediction (ARP), JCT3V-D0177
108                                              // QC_MTK_INTERVIEW_ARP_F0123_F0108 JCT3V-F0123; JCT3V-F0108
109                                              // SHARP_ARP_REF_CHECK_F0105        ARP reference picture selection and DPB check
110                                              // LGE_ARP_CTX_F0161                JCT3V-F0161
111                                              // MTK_ARP_FLAG_CABAC_SIMP_G0061 Use 2 context for ARP flag referring to only left neighbor block in JCT3V-G0061
112                                              // MTK_ARP_REF_SELECTION_G0053 ARP Reference picture selection in JCT3V-G0053
113                                              // MTK_ALIGN_SW_WD_BI_PRED_ARP_H0085  Align the SW and WD for the bi-prediction ARP PUs by disallowing non-normative fast bi-prediction for ARP PUs, JCT3V-H0085
114                                              // QC_I0051_ARP_SIMP         
115                                              // SHARP_ARP_CHROMA_I0104     
116                                              // MTK_I0072_IVARP_SCALING_FIX
117#define SEC_ARP_VIEW_REF_CHECK_J0037      1   // Signaling iv_res_pred_weight_idx when the current slice has both view and temporal reference picture(s), JCT3V-J0037 item1
118
119#define H_3D_IC                           1   // Illumination Compensation, JCT3V-B0045, JCT3V-C0046, JCT3V-D0060
120                                              // Unifying rounding offset, for IC part, JCT3V-D0135
121                                              // Full Pel Interpolation for Depth, HHI_FULL_PEL_DEPTH_MAP_MV_ACC
122                                              // SHARP_ILLUCOMP_REFINE_E0046
123                                              // MTK_CLIPPING_ALIGN_IC_E0168       // To support simplify bi-prediction PU with identical motion checking, JCT3V-E0168
124                                              // LGE_IC_CTX_F0160 //JCT3V-F0160
125                                              // SEC_ONLY_TEXTURE_IC_F0151
126                                              // MTK_IC_FLAG_CABAC_SIMP_G0061
127                                              // SEC_IC_ARP_SIG_G0072, Disabling IC when ARP is enabled, option 1 in JCT3V-G0072, part 2 in JCT3V-G0121
128                                              // MTK_LOW_LATENCY_IC_ENCODING_H0086  Low-latency IC encoding in JCT3V-H0086
129                                              // MTK_LOW_LATENCY_IC_ENCODING_H0086_FIX  1  // Remove the global variables used in JCT3V-H0086
130                                              // SEC_IC_NEIGHBOR_CLIP_I0080    // Clipping of neighboring sample position, JCT3V-I0080
131
132#if H_3D_NBDV
133#define H_3D_NBDV_REF                     1   // Depth oriented neighboring block disparity derivation
134                                              // MTK_D0156
135                                              // MERL_D0166: Reference view selection in NBDV & Bi-VSP
136                                              // MERL_C0152: Basic VSP
137                                              // NBDV_DEFAULT_VIEWIDX_BUGFIX Bug fix for invalid default view index for NBDV
138                                              // NTT_DoNBDV_VECTOR_CLIP_E0141 disparity vector clipping in DoNBDV, JCT3V-E0141 and JCT3V-E0209
139                                              // SEC_VER_DONBDV_H0103          Vertical DV Restriction for DoNBDV
140#endif
141
142#define H_3D_VSP                          1   // View synthesis prediction
143                                              // MERL_C0152: Basic VSP
144                                              // MERL_D0166: Reference view selection in NBDV & Bi-VSP
145                                              // MTK_D0105, LG_D0139: No VSP for depth
146                                              // QC_D0191: Clean up
147                                              // LG_D0092: Multiple VSP candidate allowed
148                                              // MTK_VSP_FIX_ALIGN_WD_E0172
149                                              // NTT_VSP_ADAPTIVE_SPLIT_E0207 adaptive sub-PU partitioning in VSP, JCT3V-E0207
150                                              // NTT_VSP_DC_BUGFIX_E0208 bugfix for sub-PU based DC in VSP, JCT3V-E0208
151                                              // NTT_VSP_COMMON_E0207_E0208 common part of JCT3V-E0207 and JCT3V-E0208
152                                              // MTK_F0109_LG_F0120_VSP_BLOCK MTK_LG_SIMPLIFY_VSP_BLOCK_PARTITION_F0109_F0120 
153                                              // SHARP_VSP_BLOCK_IN_AMP_F0102 VSP partitioning for AMP
154                                              // MTK_VSP_SIMPLIFICATION_F0111 1. Inherited VSP also use NBDV of current CU, 2. VSP cannot be inherited from above LCU rowss
155                                              // LGE_SHARP_VSP_INHERIT_F0104
156                                              // NTT_STORE_SPDV_VSP_G0148 Storing Sub-PU based DV for VSP
157                                              // Restricted bi-prediction for VSP
158#define SEC_A1_BASED_VSP_J0039            1   // Removal of redundant VSP in Merge list
159
160
161#define H_3D_IV_MERGE                     1   // Inter-view motion merge candidate
162                                              // HHI_INTER_VIEW_MOTION_PRED
163                                              // SAIT_IMPROV_MOTION_PRED_M24829, improved inter-view motion vector prediction
164                                              // QC_MRG_CANS_B0048             , JCT3V-B0048, B0086, B0069
165                                              // OL_DISMV_POS_B0069            , different pos for disparity MV candidate, B0069
166                                              // MTK_INTERVIEW_MERGE_A0049     , second part
167                                              // QC_AMVP_MRG_UNIFY_IVCAN_C0051     
168                                              // TEXTURE MERGING CANDIDATE     , JCT3V-C0137
169                                              // QC_INRIA_MTK_MRG_E0126
170                                              // ETRIKHU_MERGE_REUSE_F0093 QC_DEPTH_IV_MRG_F0125, JCT3V-F0125: Depth oriented Inter-view MV candidate
171                                              // EC_MPI_ENABLING_MERGE_F0150, MPI flag in VPS and enabling in Merge mode
172                                              // MTK_NBDV_IVREF_FIX_G0067      , Disable IvMC, VSP when IVREF is not available, JCT3V-G0067
173                                              // SEC_DEPTH_DV_DERIVAITON_G0074, Simplification of DV derivation for depth, JCT3V-G0074
174                                              // QC_DEPTH_MERGE_SIMP_G0127 Remove DV candidate and shifting candidate for depth coding
175                                              // QC_IV_PRED_CONSTRAINT_H0137   Constraint on inter-view (motion) prediction tools
176                                              // ETRIKHU_BUGFIX_H0083          bug-fix for DV candidate pruning
177                                              // ETRIKHU_CLEANUP_H0083         cleaned-up source code for constructing merging candidate list
178                                              // ETRIKHU_CLEANUP_H0083_MISSING missing guard macros added by GT
179                                              // SHARP_SIMPLE_MERGE_H0062      Restrict 3D-HEVC merge cand in small PUs
180                                              // MTK_DIS_SPBIP8X4_H0205        Disable bi-prediction for 8x4 and 4x8 sub PU and remove the SPIVMP 2Nx2N restriction
181                                              // SEC_ADAPT_DISABLE_IVMP        Disabling IVMP merge candidates when IC is enabled, JCT3V-H0070
182                                              // SEC_SIMP_SHIFTED_DV_I0086     Simplification of Shifted DV candidate, JCT3V-I0086
183
184
185
186#define H_3D_TMVP                         1   // QC_TMVP_C0047
187                                              // Sony_M23639
188
189#define H_3D_DIM                          1   // DIM, Depth intra modes, includes:
190                                              // HHI_DMM_WEDGE_INTRA
191                                              // HHI_DMM_PRED_TEX
192                                              // FIX_WEDGE_NOFLOAT_D0036
193                                              // LGE_EDGE_INTRA_A0070
194                                              // LGE_DMM3_SIMP_C0044
195                                              // QC_DC_PREDICTOR_D0183
196                                              // HHI_DELTADC_DLT_D0035
197                                              // PKU_QC_DEPTH_INTRA_UNI_D0195
198                                              // RWTH_SDC_DLT_B0036
199                                              // INTEL_SDC64_D0193
200                                              // RWTH_SDC_CTX_SIMPL_D0032
201                                              // LGE_CONCATENATE_D0141
202                                              // FIX_SDC_ENC_RD_WVSO_D0163
203                                              // MTK_SAMPLE_BASED_SDC_D0110
204                                              // SEC_DMM2_E0146_HHIFIX Removal of DMM2 from DMMs
205                                              // ZJU_DEPTH_INTRA_MODE_E0204 Simplified Binarization for depth_intra_mode
206                                              // KWU_SDC_SIMPLE_DC_E0117 Simplified DC calculation for SDC
207                                              // SCU_HS_DMM4_REMOVE_DIV_E0242 DMM4 Division Removal
208                                              // LGE_SDC_REMOVE_DC_E0158 Removal of DC mode from SDC
209                                              // LGE_PKU_DMM3_OVERLAP_E0159_HHIFIX 1   Removal of overlap between DMM3 and DMM1
210                                              // LGE_PRED_RES_CODING_DLT_DOMAIN_F0159 JCT3V-F0159
211                                              // HHI_DIM_PREDSAMP_FIX_F0171
212                                              // SEC_DMM3_RBC_F0147 Removal of DMM3 and RBC from DMMs
213                                              // QC_DIM_DELTADC_UNIFY_F0132 Unify delta DC coding in depth intra modes
214                                              // Unify intra SDC and inter SDC
215                                              // QC_GENERIC_SDC_G0122 Generalize SDC to all depth intra modes
216                                              // SCU_HS_DEPTH_DC_PRED_G0143
217                                              // HS_TSINGHUA_SDC_SPLIT_G0111
218                                              // QC_PKU_SDC_SPLIT_G0123 Intra SDC Split
219                                              // HS_DMM_SDC_PREDICTOR_UNIFY_H0108  Unification of DMM and SDC predictor derivation
220                                              // LGE_SIMP_DIM_NOT_PRESENT_FLAG_CODING_H0119_H0135  Use only one context for CABAC of dim_not_present_flag
221                                              // QC_SIMP_DELTADC_CODING_H0131   Simplify detaDC entropy coding
222                                              // MTK_DMM_SIMP_CODE_H0092        Remove CABAC context for DMM1 mode coding
223                                              // MTK_DELTA_DC_FLAG_ONE_CONTEXT_H0084_H0100_H0113 Use only one context for CABAC of delta_dc_flag as in JCTVC-H0084, JCTVC-H0100 and JCTVC-H0113
224                                              // MTK_SDC_FLAG_FIX_H0095                          Remove conditional check of PCM flag based on SDC flag, JCTVC-H0095
225                                              // SEC_NO_RESI_DLT_H0105   
226                                              // MTK_DLT_CODING_FIX_H0091
227                                              // HS_DMM_SIGNALLING_I0120
228                                              // SHARP_DMM1_I0110 // LUT size reduction for DMM1 proposed in JCT3V-I0110
229                                              // FAST_SDC_OFFSET_DECISION_I0084
230                                              // SEPARATE_FLAG_I0085
231                                              // H_3D_DELTA_DLT
232                                              // RWTH_DLT_CLIP_I0057               1
233
234
235
236#define H_3D_SINGLE_DEPTH                 1   // Single depth mode proposed in JCT3V-I0095
237
238
239#define H_3D_INTER_SDC                    1   // INTER SDC, Inter simplified depth coding
240                                              // LGE_INTER_SDC_E0156 Enable inter SDC for depth coding
241                                              // SEC_INTER_SDC_G0101 Improved inter SDC with multiple DC candidates
242
243#define H_3D_SPIVMP                       1   // H_3D_SPIVMP    // JCT3V-F0110: Sub-PU level inter-view motion prediction
244                                              // SEC_SPIVMP_MCP_SIZE_G0077, Apply SPIVMP only to 2Nx2N partition, JCT3V-G0077
245                                              // QC_SPIVMP_MPI_G0119 Sub-PU level MPI merge candidate
246                                              // Simplification on Sub-PU level temporal interview motion prediction
247                                              // MPI_SUBPU_DEFAULT_MV_H0077_H0099_H0111_H0133
248
249#define H_3D_DBBP                         1   // DBBP: Depth-based Block Partitioning and Merging
250                                              // MTK_DBBP_AMP_REM_H0072   
251                                              // RWTH_DBBP_NO_SPU_H0057   
252                                              // SEC_DBBP_FILTERING_H0104
253                                              // MTK_DBBP_SIGNALING_H0094   
254                                              // H_3D_FIX_DBBP_IVMP        Fix . Enable IVMP is always disabled, when DBBP is enabled. The original intention is to disable Sub-PU IVMP when DBBP is enabled, not to disable IVMP itself.
255                                              // SEC_DBBP_EXPLICIT_SIG_I0077       1   // Remove the partition derivation and signal dbbp_flag only when the partition mode is 2NxN/Nx2N, JCT3V-I0077
256                                              // Disallow DBBP in 8x8 CU, JCT3V-I0078
257                                              // SHARP_DBBP_SIMPLE_FLTER_I0109     1   // Simple condition and one dimensional filter for DBBP
258                                              // SEC_DBBP_DMM4_THRESHOLD_I0076     Simplification of threshold derivation for DBBP and DMM4, JCT3V-I0076
259#define SEC_DBBP_VIEW_REF_CHECK_J0037     1   // Signaling dbbp_flag when the current slice has view reference picture(s), JCT3V-J0037 item4
260
261#define H_3D_DDD                          1   // Disparity derived depth coding
262#define LGE_DDD_REMOVAL_J0042_J0030       1   // DDD removal
263
264#define H_3D_FCO                          0   // Flexible coding order for 3D
265#if H_3D_FCO
266#define H_3D_FCO                          1
267#endif
268
269#define H_3D_FAST_INTRA_SDC               1   // I0123
270
271// OTHERS
272                                              // MTK_SONY_PROGRESSIVE_MV_COMPRESSION_E0170 // Progressive MV Compression, JCT3V-E0170
273#define H_3D_REN_MAX_DEV_OUT              0   // Output maximal possible shift deviation
274#define H_3D_FAST_TEXTURE_ENCODING        1   // Fast merge mode decision and early CU determination for texture component of dependent view, JCT3V-E0173
275                                              // MTK_FAST_TEXTURE_ENCODING_E0173
276#if H_3D_DIM
277#define H_3D_FAST_DEPTH_INTRA             1   // Fast DMM and RBC Mode Selection
278                                              // SCU_HS_FAST_DEPTH_INTRA_E0238_HHIFIX
279#endif
280
281// Rate Control
282#define KWU_FIX_URQ                       1
283#define KWU_RC_VIEWRC_E0227               0  ///< JCT3V-E0227, view-wise target bitrate allocation
284#define KWU_RC_MADPRED_E0227              0  ///< JCT3V-E0227, inter-view MAD prediction
285#endif // H_3D
286
287
288
289/////////////////////////////////////////////////////////////////////////////////////////
290///////////////////////////////////   DERIVED DEFINES /////////////////////////////////// 
291/////////////////////////////////////////////////////////////////////////////////////////
292
293// Fixes
294
295
296#if H_3D
297#define HHI_DEPENDENCY_SIGNALLING_I1_J0107     1
298#endif
299
300///// ***** SINGLE DEPTH MODE *********
301#if H_3D_SINGLE_DEPTH
302#define SINGLE_DEPTH_MODE_CAND_LIST_SIZE            2 // size of the sample candidate list
303#endif
304
305///// ***** VIEW SYNTHESIS OPTIMIZAION *********
306#if H_3D_VSO                                 
307#define H_3D_VSO_DIST_INT                 1   // Allow negative synthesized view distortion change
308#define H_3D_VSO_COLOR_PLANES             1   // Compute VSO distortion on color planes
309#define H_3D_VSO_EARLY_SKIP               1   // LGE_VSO_EARLY_SKIP_A0093, A0093 modification 4
310#define H_3D_VSO_RM_ASSERTIONS            0   // Output VSO assertions
311#define H_3D_VSO_SYNTH_DIST_OUT           0   // Output of synthesized view distortion instead of depth distortion in encoder output
312#endif
313
314////   ****** NEIGHBOURING BLOCK-BASED DISPARITY VECTOR  *********
315#if H_3D_NBDV
316#define DVFROM_LEFT                       0
317#define DVFROM_ABOVE                      1
318#define IDV_CANDS                         2
319#define LGE_DEFAULT_DV_J0046              1
320#endif
321
322///// ***** ADVANCED INTERVIEW RESIDUAL PREDICTION *********
323#if H_3D_ARP
324#define H_3D_ARP_WFNR                     3
325#endif
326
327///// ***** DEPTH INTRA MODES *********
328#if H_3D_DIM
329                                              // HHI_DMM4_ENC_I0066
330#define H_3D_DIM_DMM                      1   // Depth Modeling Modes
331#define H_3D_DIM_SDC                      1   // Simplified Depth Coding method
332#define H_3D_DIM_DLT                      1   // Depth Lookup Table
333
334#define H_3D_DIM_ENC                      1   // Depth Intra encoder optimizations, includes:
335                                              // HHI_DEPTH_INTRA_SEARCH_RAU_C0160
336                                              // LG_ZEROINTRADEPTHRESI_A0087
337#endif
338///// ***** VIEW SYNTHESIS PREDICTION *********
339#if H_3D_VSP
340#define H_3D_VSP_BLOCKSIZE                4   // Supported values: 1, 2, and 4
341#if H_3D_VSP_BLOCKSIZE == 1
342#define H_3D_VSP_CONSTRAINED              1   // Constrained VSP @ 1x1
343#else
344#define H_3D_VSP_CONSTRAINED              0
345#endif
346#endif
347
348
349///// ***** ILLUMATION COMPENSATION *********
350#if H_3D_IC
351#define IC_REG_COST_SHIFT                 7
352#define IC_CONST_SHIFT                    5
353#define IC_SHIFT_DIFF                     12
354#define IC_LOW_LATENCY_ENCODING_THRESHOLD 0.1 // Threshold for low-latency IC encoding in JCT3V-H0086
355#define LGE_CHROMA_IC_J0050_J0034         1
356#endif
357
358
359///// ***** DEPTH BASED BLOCK PARTITIONING *********
360#if H_3D_DBBP
361#define DBBP_INVALID_SHORT                (-4)
362#define DBBP_PACK_MODE               SIZE_2NxN
363#endif
364
365
366///// ***** FCO *********
367#if H_3D_FCO
368#define H_3D_FCO_VSP_DONBDV_E0163               1   // Adaptive depth reference for flexible coding order
369#else
370#define H_3D_FCO_VSP_DONBDV_E0163               0   // Adaptive depth reference for flexible coding order
371#endif
372
373#if H_3D
374#define PPS_FIX_DEPTH                           1
375#endif
376
377/////////////////////////////////////////////////////////////////////////////////
378///////////////////////////////////   MV_HEVC HLS  //////////////////////////////
379/////////////////////////////////////////////////////////////////////////////////
380// TBD: Check if integration is necessary.
381#define H_MV_HLS_PTL_LIMITS                  0
382#define H_MV_HLS7_GEN                        0  // General changes (not tested)
383#define H_MV_ALIGN_HM_15                     1 
384
385// POC
386// #define H_MV_HLS_7_POC_P0041_3            0 // (POC/P0041/POC reset) #3 It was remarked that we should require each non-IRAP picture that has discardable_flag equal to 1 to have NUT value indicating that it is a sub-layer non-reference picture. This was agreed. Decision: Adopt (with constraint for discardable_flag as described above)
387// #define H_MV_HLS_7_POC_P0041_FIXES        0 // (POC/P0041/Fixes) For each non-IRAP picture that has discardable_flag equal to 1 to have NUT value indicating that it is a sub-layer non-reference picture.
388// #define H_MV_HLS_7_POC_P0056_4            0 // (POC/P0056/layer tree poc) #4 Proposal 1: If the POC reset approach is adopted as the basis for multi-layer POC derivation, it is proposed to derive the POC anchor picture from the previous TID0 picture (that is not a RASL picture, a RADL picture or a sub-layer non-reference picture and not with discardable_flag equal to 1) of  the current layer or any of its reference layer. This is asserted to improve loss resilience and reduce bit rate overhead. Decision: Adopt Proposal 1 (with the suggested modifications Ewith text provided as P0297).
389
390// SEI related
391//#define H_MV_HLS_8_SEI_NODOC_53  0 // #53 (SEI    /NODOC/Added Multiview view position SEI message) Plain copy from AVC.
392//#define H_MV_HLS_8_SEI_NODOC_52  0 // #52 (SEI    /NODOC/Added Multiview acquisition information SEI) Plain copy from AVC.
393//#define H_MV_HLS_8_SEI_NODOC_51  0 // #51 (SEI    /NODOC/Added Multiview scene information SEI message)
394//#define H_MV_HLS_8_SEI_Q0189_35  0 // #35 (SEI    /Q0189/SEI message for indicating constraints on TMVP) Proposal 2.3,  SEI message for indicating constraints on TMVP
395//#define H_MV_HLS_8_EDF_Q0116_29  0 // #29 (ED.FIX /Q0116/Recovery point SEI) , consider adding a note regarding how random accessibility is affected by the recovery point SEI message
396//#define H_MV_HLS_8_GEN_Q0183_23  0 // #23 (GEN    /Q0183/SEI clean-ups) numerous small clean-ups on SEI messages.
397//#define H_MV_HLS_8_MIS_Q0247_49  0 // #49 (MISC   /Q0247/frame-field information SEI message)
398//#define H_MV_HLS_8_MIS_Q0189_34  0 // #34 (MISC   /Q0189/slice temporal mvp enabled flag) Proposal 2.2, clarification of semantics of slice temporal mvp enabled flag
399//#define H_MV_HLS_8_EDF_Q0081_01  0 // #1  (ED.FIX /Q0081/alpha channel persist) On reuse of alpha planes in auxiliary pictures. It was asked why there would not be a presumption that the alpha channel content would simply persist, without needing the flag to indicate it. Decision (Ed.): Delegated to editors to clarify, as necessary, that the alpha channel content persists until cancelled or updated in output order.
400//#define H_MV_HLS_8_SEI_Q0253_37  0 // #37 (SEI    /Q0253/layer not present), modified semantics of layers not present SEI message to correct bug introduced during editing
401//#define H_MV_HLS_8_SEI_Q0045_11  0 // #11 (SEI    /Q0045/Overlay) Proposal for an SEI message on selectable overlays. Decision: Adopt (modified for variable-length strings).
402//#define H_MV_HLS_7_SEI_P0133_28  0 // (SEI/P0133/Recovery point SEI) #28 Decision: Adopt change to recover point semantics only (-v3)
403//#define H_MV_HLS_7_SEI_P0123_25  0 // (SEI/P0123/Alpha channel info) #25 Add alpha channel information SEI message Decision: Adopt. Constrain the bit depth indicated to be equal to the coded bit depth of the aux picture.
404
405// DPB
406//#define H_MV_HLS_8_HRD_Q0102_09  0 // #9  (HRD    /Q0102/NoOutputOfPriorPicsFlag) It was suggested that also the separate_colour_plane_flag should affect inference of NoOutputOfPriorPicsFlag. Decision (Ed.): Agreed (affects RExt text).
407//#define H_MV_HLS_8_DBP_Q0154_38  0 // #38 (DBP    /Q0154/VPS DPB) Proposal in C.5.2.1: Add in the decoding process that when a new VPS is activated, all pictures in the DPB are marked as unused for reference
408//#define H_MV_HLS_8_HRD_Q0154_10  0 // #10 (HRD    /Q0154/DPB Flushing and parameters) On picture flushing and DPB parameters Decision: Adopted (some details to be discussed further in BoG).
409//#define H_MV_HLS_7_OTHER_P0187_1 0 // (OTHER/P0187/NoOutputOfPriorPicsFlag) #1 Inference of NoOutputOfPriorPicsFlag and proposes to take into account colour format and bit depth for the inference in addition to spatial resolution
410
411// OTHERS
412//#define H_MV_HLS_8_HSB_Q0041_03  0 // #3  (HS     /Q0041/hybrid scalability) The proposed text was endorsed, with non-editorial open issues considered as follows ?// #define H_MV_HLS_7_OTHER_P0187_1          0 // (OTHER/P0187/NoOutputOfPriorPicsFlag) #1 Inference of NoOutputOfPriorPicsFlag and proposes to take into account colour format and bit depth for the inference in addition to spatial resolution
413//#define H_MV_HLS_8_MIS_Q0078_24  0 // #24 (MISC   /Q0078/scan and pic type) , Items 3 b,c and 4, clarifying which pictures in an output layer sets are applied the values of general_progressive_source_flag, general_interlaced_source_flag, general_non_packed_constraint_flag and general_frame_only_constraint_flag.
414//#define H_MV_HLS_7_HRD_P0138_6   0 //     (HRD/P0138/HRD parameters for bitstreams excluding) #6 Decision: Adopt (as revised in updated contribution, with the specification of a flag in the BP SEI (HRD/P0192/sub-DPB) #12 Establish sub-DPBs based on the representation format indicated at the VPS level. It was suggested that the expressed shared capacity limit would need to be less than or equal to the sum of the individual capacity limits. Decision: Adopt as modified. Further study is encouraged on profile/level constraint selections.
415
416/////////////////////////////////////////////////////////////////////////////////////////
417///////////////////////////////////   HM RELATED DEFINES ////////////////////////////////
418/////////////////////////////////////////////////////////////////////////////////////////
419#define HARMONIZE_GOP_FIRST_FIELD_COUPLE  1
420#define FIX_FIELD_DEPTH                 1
421#if H_MV
422#define EFFICIENT_FIELD_IRAP            0
423#else
424#define EFFICIENT_FIELD_IRAP            1
425#endif
426#define ALLOW_RECOVERY_POINT_AS_RAP     1
427#define BUGFIX_INTRAPERIOD              1
428#define SAO_ENCODE_ALLOW_USE_PREDEBLOCK 1
429
430#define SAO_SGN_FUNC 1
431
432#define TILE_SIZE_CHECK 1
433
434#define FIX1172 1 ///< fix ticket #1172
435
436#define SETTING_PIC_OUTPUT_MARK     1
437#define SETTING_NO_OUT_PIC_PRIOR    1
438#define FIX_EMPTY_PAYLOAD_NAL       1
439#define FIX_WRITING_OUTPUT          1
440#define FIX_OUTPUT_EOS              1
441
442#define FIX_POC_CRA_NORASL_OUTPUT   1
443
444#define MAX_NUM_PICS_IN_SOP           1024
445
446#define MAX_NESTING_NUM_OPS         1024
447#define MAX_NESTING_NUM_LAYER       64
448
449#if H_MV
450#define MAX_VPS_NUM_HRD_PARAMETERS                1024
451#else
452#define MAX_VPS_NUM_HRD_PARAMETERS                1
453#endif
454#if H_MV
455#define MAX_NUM_SUB_LAYERS                        7
456#define MAX_NUM_SIGNALLED_PARTITIONING_SCHEMES    16
457#endif
458#define MAX_VPS_OP_SETS_PLUS1                     1024
459#if H_MV
460#define MAX_VPS_NUM_ADD_LAYER_SETS                1024
461#define MAX_VPS_NUH_LAYER_ID_PLUS1  63
462#define MAX_NUM_SCALABILITY_TYPES   16
463#define ENC_CFG_CONSOUT_SPACE       29           
464#else
465#define MAX_VPS_NUH_RESERVED_ZERO_LAYER_ID_PLUS1  1
466#endif
467
468
469#define MAX_CPB_CNT                     32  ///< Upper bound of (cpb_cnt_minus1 + 1)
470#if H_MV
471#define MAX_NUM_LAYER_IDS               63
472#define MAX_NUM_LAYERS                  63
473#define MAX_VPS_PROFILE_TIER_LEVEL      64
474#define MAX_VPS_ADD_OUTPUT_LAYER_SETS   1024
475#define MAX_VPS_OUTPUTLAYER_SETS        ( MAX_VPS_ADD_OUTPUT_LAYER_SETS + MAX_VPS_OP_SETS_PLUS1 + MAX_VPS_OP_SETS_PLUS1 )
476#define  MAX_NUM_VIDEO_SIGNAL_INFO      16
477#define MAX_NUM_SCALED_REF_LAYERS       MAX_NUM_LAYERS-1
478#else
479#define MAX_NUM_LAYER_IDS                64
480#endif
481
482#define COEF_REMAIN_BIN_REDUCTION        3 ///< indicates the level at which the VLC
483                                           ///< transitions from Golomb-Rice to TU+EG(k)
484
485#define CU_DQP_TU_CMAX 5                   ///< max number bins for truncated unary
486#define CU_DQP_EG_k 0                      ///< expgolomb order
487
488#define SBH_THRESHOLD                    4  ///< I0156: value of the fixed SBH controlling threshold
489 
490#define SEQUENCE_LEVEL_LOSSLESS           0  ///< H0530: used only for sequence or frame-level lossless coding
491
492#define DISABLING_CLIP_FOR_BIPREDME         1  ///< Ticket #175
493 
494#define C1FLAG_NUMBER               8 // maximum number of largerThan1 flag coded in one chunk :  16 in HM5
495#define C2FLAG_NUMBER               1 // maximum number of largerThan2 flag coded in one chunk:  16 in HM5
496#define SAO_ENCODING_CHOICE              1  ///< I0184: picture early termination
497#if SAO_ENCODING_CHOICE
498#define SAO_ENCODING_RATE                0.75
499#define SAO_ENCODING_CHOICE_CHROMA       1 ///< J0044: picture early termination Luma and Chroma are handled separately
500#if SAO_ENCODING_CHOICE_CHROMA
501#define SAO_ENCODING_RATE_CHROMA         0.5
502#endif
503#endif
504
505#define MAX_NUM_VPS                16
506#define MAX_NUM_SPS                16
507#define MAX_NUM_PPS                64
508
509#define RDOQ_CHROMA_LAMBDA          1   ///< F386: weighting of chroma for RDOQ
510
511#define MIN_SCAN_POS_CROSS          4
512
513#define FAST_BIT_EST                1   ///< G763: Table-based bit estimation for CABAC
514
515#define MLS_GRP_NUM                         64     ///< G644 : Max number of coefficient groups, max(16, 64)
516#define MLS_CG_SIZE                         4      ///< G644 : Coefficient group size of 4x4
517
518#define ADAPTIVE_QP_SELECTION               1      ///< G382: Adaptive reconstruction levels, non-normative part for adaptive QP selection
519#if ADAPTIVE_QP_SELECTION
520#define ARL_C_PRECISION                     7      ///< G382: 7-bit arithmetic precision
521#define LEVEL_RANGE                         30     ///< G382: max coefficient level in statistics collection
522#endif
523
524#define HHI_RQT_INTRA_SPEEDUP             1           ///< tests one best mode with full rqt
525#define HHI_RQT_INTRA_SPEEDUP_MOD         0           ///< tests two best modes with full rqt
526
527#if HHI_RQT_INTRA_SPEEDUP_MOD && !HHI_RQT_INTRA_SPEEDUP
528#error
529#endif
530
531#define VERBOSE_RATE 0 ///< Print additional rate information in encoder
532
533#define AMVP_DECIMATION_FACTOR            4
534
535#define SCAN_SET_SIZE                     16
536#define LOG2_SCAN_SET_SIZE                4
537
538#define FAST_UDI_MAX_RDMODE_NUM               35          ///< maximum number of RD comparison in fast-UDI estimation loop
539
540#define ZERO_MVD_EST                          0           ///< Zero Mvd Estimation in normal mode
541
542#define NUM_INTRA_MODE 36
543#if !REMOVE_LM_CHROMA
544#define LM_CHROMA_IDX  35
545#endif
546
547#define WRITE_BACK                      1           ///< Enable/disable the encoder to replace the deltaPOC and Used by current from the config file with the values derived by the refIdc parameter.
548#define AUTO_INTER_RPS                  1           ///< Enable/disable the automatic generation of refIdc from the deltaPOC and Used by current from the config file.
549#define PRINT_RPS_INFO                  0           ///< Enable/disable the printing of bits used to send the RPS.
550                                                    // using one nearest frame as reference frame, and the other frames are high quality (POC%4==0) frames (1+X)
551                                                    // this should be done with encoder only decision
552                                                    // but because of the absence of reference frame management, the related code was hard coded currently
553
554#define RVM_VCEGAM10_M 4
555
556#define PLANAR_IDX             0
557#define VER_IDX                26                    // index for intra VERTICAL   mode
558#define HOR_IDX                10                    // index for intra HORIZONTAL mode
559#define DC_IDX                 1                     // index for intra DC mode
560#define NUM_CHROMA_MODE        5                     // total number of chroma modes
561#define DM_CHROMA_IDX          36                    // chroma mode index for derived from luma intra mode
562
563
564#define FAST_UDI_USE_MPM 1
565
566#define RDO_WITHOUT_DQP_BITS              0           ///< Disable counting dQP bits in RDO-based mode decision
567
568#define FULL_NBIT 0 ///< When enabled, compute costs using full sample bitdepth.  When disabled, compute costs as if it is 8-bit source video.
569#if FULL_NBIT
570# define DISTORTION_PRECISION_ADJUSTMENT(x) 0
571#else
572# define DISTORTION_PRECISION_ADJUSTMENT(x) (x)
573#endif
574
575#define LOG2_MAX_NUM_COLUMNS_MINUS1        7
576#define LOG2_MAX_NUM_ROWS_MINUS1           7
577#define LOG2_MAX_COLUMN_WIDTH              13
578#define LOG2_MAX_ROW_HEIGHT                13
579
580#define MATRIX_MULT                             0   // Brute force matrix multiplication instead of partial butterfly
581
582#define REG_DCT 65535
583
584#define AMP_SAD                               1           ///< dedicated SAD functions for AMP
585#define AMP_ENC_SPEEDUP                       1           ///< encoder only speed-up by AMP mode skipping
586#if AMP_ENC_SPEEDUP
587#define AMP_MRG                               1           ///< encoder only force merge for AMP partition (no motion search for AMP)
588#endif
589
590#define CABAC_INIT_PRESENT_FLAG     1
591
592// ====================================================================================================================
593// Basic type redefinition
594// ====================================================================================================================
595
596typedef       void                Void;
597typedef       bool                Bool;
598
599#ifdef __arm__
600typedef       signed char         Char;
601#else
602typedef       char                Char;
603#endif
604typedef       unsigned char       UChar;
605typedef       short               Short;
606typedef       unsigned short      UShort;
607typedef       int                 Int;
608typedef       unsigned int        UInt;
609typedef       double              Double;
610typedef       float               Float;
611
612// ====================================================================================================================
613// 64-bit integer type
614// ====================================================================================================================
615
616#ifdef _MSC_VER
617typedef       __int64             Int64;
618
619#if _MSC_VER <= 1200 // MS VC6
620typedef       __int64             UInt64;   // MS VC6 does not support unsigned __int64 to double conversion
621#else
622typedef       unsigned __int64    UInt64;
623#endif
624
625#else
626
627typedef       long long           Int64;
628typedef       unsigned long long  UInt64;
629
630#endif
631
632// ====================================================================================================================
633// Type definition
634// ====================================================================================================================
635
636typedef       UChar           Pxl;        ///< 8-bit pixel type
637typedef       Short           Pel;        ///< 16-bit pixel type
638typedef       Int             TCoeff;     ///< transform coefficient
639
640#if H_3D_VSO
641// ====================================================================================================================
642// Define Distortion Types
643// ====================================================================================================================
644typedef       Int64           RMDist;     ///< renderer model distortion
645
646#if H_3D_VSO_DIST_INT
647typedef       Int64            Dist;       ///< RDO distortion
648typedef       Int64            Dist64; 
649#define       RDO_DIST_MIN     MIN_INT
650#define       RDO_DIST_MAX     MAX_INT
651#else
652typedef       UInt             Dist;       ///< RDO distortion
653typedef       UInt64           Dist; 
654#define       RDO_DIST_MIN     0
655#define       RDO_DIST_MAX     MAX_UINT
656#endif
657#endif
658/// parameters for adaptive loop filter
659class TComPicSym;
660
661// Slice / Slice segment encoding modes
662enum SliceConstraint
663{
664  NO_SLICES              = 0,          ///< don't use slices / slice segments
665  FIXED_NUMBER_OF_LCU    = 1,          ///< Limit maximum number of largest coding tree blocks in a slice / slice segments
666  FIXED_NUMBER_OF_BYTES  = 2,          ///< Limit maximum number of bytes in a slice / slice segment
667  FIXED_NUMBER_OF_TILES  = 3,          ///< slices / slice segments span an integer number of tiles
668};
669
670enum SAOComponentIdx
671{
672  SAO_Y =0,
673  SAO_Cb,
674  SAO_Cr,
675  NUM_SAO_COMPONENTS
676};
677
678enum SAOMode //mode
679{
680  SAO_MODE_OFF = 0,
681  SAO_MODE_NEW,
682  SAO_MODE_MERGE,
683  NUM_SAO_MODES
684};
685
686enum SAOModeMergeTypes
687{
688  SAO_MERGE_LEFT =0,
689  SAO_MERGE_ABOVE,
690  NUM_SAO_MERGE_TYPES
691};
692
693
694enum SAOModeNewTypes
695{
696  SAO_TYPE_START_EO =0,
697  SAO_TYPE_EO_0 = SAO_TYPE_START_EO,
698  SAO_TYPE_EO_90,
699  SAO_TYPE_EO_135,
700  SAO_TYPE_EO_45,
701
702  SAO_TYPE_START_BO,
703  SAO_TYPE_BO = SAO_TYPE_START_BO,
704
705  NUM_SAO_NEW_TYPES
706};
707#define NUM_SAO_EO_TYPES_LOG2 2
708
709enum SAOEOClasses
710{
711  SAO_CLASS_EO_FULL_VALLEY = 0,
712  SAO_CLASS_EO_HALF_VALLEY = 1,
713  SAO_CLASS_EO_PLAIN       = 2,
714  SAO_CLASS_EO_HALF_PEAK   = 3,
715  SAO_CLASS_EO_FULL_PEAK   = 4,
716  NUM_SAO_EO_CLASSES,
717};
718
719
720#define NUM_SAO_BO_CLASSES_LOG2  5
721enum SAOBOClasses
722{
723  //SAO_CLASS_BO_BAND0 = 0,
724  //SAO_CLASS_BO_BAND1,
725  //SAO_CLASS_BO_BAND2,
726  //...
727  //SAO_CLASS_BO_BAND31,
728
729  NUM_SAO_BO_CLASSES = (1<<NUM_SAO_BO_CLASSES_LOG2),
730};
731#define MAX_NUM_SAO_CLASSES  32  //(NUM_SAO_EO_GROUPS > NUM_SAO_BO_GROUPS)?NUM_SAO_EO_GROUPS:NUM_SAO_BO_GROUPS
732
733struct SAOOffset
734{
735  Int modeIdc; //NEW, MERGE, OFF
736  Int typeIdc; //NEW: EO_0, EO_90, EO_135, EO_45, BO. MERGE: left, above
737  Int typeAuxInfo; //BO: starting band index
738  Int offset[MAX_NUM_SAO_CLASSES];
739
740  SAOOffset();
741  ~SAOOffset();
742  Void reset();
743
744  const SAOOffset& operator= (const SAOOffset& src);
745};
746
747struct SAOBlkParam
748{
749
750  SAOBlkParam();
751  ~SAOBlkParam();
752  Void reset();
753  const SAOBlkParam& operator= (const SAOBlkParam& src);
754  SAOOffset& operator[](Int compIdx){ return offsetParam[compIdx];}
755private:
756  SAOOffset offsetParam[NUM_SAO_COMPONENTS];
757
758};
759
760/// parameters for deblocking filter
761typedef struct _LFCUParam
762{
763  Bool bInternalEdge;                     ///< indicates internal edge
764  Bool bLeftEdge;                         ///< indicates left edge
765  Bool bTopEdge;                          ///< indicates top edge
766} LFCUParam;
767
768// ====================================================================================================================
769// Enumeration
770// ====================================================================================================================
771
772/// supported slice type
773enum SliceType
774{
775  B_SLICE,
776  P_SLICE,
777  I_SLICE
778};
779
780/// chroma formats (according to semantics of chroma_format_idc)
781enum ChromaFormat
782{
783  CHROMA_400  = 0,
784  CHROMA_420  = 1,
785  CHROMA_422  = 2,
786  CHROMA_444  = 3
787};
788
789/// supported partition shape
790enum PartSize
791{
792  SIZE_2Nx2N,           ///< symmetric motion partition,  2Nx2N
793  SIZE_2NxN,            ///< symmetric motion partition,  2Nx N
794  SIZE_Nx2N,            ///< symmetric motion partition,   Nx2N
795  SIZE_NxN,             ///< symmetric motion partition,   Nx N
796  SIZE_2NxnU,           ///< asymmetric motion partition, 2Nx( N/2) + 2Nx(3N/2)
797  SIZE_2NxnD,           ///< asymmetric motion partition, 2Nx(3N/2) + 2Nx( N/2)
798  SIZE_nLx2N,           ///< asymmetric motion partition, ( N/2)x2N + (3N/2)x2N
799  SIZE_nRx2N,           ///< asymmetric motion partition, (3N/2)x2N + ( N/2)x2N
800  SIZE_NONE = 15
801};
802
803/// supported prediction type
804enum PredMode
805{
806  MODE_INTER,           ///< inter-prediction mode
807  MODE_INTRA,           ///< intra-prediction mode
808  MODE_NONE = 15
809};
810
811/// texture component type
812enum TextType
813{
814  TEXT_LUMA,            ///< luma
815  TEXT_CHROMA,          ///< chroma (U+V)
816  TEXT_CHROMA_U,        ///< chroma U
817  TEXT_CHROMA_V,        ///< chroma V
818  TEXT_ALL,             ///< Y+U+V
819  TEXT_NONE = 15
820};
821
822/// reference list index
823enum RefPicList
824{
825  REF_PIC_LIST_0 = 0,   ///< reference list 0
826  REF_PIC_LIST_1 = 1,   ///< reference list 1
827  REF_PIC_LIST_X = 100  ///< special mark
828};
829
830/// distortion function index
831enum DFunc
832{
833  DF_DEFAULT  = 0,
834  DF_SSE      = 1,      ///< general size SSE
835  DF_SSE4     = 2,      ///<   4xM SSE
836  DF_SSE8     = 3,      ///<   8xM SSE
837  DF_SSE16    = 4,      ///<  16xM SSE
838  DF_SSE32    = 5,      ///<  32xM SSE
839  DF_SSE64    = 6,      ///<  64xM SSE
840  DF_SSE16N   = 7,      ///< 16NxM SSE
841 
842  DF_SAD      = 8,      ///< general size SAD
843  DF_SAD4     = 9,      ///<   4xM SAD
844  DF_SAD8     = 10,     ///<   8xM SAD
845  DF_SAD16    = 11,     ///<  16xM SAD
846  DF_SAD32    = 12,     ///<  32xM SAD
847  DF_SAD64    = 13,     ///<  64xM SAD
848  DF_SAD16N   = 14,     ///< 16NxM SAD
849 
850  DF_SADS     = 15,     ///< general size SAD with step
851  DF_SADS4    = 16,     ///<   4xM SAD with step
852  DF_SADS8    = 17,     ///<   8xM SAD with step
853  DF_SADS16   = 18,     ///<  16xM SAD with step
854  DF_SADS32   = 19,     ///<  32xM SAD with step
855  DF_SADS64   = 20,     ///<  64xM SAD with step
856  DF_SADS16N  = 21,     ///< 16NxM SAD with step
857 
858  DF_HADS     = 22,     ///< general size Hadamard with step
859  DF_HADS4    = 23,     ///<   4xM HAD with step
860  DF_HADS8    = 24,     ///<   8xM HAD with step
861  DF_HADS16   = 25,     ///<  16xM HAD with step
862  DF_HADS32   = 26,     ///<  32xM HAD with step
863  DF_HADS64   = 27,     ///<  64xM HAD with step
864  DF_HADS16N  = 28,     ///< 16NxM HAD with step
865#if H_3D_VSO
866  DF_VSD      = 29,      ///< general size VSD
867  DF_VSD4     = 30,      ///<   4xM VSD
868  DF_VSD8     = 31,      ///<   8xM VSD
869  DF_VSD16    = 32,      ///<  16xM VSD
870  DF_VSD32    = 33,      ///<  32xM VSD
871  DF_VSD64    = 34,      ///<  64xM VSD
872  DF_VSD16N   = 35,      ///< 16NxM VSD
873#endif
874
875#if AMP_SAD
876  DF_SAD12    = 43,
877  DF_SAD24    = 44,
878  DF_SAD48    = 45,
879
880  DF_SADS12   = 46,
881  DF_SADS24   = 47,
882  DF_SADS48   = 48,
883
884  DF_SSE_FRAME = 50     ///< Frame-based SSE
885#else
886  DF_SSE_FRAME = 33     ///< Frame-based SSE
887#endif
888};
889
890/// index for SBAC based RD optimization
891enum CI_IDX
892{
893  CI_CURR_BEST = 0,     ///< best mode index
894  CI_NEXT_BEST,         ///< next best index
895  CI_TEMP_BEST,         ///< temporal index
896  CI_CHROMA_INTRA,      ///< chroma intra index
897  CI_QT_TRAFO_TEST,
898  CI_QT_TRAFO_ROOT,
899  CI_NUM,               ///< total number
900};
901
902/// motion vector predictor direction used in AMVP
903enum MVP_DIR
904{
905  MD_LEFT = 0,          ///< MVP of left block
906  MD_ABOVE,             ///< MVP of above block
907  MD_ABOVE_RIGHT,       ///< MVP of above right block
908  MD_BELOW_LEFT,        ///< MVP of below left block
909  MD_ABOVE_LEFT         ///< MVP of above left block
910};
911
912/// merging candidates
913#if H_3D
914enum DefaultMergCandOrder
915{
916#if SEC_A1_BASED_VSP_J0039
917  MRG_T = 0,            ///< MPI
918  MRG_D,                ///< DDD
919  MRG_IVMC,             ///< Temporal inter-view
920  MRG_A1,               ///< Left
921  MRG_B1,               ///< Above
922  MRG_VSP,              ///< VSP
923  MRG_B0,               ///< Above right
924  MRG_IVDC,             ///< Disparity inter-view
925  MRG_A0,               ///< Left bottom
926  MRG_B2,               ///< Above left
927  MRG_IVSHIFT,          ///< Shifted IVMC of Shifted IVDC. (These are mutually exclusive)
928  MRG_COL               ///< Temporal co-located
929#else
930  MRG_T = 0,            ///< MPI
931  MRG_D,                ///< DDD
932  MRG_IVMC,             ///< Temporal inter-view
933  MRG_A1,               ///< Left
934  MRG_B1,               ///< Above
935  MRG_B0,               ///< Above right
936  MRG_IVDC,             ///< Disparity inter-view
937  MRG_VSP,              ///< VSP
938  MRG_A0,               ///< Left bottom
939  MRG_B2,               ///< Above left
940  MRG_IVSHIFT,          ///< Shifted IVMC of Shifted IVDC. (These are mutually exclusive)
941  MRG_COL               ///< Temporal co-located
942#endif
943};
944#endif
945
946/// coefficient scanning type used in ACS
947enum COEFF_SCAN_TYPE
948{
949  SCAN_DIAG = 0,         ///< up-right diagonal scan
950  SCAN_HOR,              ///< horizontal first scan
951  SCAN_VER               ///< vertical first scan
952};
953
954namespace Profile
955{
956  enum Name
957  {
958    NONE = 0,
959    MAIN = 1,
960    MAIN10 = 2,
961    MAINSTILLPICTURE = 3,
962#if H_MV
963    MULTIVIEWMAIN = 6,
964#if H_3D
965    MAIN3D = 8, 
966#endif
967#endif
968  };
969}
970
971namespace Level
972{
973  enum Tier
974  {
975    MAIN = 0,
976    HIGH = 1,
977  };
978
979  enum Name
980  {
981    NONE     = 0,
982    LEVEL1   = 30,
983    LEVEL2   = 60,
984    LEVEL2_1 = 63,
985    LEVEL3   = 90,
986    LEVEL3_1 = 93,
987    LEVEL4   = 120,
988    LEVEL4_1 = 123,
989    LEVEL5   = 150,
990    LEVEL5_1 = 153,
991    LEVEL5_2 = 156,
992    LEVEL6   = 180,
993    LEVEL6_1 = 183,
994    LEVEL6_2 = 186,
995  };
996}
997//! \}
998
999#if H_MV
1000
1001/// scalability types
1002  enum ScalabilityType
1003  {
1004#if H_3D
1005    DEPTH_ID = 0,   
1006#endif   
1007    VIEW_ORDER_INDEX  = 1,
1008    DEPENDENCY_ID = 2,
1009    AUX_ID = 3,
1010  };
1011#endif
1012#if H_3D
1013  // Renderer
1014  enum BlenMod
1015  {
1016    BLEND_NONE  = -1,
1017    BLEND_AVRG  = 0,
1018    BLEND_LEFT  = 1,
1019    BLEND_RIGHT = 2,
1020    BLEND_GEN   =  3
1021  };
1022
1023 
1024  enum
1025  {
1026    VIEWPOS_INVALID = -1,
1027    VIEWPOS_LEFT    = 0,
1028    VIEWPOS_RIGHT   = 1,
1029    VIEWPOS_MERGED  = 2
1030  };
1031
1032#define Log2( n ) ( log((double)n) / log(2.0) ) // Ed.(GT): This is very very bad and should be fixed to used integer arithmetics ( see gCeilLog2 ) moreover it should not be defined in the tool macro section!
1033#endif
1034#endif
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