source: 3DVCSoftware/branches/HTM-12.2-dev1-Mediatek/source/Lib/TLibCommon/TypeDef.h @ 1096

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33
34/** \file     TypeDef.h
35    \brief    Define basic types, new types and enumerations
36*/
37
38#ifndef _TYPEDEF__
39#define _TYPEDEF__
40
41//! \ingroup TLibCommon
42//! \{
43/////////////////////////////////////////////////////////////////////////////////////////
44///////////////////////////////// EXTENSION SELECTION /////////////////////////////////// 
45/////////////////////////////////////////////////////////////////////////////////////////
46
47/* HEVC_EXT might be defined by compiler/makefile options.
48   
49   Linux makefiles support the following settings:   
50   make             -> HEVC_EXT not defined   
51   make HEVC_EXT=0  -> H_MV=0 H_3D=0   --> plain HM
52   make HEVC_EXT=1  -> H_MV=1 H_3D=0   --> MV only
53   make HEVC_EXT=2  -> H_MV=1 H_3D=1   --> full 3D
54*/
55
56#ifndef HEVC_EXT
57#define HEVC_EXT                    2
58#endif
59
60#if ( HEVC_EXT < 0 )||( HEVC_EXT > 2 )
61#error HEVC_EXT must be in the range of 0 to 2, inclusive.
62#endif
63
64#define H_MV          ( HEVC_EXT != 0)
65#define H_3D          ( HEVC_EXT == 2)
66
67#define NTT_BUG_FIX_TK54    1
68#define BUG_FIX_TK65        1
69
70#define MTK_I0093           1
71/////////////////////////////////////////////////////////////////////////////////////////
72///////////////////////////////////   MAJOR DEFINES   /////////////////////////////////// 
73/////////////////////////////////////////////////////////////////////////////////////////
74
75#if H_MV
76#define H_MV_ENC_DEC_TRAC                 1  //< CU/PU level tracking
77#endif
78
79#if H_3D
80#define H_3D_QTLPC                        1   // OL_QTLIMIT_PREDCODING_B0068 //JCT3V-B0068
81                                              // HHI_QTLPC_RAU_OFF_C0160 JCT3V-C0160 change 2: quadtree limitation and predictive coding switched off in random access units
82                                              // MTK_TEX_DEP_PAR_G0055 Texture-partition-dependent depth partition. JCT3V-G0055
83
84#define H_3D_VSO                          1   // VSO, View synthesis optimization, includes:
85                                              // HHI_VSO
86                                              // HHI_VSO_LS_TABLE_M23714 enable table base Lagrange multiplier optimization
87                                              // SAIT_VSO_EST_A0033, JCT3V-A0033 modification 3
88                                              // LGE_WVSO_A0119
89                                              // SCU_HS_VSD_BUGFIX_IMPROV_G0163
90#define H_3D_NBDV                         1   // Neighboring block disparity derivation
91                                              // QC_JCT3V-A0097
92                                              // LGE_DVMCP_A0126
93                                              // LGE_DVMCP_MEM_REDUCTION_B0135     
94                                              // QC_SIMPLE_NBDV_B0047
95                                              // FIX_LGE_DVMCP_B0133
96                                              // QC_NBDV_LDB_FIX_C0055
97                                              // MTK_SAIT_TEMPORAL_FIRST_ORDER_C0141_C0097
98                                              // MTK_SIMPLIFY_DVTC_C0135           
99                                              // QC_CU_NBDV_D0181
100                                              // SEC_DEFAULT_DV_D0112
101                                              // MTK_DVMCP_FIX_E0172       fix the mismatch between software and WD for DV derivation from DVMCP blocks, issue 2 in JCT3V-E0172
102                                              // SEC_SIMPLIFIED_NBDV_E0142 Simplified NBDV, JCT3V-E0142 and JCT3V-E0190
103                                              // MTK_NBDV_TN_FIX_E0172     fix the issue of DV derivation from the temporal neighboring blocks, issue 7 in JCT3V-E0172
104                                              // MTK_TEXTURE_MRGCAND_BUGFIX_E0182  Bug fix for TEXTURE MERGING CANDIDATE     , JCT3V-E0182
105
106#define H_3D_ARP                          1   // Advanced residual prediction (ARP), JCT3V-D0177
107                                              // QC_MTK_INTERVIEW_ARP_F0123_F0108 JCT3V-F0123; JCT3V-F0108
108                                              // SHARP_ARP_REF_CHECK_F0105        ARP reference picture selection and DPB check
109                                              // LGE_ARP_CTX_F0161                JCT3V-F0161
110                                              // MTK_ARP_FLAG_CABAC_SIMP_G0061 Use 2 context for ARP flag referring to only left neighbor block in JCT3V-G0061
111                                              // MTK_ARP_REF_SELECTION_G0053 ARP Reference picture selection in JCT3V-G0053
112                                              // MTK_ALIGN_SW_WD_BI_PRED_ARP_H0085  Align the SW and WD for the bi-prediction ARP PUs by disallowing non-normative fast bi-prediction for ARP PUs, JCT3V-H0085
113                                              // QC_I0051_ARP_SIMP         
114                                              // SHARP_ARP_CHROMA_I0104     
115                                              // MTK_I0072_IVARP_SCALING_FIX
116
117#define H_3D_IC                           1   // Illumination Compensation, JCT3V-B0045, JCT3V-C0046, JCT3V-D0060
118                                              // Unifying rounding offset, for IC part, JCT3V-D0135
119                                              // Full Pel Interpolation for Depth, HHI_FULL_PEL_DEPTH_MAP_MV_ACC
120                                              // SHARP_ILLUCOMP_REFINE_E0046
121                                              // MTK_CLIPPING_ALIGN_IC_E0168       // To support simplify bi-prediction PU with identical motion checking, JCT3V-E0168
122                                              // LGE_IC_CTX_F0160 //JCT3V-F0160
123                                              // SEC_ONLY_TEXTURE_IC_F0151
124                                              // MTK_IC_FLAG_CABAC_SIMP_G0061
125                                              // SEC_IC_ARP_SIG_G0072, Disabling IC when ARP is enabled, option 1 in JCT3V-G0072, part 2 in JCT3V-G0121
126                                              // MTK_LOW_LATENCY_IC_ENCODING_H0086  Low-latency IC encoding in JCT3V-H0086
127                                              // MTK_LOW_LATENCY_IC_ENCODING_H0086_FIX  1  // Remove the global variables used in JCT3V-H0086
128                                              // SEC_IC_NEIGHBOR_CLIP_I0080    // Clipping of neighboring sample position, JCT3V-I0080
129
130#if H_3D_NBDV
131#define H_3D_NBDV_REF                     1   // Depth oriented neighboring block disparity derivation
132                                              // MTK_D0156
133                                              // MERL_D0166: Reference view selection in NBDV & Bi-VSP
134                                              // MERL_C0152: Basic VSP
135                                              // NBDV_DEFAULT_VIEWIDX_BUGFIX Bug fix for invalid default view index for NBDV
136                                              // NTT_DoNBDV_VECTOR_CLIP_E0141 disparity vector clipping in DoNBDV, JCT3V-E0141 and JCT3V-E0209
137                                              // SEC_VER_DONBDV_H0103          Vertical DV Restriction for DoNBDV
138#endif
139
140#define H_3D_VSP                          1   // View synthesis prediction
141                                              // MERL_C0152: Basic VSP
142                                              // MERL_D0166: Reference view selection in NBDV & Bi-VSP
143                                              // MTK_D0105, LG_D0139: No VSP for depth
144                                              // QC_D0191: Clean up
145                                              // LG_D0092: Multiple VSP candidate allowed
146                                              // MTK_VSP_FIX_ALIGN_WD_E0172
147                                              // NTT_VSP_ADAPTIVE_SPLIT_E0207 adaptive sub-PU partitioning in VSP, JCT3V-E0207
148                                              // NTT_VSP_DC_BUGFIX_E0208 bugfix for sub-PU based DC in VSP, JCT3V-E0208
149                                              // NTT_VSP_COMMON_E0207_E0208 common part of JCT3V-E0207 and JCT3V-E0208
150                                              // MTK_F0109_LG_F0120_VSP_BLOCK MTK_LG_SIMPLIFY_VSP_BLOCK_PARTITION_F0109_F0120 
151                                              // SHARP_VSP_BLOCK_IN_AMP_F0102 VSP partitioning for AMP
152                                              // MTK_VSP_SIMPLIFICATION_F0111 1. Inherited VSP also use NBDV of current CU, 2. VSP cannot be inherited from above LCU rowss
153                                              // LGE_SHARP_VSP_INHERIT_F0104
154                                              // NTT_STORE_SPDV_VSP_G0148 Storing Sub-PU based DV for VSP
155                                              // Restricted bi-prediction for VSP
156
157#define H_3D_IV_MERGE                     1   // Inter-view motion merge candidate
158                                              // HHI_INTER_VIEW_MOTION_PRED
159                                              // SAIT_IMPROV_MOTION_PRED_M24829, improved inter-view motion vector prediction
160                                              // QC_MRG_CANS_B0048             , JCT3V-B0048, B0086, B0069
161                                              // OL_DISMV_POS_B0069            , different pos for disparity MV candidate, B0069
162                                              // MTK_INTERVIEW_MERGE_A0049     , second part
163                                              // QC_AMVP_MRG_UNIFY_IVCAN_C0051     
164                                              // TEXTURE MERGING CANDIDATE     , JCT3V-C0137
165                                              // QC_INRIA_MTK_MRG_E0126
166                                              // ETRIKHU_MERGE_REUSE_F0093 QC_DEPTH_IV_MRG_F0125, JCT3V-F0125: Depth oriented Inter-view MV candidate
167                                              // EC_MPI_ENABLING_MERGE_F0150, MPI flag in VPS and enabling in Merge mode
168                                              // MTK_NBDV_IVREF_FIX_G0067      , Disable IvMC, VSP when IVREF is not available, JCT3V-G0067
169                                              // SEC_DEPTH_DV_DERIVAITON_G0074, Simplification of DV derivation for depth, JCT3V-G0074
170                                              // QC_DEPTH_MERGE_SIMP_G0127 Remove DV candidate and shifting candidate for depth coding
171                                              // QC_IV_PRED_CONSTRAINT_H0137   Constraint on inter-view (motion) prediction tools
172                                              // ETRIKHU_BUGFIX_H0083          bug-fix for DV candidate pruning
173                                              // ETRIKHU_CLEANUP_H0083         cleaned-up source code for constructing merging candidate list
174                                              // ETRIKHU_CLEANUP_H0083_MISSING missing guard macros added by GT
175                                              // SHARP_SIMPLE_MERGE_H0062      Restrict 3D-HEVC merge cand in small PUs
176                                              // MTK_DIS_SPBIP8X4_H0205        Disable bi-prediction for 8x4 and 4x8 sub PU and remove the SPIVMP 2Nx2N restriction
177                                              // SEC_ADAPT_DISABLE_IVMP        Disabling IVMP merge candidates when IC is enabled, JCT3V-H0070
178                                              // SEC_SIMP_SHIFTED_DV_I0086     Simplification of Shifted DV candidate, JCT3V-I0086
179#define MTK_MRG_LIST_SIZE_CLEANUP_J0059   1   // Include VSP for deriving merge candidate list size, JCT3V-J0059
180
181
182#define H_3D_TMVP                         1   // QC_TMVP_C0047
183                                              // Sony_M23639
184
185#define H_3D_DIM                          1   // DIM, Depth intra modes, includes:
186                                              // HHI_DMM_WEDGE_INTRA
187                                              // HHI_DMM_PRED_TEX
188                                              // FIX_WEDGE_NOFLOAT_D0036
189                                              // LGE_EDGE_INTRA_A0070
190                                              // LGE_DMM3_SIMP_C0044
191                                              // QC_DC_PREDICTOR_D0183
192                                              // HHI_DELTADC_DLT_D0035
193                                              // PKU_QC_DEPTH_INTRA_UNI_D0195
194                                              // RWTH_SDC_DLT_B0036
195                                              // INTEL_SDC64_D0193
196                                              // RWTH_SDC_CTX_SIMPL_D0032
197                                              // LGE_CONCATENATE_D0141
198                                              // FIX_SDC_ENC_RD_WVSO_D0163
199                                              // MTK_SAMPLE_BASED_SDC_D0110
200                                              // SEC_DMM2_E0146_HHIFIX Removal of DMM2 from DMMs
201                                              // ZJU_DEPTH_INTRA_MODE_E0204 Simplified Binarization for depth_intra_mode
202                                              // KWU_SDC_SIMPLE_DC_E0117 Simplified DC calculation for SDC
203                                              // SCU_HS_DMM4_REMOVE_DIV_E0242 DMM4 Division Removal
204                                              // LGE_SDC_REMOVE_DC_E0158 Removal of DC mode from SDC
205                                              // LGE_PKU_DMM3_OVERLAP_E0159_HHIFIX 1   Removal of overlap between DMM3 and DMM1
206                                              // LGE_PRED_RES_CODING_DLT_DOMAIN_F0159 JCT3V-F0159
207                                              // HHI_DIM_PREDSAMP_FIX_F0171
208                                              // SEC_DMM3_RBC_F0147 Removal of DMM3 and RBC from DMMs
209                                              // QC_DIM_DELTADC_UNIFY_F0132 Unify delta DC coding in depth intra modes
210                                              // Unify intra SDC and inter SDC
211                                              // QC_GENERIC_SDC_G0122 Generalize SDC to all depth intra modes
212                                              // SCU_HS_DEPTH_DC_PRED_G0143
213                                              // HS_TSINGHUA_SDC_SPLIT_G0111
214                                              // QC_PKU_SDC_SPLIT_G0123 Intra SDC Split
215                                              // HS_DMM_SDC_PREDICTOR_UNIFY_H0108  Unification of DMM and SDC predictor derivation
216                                              // LGE_SIMP_DIM_NOT_PRESENT_FLAG_CODING_H0119_H0135  Use only one context for CABAC of dim_not_present_flag
217                                              // QC_SIMP_DELTADC_CODING_H0131   Simplify detaDC entropy coding
218                                              // MTK_DMM_SIMP_CODE_H0092        Remove CABAC context for DMM1 mode coding
219                                              // MTK_DELTA_DC_FLAG_ONE_CONTEXT_H0084_H0100_H0113 Use only one context for CABAC of delta_dc_flag as in JCTVC-H0084, JCTVC-H0100 and JCTVC-H0113
220                                              // MTK_SDC_FLAG_FIX_H0095                          Remove conditional check of PCM flag based on SDC flag, JCTVC-H0095
221                                              // SEC_NO_RESI_DLT_H0105   
222                                              // MTK_DLT_CODING_FIX_H0091
223                                              // HS_DMM_SIGNALLING_I0120
224                                              // SHARP_DMM1_I0110 // LUT size reduction for DMM1 proposed in JCT3V-I0110
225                                              // FAST_SDC_OFFSET_DECISION_I0084
226                                              // SEPARATE_FLAG_I0085
227                                              // H_3D_DELTA_DLT
228                                              // RWTH_DLT_CLIP_I0057               1
229
230
231
232#define H_3D_SINGLE_DEPTH                 1   // Single depth mode proposed in JCT3V-I0095
233#define MTK_SINGLE_DEPTH_VPS_FLAG_J0060   1   // Add VPS control flags and remove slice header control flag for single depth, JCT3V-J0060
234
235#define MTK_J0033                         1
236
237#define H_3D_INTER_SDC                    1   // INTER SDC, Inter simplified depth coding
238                                              // LGE_INTER_SDC_E0156 Enable inter SDC for depth coding
239                                              // SEC_INTER_SDC_G0101 Improved inter SDC with multiple DC candidates
240
241#define H_3D_SPIVMP                       1   // H_3D_SPIVMP    // JCT3V-F0110: Sub-PU level inter-view motion prediction
242                                              // SEC_SPIVMP_MCP_SIZE_G0077, Apply SPIVMP only to 2Nx2N partition, JCT3V-G0077
243                                              // QC_SPIVMP_MPI_G0119 Sub-PU level MPI merge candidate
244                                              // Simplification on Sub-PU level temporal interview motion prediction
245                                              // MPI_SUBPU_DEFAULT_MV_H0077_H0099_H0111_H0133
246
247#define H_3D_DBBP                         1   // DBBP: Depth-based Block Partitioning and Merging
248                                              // MTK_DBBP_AMP_REM_H0072   
249                                              // RWTH_DBBP_NO_SPU_H0057   
250                                              // SEC_DBBP_FILTERING_H0104
251                                              // MTK_DBBP_SIGNALING_H0094   
252                                              // H_3D_FIX_DBBP_IVMP        Fix . Enable IVMP is always disabled, when DBBP is enabled. The original intention is to disable Sub-PU IVMP when DBBP is enabled, not to disable IVMP itself.
253                                              // SEC_DBBP_EXPLICIT_SIG_I0077       1   // Remove the partition derivation and signal dbbp_flag only when the partition mode is 2NxN/Nx2N, JCT3V-I0077
254                                              // Disallow DBBP in 8x8 CU, JCT3V-I0078
255                                              // SHARP_DBBP_SIMPLE_FLTER_I0109     1   // Simple condition and one dimensional filter for DBBP
256                                              // SEC_DBBP_DMM4_THRESHOLD_I0076     Simplification of threshold derivation for DBBP and DMM4, JCT3V-I0076
257
258
259#define H_3D_DDD                          1   // Disparity derived depth coding
260
261#define H_3D_FCO                          0   // Flexible coding order for 3D
262#if H_3D_FCO
263#define H_3D_FCO                     1
264#endif
265
266#define H_3D_FAST_INTRA_SDC               1   // I0123
267
268// OTHERS
269                                              // MTK_SONY_PROGRESSIVE_MV_COMPRESSION_E0170 // Progressive MV Compression, JCT3V-E0170
270#define H_3D_REN_MAX_DEV_OUT              0   // Output maximal possible shift deviation
271#define H_3D_FAST_TEXTURE_ENCODING        1   // Fast merge mode decision and early CU determination for texture component of dependent view, JCT3V-E0173
272                                              // MTK_FAST_TEXTURE_ENCODING_E0173
273#if H_3D_DIM
274#define H_3D_FAST_DEPTH_INTRA             1   // Fast DMM and RBC Mode Selection
275                                              // SCU_HS_FAST_DEPTH_INTRA_E0238_HHIFIX
276#define MTK_DMM_SIM_J0035                 1
277#endif
278
279// Rate Control
280#define KWU_FIX_URQ                       1
281#define KWU_RC_VIEWRC_E0227               0  ///< JCT3V-E0227, view-wise target bitrate allocation
282#define KWU_RC_MADPRED_E0227              0  ///< JCT3V-E0227, inter-view MAD prediction
283#endif // H_3D
284
285
286
287/////////////////////////////////////////////////////////////////////////////////////////
288///////////////////////////////////   DERIVED DEFINES /////////////////////////////////// 
289/////////////////////////////////////////////////////////////////////////////////////////
290
291// Fixes
292
293///// ***** SINGLE DEPTH MODE *********
294#if H_3D_SINGLE_DEPTH
295#define SINGLE_DEPTH_MODE_CAND_LIST_SIZE            2 // size of the sample candidate list
296#endif
297
298///// ***** VIEW SYNTHESIS OPTIMIZAION *********
299#if H_3D_VSO                                 
300#define H_3D_VSO_DIST_INT                 1   // Allow negative synthesized view distortion change
301#define H_3D_VSO_COLOR_PLANES             1   // Compute VSO distortion on color planes
302#define H_3D_VSO_EARLY_SKIP               1   // LGE_VSO_EARLY_SKIP_A0093, A0093 modification 4
303#define H_3D_VSO_RM_ASSERTIONS            0   // Output VSO assertions
304#define H_3D_VSO_SYNTH_DIST_OUT           0   // Output of synthesized view distortion instead of depth distortion in encoder output
305#endif
306
307////   ****** NEIGHBOURING BLOCK-BASED DISPARITY VECTOR  *********
308#if H_3D_NBDV
309#define DVFROM_LEFT                       0
310#define DVFROM_ABOVE                      1
311#define IDV_CANDS                         2
312#endif
313
314///// ***** ADVANCED INTERVIEW RESIDUAL PREDICTION *********
315#if H_3D_ARP
316#define H_3D_ARP_WFNR                     3
317#endif
318
319///// ***** DEPTH INTRA MODES *********
320#if H_3D_DIM
321                                              // HHI_DMM4_ENC_I0066
322#define H_3D_DIM_DMM                      1   // Depth Modeling Modes
323#define H_3D_DIM_SDC                      1   // Simplified Depth Coding method
324#define H_3D_DIM_DLT                      1   // Depth Lookup Table
325
326#define H_3D_DIM_ENC                      1   // Depth Intra encoder optimizations, includes:
327                                              // HHI_DEPTH_INTRA_SEARCH_RAU_C0160
328                                              // LG_ZEROINTRADEPTHRESI_A0087
329#endif
330///// ***** VIEW SYNTHESIS PREDICTION *********
331#if H_3D_VSP
332#define H_3D_VSP_BLOCKSIZE                4   // Supported values: 1, 2, and 4
333#if H_3D_VSP_BLOCKSIZE == 1
334#define H_3D_VSP_CONSTRAINED              1   // Constrained VSP @ 1x1
335#else
336#define H_3D_VSP_CONSTRAINED              0
337#endif
338#endif
339
340
341///// ***** ILLUMATION COMPENSATION *********
342#if H_3D_IC
343#define IC_REG_COST_SHIFT                 7
344#define IC_CONST_SHIFT                    5
345#define IC_SHIFT_DIFF                     12
346#define IC_LOW_LATENCY_ENCODING_THRESHOLD 0.1 // Threshold for low-latency IC encoding in JCT3V-H0086
347#endif
348
349
350///// ***** DEPTH BASED BLOCK PARTITIONING *********
351#if H_3D_DBBP
352#define DBBP_INVALID_SHORT                (-4)
353#define DBBP_PACK_MODE               SIZE_2NxN
354#endif
355
356
357///// ***** FCO *********
358#if H_3D_FCO
359#define H_3D_FCO_VSP_DONBDV_E0163               1   // Adaptive depth reference for flexible coding order
360#else
361#define H_3D_FCO_VSP_DONBDV_E0163               0   // Adaptive depth reference for flexible coding order
362#endif
363
364#if H_3D
365#define PPS_FIX_DEPTH                           1
366#endif
367
368/////////////////////////////////////////////////////////////////////////////////
369///////////////////////////////////   MV_HEVC HLS  //////////////////////////////
370/////////////////////////////////////////////////////////////////////////////////
371// TBD: Check if integration is necessary.
372#define H_MV_HLS_PTL_LIMITS                  0
373#define H_MV_HLS7_GEN                        0  // General changes (not tested)
374#define H_MV_ALIGN_HM_15                     1 
375
376// POC
377// #define H_MV_HLS_7_POC_P0041_3            0 // (POC/P0041/POC reset) #3 It was remarked that we should require each non-IRAP picture that has discardable_flag equal to 1 to have NUT value indicating that it is a sub-layer non-reference picture. This was agreed. Decision: Adopt (with constraint for discardable_flag as described above)
378// #define H_MV_HLS_7_POC_P0041_FIXES        0 // (POC/P0041/Fixes) For each non-IRAP picture that has discardable_flag equal to 1 to have NUT value indicating that it is a sub-layer non-reference picture.
379// #define H_MV_HLS_7_POC_P0056_4            0 // (POC/P0056/layer tree poc) #4 Proposal 1: If the POC reset approach is adopted as the basis for multi-layer POC derivation, it is proposed to derive the POC anchor picture from the previous TID0 picture (that is not a RASL picture, a RADL picture or a sub-layer non-reference picture and not with discardable_flag equal to 1) of  the current layer or any of its reference layer. This is asserted to improve loss resilience and reduce bit rate overhead. Decision: Adopt Proposal 1 (with the suggested modifications Ewith text provided as P0297).
380
381// SEI related
382//#define H_MV_HLS_8_SEI_NODOC_53  0 // #53 (SEI    /NODOC/Added Multiview view position SEI message) Plain copy from AVC.
383//#define H_MV_HLS_8_SEI_NODOC_52  0 // #52 (SEI    /NODOC/Added Multiview acquisition information SEI) Plain copy from AVC.
384//#define H_MV_HLS_8_SEI_NODOC_51  0 // #51 (SEI    /NODOC/Added Multiview scene information SEI message)
385//#define H_MV_HLS_8_SEI_Q0189_35  0 // #35 (SEI    /Q0189/SEI message for indicating constraints on TMVP) Proposal 2.3,  SEI message for indicating constraints on TMVP
386//#define H_MV_HLS_8_EDF_Q0116_29  0 // #29 (ED.FIX /Q0116/Recovery point SEI) , consider adding a note regarding how random accessibility is affected by the recovery point SEI message
387//#define H_MV_HLS_8_GEN_Q0183_23  0 // #23 (GEN    /Q0183/SEI clean-ups) numerous small clean-ups on SEI messages.
388//#define H_MV_HLS_8_MIS_Q0247_49  0 // #49 (MISC   /Q0247/frame-field information SEI message)
389//#define H_MV_HLS_8_MIS_Q0189_34  0 // #34 (MISC   /Q0189/slice temporal mvp enabled flag) Proposal 2.2, clarification of semantics of slice temporal mvp enabled flag
390//#define H_MV_HLS_8_EDF_Q0081_01  0 // #1  (ED.FIX /Q0081/alpha channel persist) On reuse of alpha planes in auxiliary pictures. It was asked why there would not be a presumption that the alpha channel content would simply persist, without needing the flag to indicate it. Decision (Ed.): Delegated to editors to clarify, as necessary, that the alpha channel content persists until cancelled or updated in output order.
391//#define H_MV_HLS_8_SEI_Q0253_37  0 // #37 (SEI    /Q0253/layer not present), modified semantics of layers not present SEI message to correct bug introduced during editing
392//#define H_MV_HLS_8_SEI_Q0045_11  0 // #11 (SEI    /Q0045/Overlay) Proposal for an SEI message on selectable overlays. Decision: Adopt (modified for variable-length strings).
393//#define H_MV_HLS_7_SEI_P0133_28  0 // (SEI/P0133/Recovery point SEI) #28 Decision: Adopt change to recover point semantics only (-v3)
394//#define H_MV_HLS_7_SEI_P0123_25  0 // (SEI/P0123/Alpha channel info) #25 Add alpha channel information SEI message Decision: Adopt. Constrain the bit depth indicated to be equal to the coded bit depth of the aux picture.
395
396// DPB
397//#define H_MV_HLS_8_HRD_Q0102_09  0 // #9  (HRD    /Q0102/NoOutputOfPriorPicsFlag) It was suggested that also the separate_colour_plane_flag should affect inference of NoOutputOfPriorPicsFlag. Decision (Ed.): Agreed (affects RExt text).
398//#define H_MV_HLS_8_DBP_Q0154_38  0 // #38 (DBP    /Q0154/VPS DPB) Proposal in C.5.2.1: Add in the decoding process that when a new VPS is activated, all pictures in the DPB are marked as unused for reference
399//#define H_MV_HLS_8_HRD_Q0154_10  0 // #10 (HRD    /Q0154/DPB Flushing and parameters) On picture flushing and DPB parameters Decision: Adopted (some details to be discussed further in BoG).
400//#define H_MV_HLS_7_OTHER_P0187_1 0 // (OTHER/P0187/NoOutputOfPriorPicsFlag) #1 Inference of NoOutputOfPriorPicsFlag and proposes to take into account colour format and bit depth for the inference in addition to spatial resolution
401
402// OTHERS
403//#define H_MV_HLS_8_HSB_Q0041_03  0 // #3  (HS     /Q0041/hybrid scalability) The proposed text was endorsed, with non-editorial open issues considered as follows ?// #define H_MV_HLS_7_OTHER_P0187_1          0 // (OTHER/P0187/NoOutputOfPriorPicsFlag) #1 Inference of NoOutputOfPriorPicsFlag and proposes to take into account colour format and bit depth for the inference in addition to spatial resolution
404//#define H_MV_HLS_8_MIS_Q0078_24  0 // #24 (MISC   /Q0078/scan and pic type) , Items 3 b,c and 4, clarifying which pictures in an output layer sets are applied the values of general_progressive_source_flag, general_interlaced_source_flag, general_non_packed_constraint_flag and general_frame_only_constraint_flag.
405//#define H_MV_HLS_7_HRD_P0138_6   0 //     (HRD/P0138/HRD parameters for bitstreams excluding) #6 Decision: Adopt (as revised in updated contribution, with the specification of a flag in the BP SEI (HRD/P0192/sub-DPB) #12 Establish sub-DPBs based on the representation format indicated at the VPS level. It was suggested that the expressed shared capacity limit would need to be less than or equal to the sum of the individual capacity limits. Decision: Adopt as modified. Further study is encouraged on profile/level constraint selections.
406
407/////////////////////////////////////////////////////////////////////////////////////////
408///////////////////////////////////   HM RELATED DEFINES ////////////////////////////////
409/////////////////////////////////////////////////////////////////////////////////////////
410#define HARMONIZE_GOP_FIRST_FIELD_COUPLE  1
411#define FIX_FIELD_DEPTH                 1
412#if H_MV
413#define EFFICIENT_FIELD_IRAP            0
414#else
415#define EFFICIENT_FIELD_IRAP            1
416#endif
417#define ALLOW_RECOVERY_POINT_AS_RAP     1
418#define BUGFIX_INTRAPERIOD              1
419#define SAO_ENCODE_ALLOW_USE_PREDEBLOCK 1
420
421#define SAO_SGN_FUNC 1
422
423#define TILE_SIZE_CHECK 1
424
425#define FIX1172 1 ///< fix ticket #1172
426
427#define SETTING_PIC_OUTPUT_MARK     1
428#define SETTING_NO_OUT_PIC_PRIOR    1
429#define FIX_EMPTY_PAYLOAD_NAL       1
430#define FIX_WRITING_OUTPUT          1
431#define FIX_OUTPUT_EOS              1
432
433#define FIX_POC_CRA_NORASL_OUTPUT   1
434
435#define MAX_NUM_PICS_IN_SOP           1024
436
437#define MAX_NESTING_NUM_OPS         1024
438#define MAX_NESTING_NUM_LAYER       64
439
440#if H_MV
441#define MAX_VPS_NUM_HRD_PARAMETERS                1024
442#else
443#define MAX_VPS_NUM_HRD_PARAMETERS                1
444#endif
445#if H_MV
446#define MAX_NUM_SUB_LAYERS                        7
447#define MAX_NUM_SIGNALLED_PARTITIONING_SCHEMES    16
448#endif
449#define MAX_VPS_OP_SETS_PLUS1                     1024
450#if H_MV
451#define MAX_VPS_NUM_ADD_LAYER_SETS                1024
452#define MAX_VPS_NUH_LAYER_ID_PLUS1  63
453#define MAX_NUM_SCALABILITY_TYPES   16
454#define ENC_CFG_CONSOUT_SPACE       29           
455#else
456#define MAX_VPS_NUH_RESERVED_ZERO_LAYER_ID_PLUS1  1
457#endif
458
459
460#define MAX_CPB_CNT                     32  ///< Upper bound of (cpb_cnt_minus1 + 1)
461#if H_MV
462#define MAX_NUM_LAYER_IDS               63
463#define MAX_NUM_LAYERS                  63
464#define MAX_VPS_PROFILE_TIER_LEVEL      64
465#define MAX_VPS_ADD_OUTPUT_LAYER_SETS   1024
466#define MAX_VPS_OUTPUTLAYER_SETS        ( MAX_VPS_ADD_OUTPUT_LAYER_SETS + MAX_VPS_OP_SETS_PLUS1 + MAX_VPS_OP_SETS_PLUS1 )
467#define  MAX_NUM_VIDEO_SIGNAL_INFO      16
468#define MAX_NUM_SCALED_REF_LAYERS       MAX_NUM_LAYERS-1
469#else
470#define MAX_NUM_LAYER_IDS                64
471#endif
472
473#define COEF_REMAIN_BIN_REDUCTION        3 ///< indicates the level at which the VLC
474                                           ///< transitions from Golomb-Rice to TU+EG(k)
475
476#define CU_DQP_TU_CMAX 5                   ///< max number bins for truncated unary
477#define CU_DQP_EG_k 0                      ///< expgolomb order
478
479#define SBH_THRESHOLD                    4  ///< I0156: value of the fixed SBH controlling threshold
480 
481#define SEQUENCE_LEVEL_LOSSLESS           0  ///< H0530: used only for sequence or frame-level lossless coding
482
483#define DISABLING_CLIP_FOR_BIPREDME         1  ///< Ticket #175
484 
485#define C1FLAG_NUMBER               8 // maximum number of largerThan1 flag coded in one chunk :  16 in HM5
486#define C2FLAG_NUMBER               1 // maximum number of largerThan2 flag coded in one chunk:  16 in HM5
487#define SAO_ENCODING_CHOICE              1  ///< I0184: picture early termination
488#if SAO_ENCODING_CHOICE
489#define SAO_ENCODING_RATE                0.75
490#define SAO_ENCODING_CHOICE_CHROMA       1 ///< J0044: picture early termination Luma and Chroma are handled separately
491#if SAO_ENCODING_CHOICE_CHROMA
492#define SAO_ENCODING_RATE_CHROMA         0.5
493#endif
494#endif
495
496#define MAX_NUM_VPS                16
497#define MAX_NUM_SPS                16
498#define MAX_NUM_PPS                64
499
500#define RDOQ_CHROMA_LAMBDA          1   ///< F386: weighting of chroma for RDOQ
501
502#define MIN_SCAN_POS_CROSS          4
503
504#define FAST_BIT_EST                1   ///< G763: Table-based bit estimation for CABAC
505
506#define MLS_GRP_NUM                         64     ///< G644 : Max number of coefficient groups, max(16, 64)
507#define MLS_CG_SIZE                         4      ///< G644 : Coefficient group size of 4x4
508
509#define ADAPTIVE_QP_SELECTION               1      ///< G382: Adaptive reconstruction levels, non-normative part for adaptive QP selection
510#if ADAPTIVE_QP_SELECTION
511#define ARL_C_PRECISION                     7      ///< G382: 7-bit arithmetic precision
512#define LEVEL_RANGE                         30     ///< G382: max coefficient level in statistics collection
513#endif
514
515#define HHI_RQT_INTRA_SPEEDUP             1           ///< tests one best mode with full rqt
516#define HHI_RQT_INTRA_SPEEDUP_MOD         0           ///< tests two best modes with full rqt
517
518#if HHI_RQT_INTRA_SPEEDUP_MOD && !HHI_RQT_INTRA_SPEEDUP
519#error
520#endif
521
522#define VERBOSE_RATE 0 ///< Print additional rate information in encoder
523
524#define AMVP_DECIMATION_FACTOR            4
525
526#define SCAN_SET_SIZE                     16
527#define LOG2_SCAN_SET_SIZE                4
528
529#define FAST_UDI_MAX_RDMODE_NUM               35          ///< maximum number of RD comparison in fast-UDI estimation loop
530
531#define ZERO_MVD_EST                          0           ///< Zero Mvd Estimation in normal mode
532
533#define NUM_INTRA_MODE 36
534#if !REMOVE_LM_CHROMA
535#define LM_CHROMA_IDX  35
536#endif
537
538#define WRITE_BACK                      1           ///< Enable/disable the encoder to replace the deltaPOC and Used by current from the config file with the values derived by the refIdc parameter.
539#define AUTO_INTER_RPS                  1           ///< Enable/disable the automatic generation of refIdc from the deltaPOC and Used by current from the config file.
540#define PRINT_RPS_INFO                  0           ///< Enable/disable the printing of bits used to send the RPS.
541                                                    // using one nearest frame as reference frame, and the other frames are high quality (POC%4==0) frames (1+X)
542                                                    // this should be done with encoder only decision
543                                                    // but because of the absence of reference frame management, the related code was hard coded currently
544
545#define RVM_VCEGAM10_M 4
546
547#define PLANAR_IDX             0
548#define VER_IDX                26                    // index for intra VERTICAL   mode
549#define HOR_IDX                10                    // index for intra HORIZONTAL mode
550#define DC_IDX                 1                     // index for intra DC mode
551#define NUM_CHROMA_MODE        5                     // total number of chroma modes
552#define DM_CHROMA_IDX          36                    // chroma mode index for derived from luma intra mode
553
554
555#define FAST_UDI_USE_MPM 1
556
557#define RDO_WITHOUT_DQP_BITS              0           ///< Disable counting dQP bits in RDO-based mode decision
558
559#define FULL_NBIT 0 ///< When enabled, compute costs using full sample bitdepth.  When disabled, compute costs as if it is 8-bit source video.
560#if FULL_NBIT
561# define DISTORTION_PRECISION_ADJUSTMENT(x) 0
562#else
563# define DISTORTION_PRECISION_ADJUSTMENT(x) (x)
564#endif
565
566#define LOG2_MAX_NUM_COLUMNS_MINUS1        7
567#define LOG2_MAX_NUM_ROWS_MINUS1           7
568#define LOG2_MAX_COLUMN_WIDTH              13
569#define LOG2_MAX_ROW_HEIGHT                13
570
571#define MATRIX_MULT                             0   // Brute force matrix multiplication instead of partial butterfly
572
573#define REG_DCT 65535
574
575#define AMP_SAD                               1           ///< dedicated SAD functions for AMP
576#define AMP_ENC_SPEEDUP                       1           ///< encoder only speed-up by AMP mode skipping
577#if AMP_ENC_SPEEDUP
578#define AMP_MRG                               1           ///< encoder only force merge for AMP partition (no motion search for AMP)
579#endif
580
581#define CABAC_INIT_PRESENT_FLAG     1
582
583// ====================================================================================================================
584// Basic type redefinition
585// ====================================================================================================================
586
587typedef       void                Void;
588typedef       bool                Bool;
589
590#ifdef __arm__
591typedef       signed char         Char;
592#else
593typedef       char                Char;
594#endif
595typedef       unsigned char       UChar;
596typedef       short               Short;
597typedef       unsigned short      UShort;
598typedef       int                 Int;
599typedef       unsigned int        UInt;
600typedef       double              Double;
601typedef       float               Float;
602
603// ====================================================================================================================
604// 64-bit integer type
605// ====================================================================================================================
606
607#ifdef _MSC_VER
608typedef       __int64             Int64;
609
610#if _MSC_VER <= 1200 // MS VC6
611typedef       __int64             UInt64;   // MS VC6 does not support unsigned __int64 to double conversion
612#else
613typedef       unsigned __int64    UInt64;
614#endif
615
616#else
617
618typedef       long long           Int64;
619typedef       unsigned long long  UInt64;
620
621#endif
622
623// ====================================================================================================================
624// Type definition
625// ====================================================================================================================
626
627typedef       UChar           Pxl;        ///< 8-bit pixel type
628typedef       Short           Pel;        ///< 16-bit pixel type
629typedef       Int             TCoeff;     ///< transform coefficient
630
631#if H_3D_VSO
632// ====================================================================================================================
633// Define Distortion Types
634// ====================================================================================================================
635typedef       Int64           RMDist;     ///< renderer model distortion
636
637#if H_3D_VSO_DIST_INT
638typedef       Int64            Dist;       ///< RDO distortion
639typedef       Int64            Dist64; 
640#define       RDO_DIST_MIN     MIN_INT
641#define       RDO_DIST_MAX     MAX_INT
642#else
643typedef       UInt             Dist;       ///< RDO distortion
644typedef       UInt64           Dist; 
645#define       RDO_DIST_MIN     0
646#define       RDO_DIST_MAX     MAX_UINT
647#endif
648#endif
649/// parameters for adaptive loop filter
650class TComPicSym;
651
652// Slice / Slice segment encoding modes
653enum SliceConstraint
654{
655  NO_SLICES              = 0,          ///< don't use slices / slice segments
656  FIXED_NUMBER_OF_LCU    = 1,          ///< Limit maximum number of largest coding tree blocks in a slice / slice segments
657  FIXED_NUMBER_OF_BYTES  = 2,          ///< Limit maximum number of bytes in a slice / slice segment
658  FIXED_NUMBER_OF_TILES  = 3,          ///< slices / slice segments span an integer number of tiles
659};
660
661enum SAOComponentIdx
662{
663  SAO_Y =0,
664  SAO_Cb,
665  SAO_Cr,
666  NUM_SAO_COMPONENTS
667};
668
669enum SAOMode //mode
670{
671  SAO_MODE_OFF = 0,
672  SAO_MODE_NEW,
673  SAO_MODE_MERGE,
674  NUM_SAO_MODES
675};
676
677enum SAOModeMergeTypes
678{
679  SAO_MERGE_LEFT =0,
680  SAO_MERGE_ABOVE,
681  NUM_SAO_MERGE_TYPES
682};
683
684
685enum SAOModeNewTypes
686{
687  SAO_TYPE_START_EO =0,
688  SAO_TYPE_EO_0 = SAO_TYPE_START_EO,
689  SAO_TYPE_EO_90,
690  SAO_TYPE_EO_135,
691  SAO_TYPE_EO_45,
692
693  SAO_TYPE_START_BO,
694  SAO_TYPE_BO = SAO_TYPE_START_BO,
695
696  NUM_SAO_NEW_TYPES
697};
698#define NUM_SAO_EO_TYPES_LOG2 2
699
700enum SAOEOClasses
701{
702  SAO_CLASS_EO_FULL_VALLEY = 0,
703  SAO_CLASS_EO_HALF_VALLEY = 1,
704  SAO_CLASS_EO_PLAIN       = 2,
705  SAO_CLASS_EO_HALF_PEAK   = 3,
706  SAO_CLASS_EO_FULL_PEAK   = 4,
707  NUM_SAO_EO_CLASSES,
708};
709
710
711#define NUM_SAO_BO_CLASSES_LOG2  5
712enum SAOBOClasses
713{
714  //SAO_CLASS_BO_BAND0 = 0,
715  //SAO_CLASS_BO_BAND1,
716  //SAO_CLASS_BO_BAND2,
717  //...
718  //SAO_CLASS_BO_BAND31,
719
720  NUM_SAO_BO_CLASSES = (1<<NUM_SAO_BO_CLASSES_LOG2),
721};
722#define MAX_NUM_SAO_CLASSES  32  //(NUM_SAO_EO_GROUPS > NUM_SAO_BO_GROUPS)?NUM_SAO_EO_GROUPS:NUM_SAO_BO_GROUPS
723
724struct SAOOffset
725{
726  Int modeIdc; //NEW, MERGE, OFF
727  Int typeIdc; //NEW: EO_0, EO_90, EO_135, EO_45, BO. MERGE: left, above
728  Int typeAuxInfo; //BO: starting band index
729  Int offset[MAX_NUM_SAO_CLASSES];
730
731  SAOOffset();
732  ~SAOOffset();
733  Void reset();
734
735  const SAOOffset& operator= (const SAOOffset& src);
736};
737
738struct SAOBlkParam
739{
740
741  SAOBlkParam();
742  ~SAOBlkParam();
743  Void reset();
744  const SAOBlkParam& operator= (const SAOBlkParam& src);
745  SAOOffset& operator[](Int compIdx){ return offsetParam[compIdx];}
746private:
747  SAOOffset offsetParam[NUM_SAO_COMPONENTS];
748
749};
750
751/// parameters for deblocking filter
752typedef struct _LFCUParam
753{
754  Bool bInternalEdge;                     ///< indicates internal edge
755  Bool bLeftEdge;                         ///< indicates left edge
756  Bool bTopEdge;                          ///< indicates top edge
757} LFCUParam;
758
759// ====================================================================================================================
760// Enumeration
761// ====================================================================================================================
762
763/// supported slice type
764enum SliceType
765{
766  B_SLICE,
767  P_SLICE,
768  I_SLICE
769};
770
771/// chroma formats (according to semantics of chroma_format_idc)
772enum ChromaFormat
773{
774  CHROMA_400  = 0,
775  CHROMA_420  = 1,
776  CHROMA_422  = 2,
777  CHROMA_444  = 3
778};
779
780/// supported partition shape
781enum PartSize
782{
783  SIZE_2Nx2N,           ///< symmetric motion partition,  2Nx2N
784  SIZE_2NxN,            ///< symmetric motion partition,  2Nx N
785  SIZE_Nx2N,            ///< symmetric motion partition,   Nx2N
786  SIZE_NxN,             ///< symmetric motion partition,   Nx N
787  SIZE_2NxnU,           ///< asymmetric motion partition, 2Nx( N/2) + 2Nx(3N/2)
788  SIZE_2NxnD,           ///< asymmetric motion partition, 2Nx(3N/2) + 2Nx( N/2)
789  SIZE_nLx2N,           ///< asymmetric motion partition, ( N/2)x2N + (3N/2)x2N
790  SIZE_nRx2N,           ///< asymmetric motion partition, (3N/2)x2N + ( N/2)x2N
791  SIZE_NONE = 15
792};
793
794/// supported prediction type
795enum PredMode
796{
797  MODE_INTER,           ///< inter-prediction mode
798  MODE_INTRA,           ///< intra-prediction mode
799  MODE_NONE = 15
800};
801
802/// texture component type
803enum TextType
804{
805  TEXT_LUMA,            ///< luma
806  TEXT_CHROMA,          ///< chroma (U+V)
807  TEXT_CHROMA_U,        ///< chroma U
808  TEXT_CHROMA_V,        ///< chroma V
809  TEXT_ALL,             ///< Y+U+V
810  TEXT_NONE = 15
811};
812
813/// reference list index
814enum RefPicList
815{
816  REF_PIC_LIST_0 = 0,   ///< reference list 0
817  REF_PIC_LIST_1 = 1,   ///< reference list 1
818  REF_PIC_LIST_X = 100  ///< special mark
819};
820
821/// distortion function index
822enum DFunc
823{
824  DF_DEFAULT  = 0,
825  DF_SSE      = 1,      ///< general size SSE
826  DF_SSE4     = 2,      ///<   4xM SSE
827  DF_SSE8     = 3,      ///<   8xM SSE
828  DF_SSE16    = 4,      ///<  16xM SSE
829  DF_SSE32    = 5,      ///<  32xM SSE
830  DF_SSE64    = 6,      ///<  64xM SSE
831  DF_SSE16N   = 7,      ///< 16NxM SSE
832 
833  DF_SAD      = 8,      ///< general size SAD
834  DF_SAD4     = 9,      ///<   4xM SAD
835  DF_SAD8     = 10,     ///<   8xM SAD
836  DF_SAD16    = 11,     ///<  16xM SAD
837  DF_SAD32    = 12,     ///<  32xM SAD
838  DF_SAD64    = 13,     ///<  64xM SAD
839  DF_SAD16N   = 14,     ///< 16NxM SAD
840 
841  DF_SADS     = 15,     ///< general size SAD with step
842  DF_SADS4    = 16,     ///<   4xM SAD with step
843  DF_SADS8    = 17,     ///<   8xM SAD with step
844  DF_SADS16   = 18,     ///<  16xM SAD with step
845  DF_SADS32   = 19,     ///<  32xM SAD with step
846  DF_SADS64   = 20,     ///<  64xM SAD with step
847  DF_SADS16N  = 21,     ///< 16NxM SAD with step
848 
849  DF_HADS     = 22,     ///< general size Hadamard with step
850  DF_HADS4    = 23,     ///<   4xM HAD with step
851  DF_HADS8    = 24,     ///<   8xM HAD with step
852  DF_HADS16   = 25,     ///<  16xM HAD with step
853  DF_HADS32   = 26,     ///<  32xM HAD with step
854  DF_HADS64   = 27,     ///<  64xM HAD with step
855  DF_HADS16N  = 28,     ///< 16NxM HAD with step
856#if H_3D_VSO
857  DF_VSD      = 29,      ///< general size VSD
858  DF_VSD4     = 30,      ///<   4xM VSD
859  DF_VSD8     = 31,      ///<   8xM VSD
860  DF_VSD16    = 32,      ///<  16xM VSD
861  DF_VSD32    = 33,      ///<  32xM VSD
862  DF_VSD64    = 34,      ///<  64xM VSD
863  DF_VSD16N   = 35,      ///< 16NxM VSD
864#endif
865
866#if AMP_SAD
867  DF_SAD12    = 43,
868  DF_SAD24    = 44,
869  DF_SAD48    = 45,
870
871  DF_SADS12   = 46,
872  DF_SADS24   = 47,
873  DF_SADS48   = 48,
874
875  DF_SSE_FRAME = 50     ///< Frame-based SSE
876#else
877  DF_SSE_FRAME = 33     ///< Frame-based SSE
878#endif
879};
880
881/// index for SBAC based RD optimization
882enum CI_IDX
883{
884  CI_CURR_BEST = 0,     ///< best mode index
885  CI_NEXT_BEST,         ///< next best index
886  CI_TEMP_BEST,         ///< temporal index
887  CI_CHROMA_INTRA,      ///< chroma intra index
888  CI_QT_TRAFO_TEST,
889  CI_QT_TRAFO_ROOT,
890  CI_NUM,               ///< total number
891};
892
893/// motion vector predictor direction used in AMVP
894enum MVP_DIR
895{
896  MD_LEFT = 0,          ///< MVP of left block
897  MD_ABOVE,             ///< MVP of above block
898  MD_ABOVE_RIGHT,       ///< MVP of above right block
899  MD_BELOW_LEFT,        ///< MVP of below left block
900  MD_ABOVE_LEFT         ///< MVP of above left block
901};
902
903/// merging candidates
904#if H_3D
905enum DefaultMergCandOrder
906{
907  MRG_T = 0,            ///< MPI
908  MRG_D,                ///< DDD
909  MRG_IVMC,             ///< Temporal inter-view
910  MRG_A1,               ///< Left
911  MRG_B1,               ///< Above
912  MRG_B0,               ///< Above right
913  MRG_IVDC,             ///< Disparity inter-view
914  MRG_VSP,              ///< VSP
915  MRG_A0,               ///< Left bottom
916  MRG_B2,               ///< Above left
917  MRG_IVSHIFT,          ///< Shifted IVMC of Shifted IVDC. (These are mutually exclusive)
918  MRG_COL               ///< Temporal co-located
919};
920#endif
921
922/// coefficient scanning type used in ACS
923enum COEFF_SCAN_TYPE
924{
925  SCAN_DIAG = 0,         ///< up-right diagonal scan
926  SCAN_HOR,              ///< horizontal first scan
927  SCAN_VER               ///< vertical first scan
928};
929
930namespace Profile
931{
932  enum Name
933  {
934    NONE = 0,
935    MAIN = 1,
936    MAIN10 = 2,
937    MAINSTILLPICTURE = 3,
938#if H_MV
939    MULTIVIEWMAIN = 6,
940#if H_3D
941    MAIN3D = 8, 
942#endif
943#endif
944  };
945}
946
947namespace Level
948{
949  enum Tier
950  {
951    MAIN = 0,
952    HIGH = 1,
953  };
954
955  enum Name
956  {
957    NONE     = 0,
958    LEVEL1   = 30,
959    LEVEL2   = 60,
960    LEVEL2_1 = 63,
961    LEVEL3   = 90,
962    LEVEL3_1 = 93,
963    LEVEL4   = 120,
964    LEVEL4_1 = 123,
965    LEVEL5   = 150,
966    LEVEL5_1 = 153,
967    LEVEL5_2 = 156,
968    LEVEL6   = 180,
969    LEVEL6_1 = 183,
970    LEVEL6_2 = 186,
971  };
972}
973//! \}
974
975#if H_MV
976
977/// scalability types
978  enum ScalabilityType
979  {
980#if H_3D
981    DEPTH_ID = 0,   
982#endif   
983    VIEW_ORDER_INDEX  = 1,
984    DEPENDENCY_ID = 2,
985    AUX_ID = 3,
986  };
987#endif
988#if H_3D
989  // Renderer
990  enum BlenMod
991  {
992    BLEND_NONE  = -1,
993    BLEND_AVRG  = 0,
994    BLEND_LEFT  = 1,
995    BLEND_RIGHT = 2,
996    BLEND_GEN   =  3
997  };
998
999 
1000  enum
1001  {
1002    VIEWPOS_INVALID = -1,
1003    VIEWPOS_LEFT    = 0,
1004    VIEWPOS_RIGHT   = 1,
1005    VIEWPOS_MERGED  = 2
1006  };
1007
1008#define Log2( n ) ( log((double)n) / log(2.0) ) // Ed.(GT): This is very very bad and should be fixed to used integer arithmetics ( see gCeilLog2 ) moreover it should not be defined in the tool macro section!
1009#endif
1010#endif
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