source: 3DVCSoftware/branches/HTM-12.2-dev1-Mediatek/source/Lib/TLibCommon/TypeDef.h @ 1092

Last change on this file since 1092 was 1092, checked in by mediatek-htm, 10 years ago

Adding J0035 related changes, which reduces table size for the DMM wedgelet patterns. The corresponding changes are marked by macro MTK_DMM_SIM_J0035.

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33
34/** \file     TypeDef.h
35    \brief    Define basic types, new types and enumerations
36*/
37
38#ifndef _TYPEDEF__
39#define _TYPEDEF__
40
41//! \ingroup TLibCommon
42//! \{
43/////////////////////////////////////////////////////////////////////////////////////////
44///////////////////////////////// EXTENSION SELECTION /////////////////////////////////// 
45/////////////////////////////////////////////////////////////////////////////////////////
46
47/* HEVC_EXT might be defined by compiler/makefile options.
48   
49   Linux makefiles support the following settings:   
50   make             -> HEVC_EXT not defined   
51   make HEVC_EXT=0  -> H_MV=0 H_3D=0   --> plain HM
52   make HEVC_EXT=1  -> H_MV=1 H_3D=0   --> MV only
53   make HEVC_EXT=2  -> H_MV=1 H_3D=1   --> full 3D
54*/
55
56#ifndef HEVC_EXT
57#define HEVC_EXT                    2
58#endif
59
60#if ( HEVC_EXT < 0 )||( HEVC_EXT > 2 )
61#error HEVC_EXT must be in the range of 0 to 2, inclusive.
62#endif
63
64#define H_MV          ( HEVC_EXT != 0)
65#define H_3D          ( HEVC_EXT == 2)
66
67#define NTT_BUG_FIX_TK54    1
68#define BUG_FIX_TK65        1
69
70#define MTK_I0093           1
71#define MTK_J0033           1
72/////////////////////////////////////////////////////////////////////////////////////////
73///////////////////////////////////   MAJOR DEFINES   /////////////////////////////////// 
74/////////////////////////////////////////////////////////////////////////////////////////
75
76#if H_MV
77#define H_MV_ENC_DEC_TRAC                 1  //< CU/PU level tracking
78#endif
79
80#if H_3D
81#define H_3D_QTLPC                        1   // OL_QTLIMIT_PREDCODING_B0068 //JCT3V-B0068
82                                              // HHI_QTLPC_RAU_OFF_C0160 JCT3V-C0160 change 2: quadtree limitation and predictive coding switched off in random access units
83                                              // MTK_TEX_DEP_PAR_G0055 Texture-partition-dependent depth partition. JCT3V-G0055
84
85#define H_3D_VSO                          1   // VSO, View synthesis optimization, includes:
86                                              // HHI_VSO
87                                              // HHI_VSO_LS_TABLE_M23714 enable table base Lagrange multiplier optimization
88                                              // SAIT_VSO_EST_A0033, JCT3V-A0033 modification 3
89                                              // LGE_WVSO_A0119
90                                              // SCU_HS_VSD_BUGFIX_IMPROV_G0163
91#define H_3D_NBDV                         1   // Neighboring block disparity derivation
92                                              // QC_JCT3V-A0097
93                                              // LGE_DVMCP_A0126
94                                              // LGE_DVMCP_MEM_REDUCTION_B0135     
95                                              // QC_SIMPLE_NBDV_B0047
96                                              // FIX_LGE_DVMCP_B0133
97                                              // QC_NBDV_LDB_FIX_C0055
98                                              // MTK_SAIT_TEMPORAL_FIRST_ORDER_C0141_C0097
99                                              // MTK_SIMPLIFY_DVTC_C0135           
100                                              // QC_CU_NBDV_D0181
101                                              // SEC_DEFAULT_DV_D0112
102                                              // MTK_DVMCP_FIX_E0172       fix the mismatch between software and WD for DV derivation from DVMCP blocks, issue 2 in JCT3V-E0172
103                                              // SEC_SIMPLIFIED_NBDV_E0142 Simplified NBDV, JCT3V-E0142 and JCT3V-E0190
104                                              // MTK_NBDV_TN_FIX_E0172     fix the issue of DV derivation from the temporal neighboring blocks, issue 7 in JCT3V-E0172
105                                              // MTK_TEXTURE_MRGCAND_BUGFIX_E0182  Bug fix for TEXTURE MERGING CANDIDATE     , JCT3V-E0182
106
107#define H_3D_ARP                          1   // Advanced residual prediction (ARP), JCT3V-D0177
108                                              // QC_MTK_INTERVIEW_ARP_F0123_F0108 JCT3V-F0123; JCT3V-F0108
109                                              // SHARP_ARP_REF_CHECK_F0105        ARP reference picture selection and DPB check
110                                              // LGE_ARP_CTX_F0161                JCT3V-F0161
111                                              // MTK_ARP_FLAG_CABAC_SIMP_G0061 Use 2 context for ARP flag referring to only left neighbor block in JCT3V-G0061
112                                              // MTK_ARP_REF_SELECTION_G0053 ARP Reference picture selection in JCT3V-G0053
113                                              // MTK_ALIGN_SW_WD_BI_PRED_ARP_H0085  Align the SW and WD for the bi-prediction ARP PUs by disallowing non-normative fast bi-prediction for ARP PUs, JCT3V-H0085
114                                              // QC_I0051_ARP_SIMP         
115                                              // SHARP_ARP_CHROMA_I0104     
116                                              // MTK_I0072_IVARP_SCALING_FIX
117
118#define H_3D_IC                           1   // Illumination Compensation, JCT3V-B0045, JCT3V-C0046, JCT3V-D0060
119                                              // Unifying rounding offset, for IC part, JCT3V-D0135
120                                              // Full Pel Interpolation for Depth, HHI_FULL_PEL_DEPTH_MAP_MV_ACC
121                                              // SHARP_ILLUCOMP_REFINE_E0046
122                                              // MTK_CLIPPING_ALIGN_IC_E0168       // To support simplify bi-prediction PU with identical motion checking, JCT3V-E0168
123                                              // LGE_IC_CTX_F0160 //JCT3V-F0160
124                                              // SEC_ONLY_TEXTURE_IC_F0151
125                                              // MTK_IC_FLAG_CABAC_SIMP_G0061
126                                              // SEC_IC_ARP_SIG_G0072, Disabling IC when ARP is enabled, option 1 in JCT3V-G0072, part 2 in JCT3V-G0121
127                                              // MTK_LOW_LATENCY_IC_ENCODING_H0086  Low-latency IC encoding in JCT3V-H0086
128                                              // MTK_LOW_LATENCY_IC_ENCODING_H0086_FIX  1  // Remove the global variables used in JCT3V-H0086
129                                              // SEC_IC_NEIGHBOR_CLIP_I0080    // Clipping of neighboring sample position, JCT3V-I0080
130
131#if H_3D_NBDV
132#define H_3D_NBDV_REF                     1   // Depth oriented neighboring block disparity derivation
133                                              // MTK_D0156
134                                              // MERL_D0166: Reference view selection in NBDV & Bi-VSP
135                                              // MERL_C0152: Basic VSP
136                                              // NBDV_DEFAULT_VIEWIDX_BUGFIX Bug fix for invalid default view index for NBDV
137                                              // NTT_DoNBDV_VECTOR_CLIP_E0141 disparity vector clipping in DoNBDV, JCT3V-E0141 and JCT3V-E0209
138                                              // SEC_VER_DONBDV_H0103          Vertical DV Restriction for DoNBDV
139#endif
140
141#define H_3D_VSP                          1   // View synthesis prediction
142                                              // MERL_C0152: Basic VSP
143                                              // MERL_D0166: Reference view selection in NBDV & Bi-VSP
144                                              // MTK_D0105, LG_D0139: No VSP for depth
145                                              // QC_D0191: Clean up
146                                              // LG_D0092: Multiple VSP candidate allowed
147                                              // MTK_VSP_FIX_ALIGN_WD_E0172
148                                              // NTT_VSP_ADAPTIVE_SPLIT_E0207 adaptive sub-PU partitioning in VSP, JCT3V-E0207
149                                              // NTT_VSP_DC_BUGFIX_E0208 bugfix for sub-PU based DC in VSP, JCT3V-E0208
150                                              // NTT_VSP_COMMON_E0207_E0208 common part of JCT3V-E0207 and JCT3V-E0208
151                                              // MTK_F0109_LG_F0120_VSP_BLOCK MTK_LG_SIMPLIFY_VSP_BLOCK_PARTITION_F0109_F0120 
152                                              // SHARP_VSP_BLOCK_IN_AMP_F0102 VSP partitioning for AMP
153                                              // MTK_VSP_SIMPLIFICATION_F0111 1. Inherited VSP also use NBDV of current CU, 2. VSP cannot be inherited from above LCU rowss
154                                              // LGE_SHARP_VSP_INHERIT_F0104
155                                              // NTT_STORE_SPDV_VSP_G0148 Storing Sub-PU based DV for VSP
156                                              // Restricted bi-prediction for VSP
157
158#define H_3D_IV_MERGE                     1   // Inter-view motion merge candidate
159                                              // HHI_INTER_VIEW_MOTION_PRED
160                                              // SAIT_IMPROV_MOTION_PRED_M24829, improved inter-view motion vector prediction
161                                              // QC_MRG_CANS_B0048             , JCT3V-B0048, B0086, B0069
162                                              // OL_DISMV_POS_B0069            , different pos for disparity MV candidate, B0069
163                                              // MTK_INTERVIEW_MERGE_A0049     , second part
164                                              // QC_AMVP_MRG_UNIFY_IVCAN_C0051     
165                                              // TEXTURE MERGING CANDIDATE     , JCT3V-C0137
166                                              // QC_INRIA_MTK_MRG_E0126
167                                              // ETRIKHU_MERGE_REUSE_F0093 QC_DEPTH_IV_MRG_F0125, JCT3V-F0125: Depth oriented Inter-view MV candidate
168                                              // EC_MPI_ENABLING_MERGE_F0150, MPI flag in VPS and enabling in Merge mode
169                                              // MTK_NBDV_IVREF_FIX_G0067      , Disable IvMC, VSP when IVREF is not available, JCT3V-G0067
170                                              // SEC_DEPTH_DV_DERIVAITON_G0074, Simplification of DV derivation for depth, JCT3V-G0074
171                                              // QC_DEPTH_MERGE_SIMP_G0127 Remove DV candidate and shifting candidate for depth coding
172                                              // QC_IV_PRED_CONSTRAINT_H0137   Constraint on inter-view (motion) prediction tools
173                                              // ETRIKHU_BUGFIX_H0083          bug-fix for DV candidate pruning
174                                              // ETRIKHU_CLEANUP_H0083         cleaned-up source code for constructing merging candidate list
175                                              // ETRIKHU_CLEANUP_H0083_MISSING missing guard macros added by GT
176                                              // SHARP_SIMPLE_MERGE_H0062      Restrict 3D-HEVC merge cand in small PUs
177                                              // MTK_DIS_SPBIP8X4_H0205        Disable bi-prediction for 8x4 and 4x8 sub PU and remove the SPIVMP 2Nx2N restriction
178                                              // SEC_ADAPT_DISABLE_IVMP        Disabling IVMP merge candidates when IC is enabled, JCT3V-H0070
179                                              // SEC_SIMP_SHIFTED_DV_I0086     Simplification of Shifted DV candidate, JCT3V-I0086
180#define MTK_MRG_LIST_SIZE_CLEANUP_J0059   1   // Include VSP for deriving merge candidate list size, JCT3V-J0059
181
182
183#define H_3D_TMVP                         1   // QC_TMVP_C0047
184                                              // Sony_M23639
185
186#define H_3D_DIM                          1   // DIM, Depth intra modes, includes:
187                                              // HHI_DMM_WEDGE_INTRA
188                                              // HHI_DMM_PRED_TEX
189                                              // FIX_WEDGE_NOFLOAT_D0036
190                                              // LGE_EDGE_INTRA_A0070
191                                              // LGE_DMM3_SIMP_C0044
192                                              // QC_DC_PREDICTOR_D0183
193                                              // HHI_DELTADC_DLT_D0035
194                                              // PKU_QC_DEPTH_INTRA_UNI_D0195
195                                              // RWTH_SDC_DLT_B0036
196                                              // INTEL_SDC64_D0193
197                                              // RWTH_SDC_CTX_SIMPL_D0032
198                                              // LGE_CONCATENATE_D0141
199                                              // FIX_SDC_ENC_RD_WVSO_D0163
200                                              // MTK_SAMPLE_BASED_SDC_D0110
201                                              // SEC_DMM2_E0146_HHIFIX Removal of DMM2 from DMMs
202                                              // ZJU_DEPTH_INTRA_MODE_E0204 Simplified Binarization for depth_intra_mode
203                                              // KWU_SDC_SIMPLE_DC_E0117 Simplified DC calculation for SDC
204                                              // SCU_HS_DMM4_REMOVE_DIV_E0242 DMM4 Division Removal
205                                              // LGE_SDC_REMOVE_DC_E0158 Removal of DC mode from SDC
206                                              // LGE_PKU_DMM3_OVERLAP_E0159_HHIFIX 1   Removal of overlap between DMM3 and DMM1
207                                              // LGE_PRED_RES_CODING_DLT_DOMAIN_F0159 JCT3V-F0159
208                                              // HHI_DIM_PREDSAMP_FIX_F0171
209                                              // SEC_DMM3_RBC_F0147 Removal of DMM3 and RBC from DMMs
210                                              // QC_DIM_DELTADC_UNIFY_F0132 Unify delta DC coding in depth intra modes
211                                              // Unify intra SDC and inter SDC
212                                              // QC_GENERIC_SDC_G0122 Generalize SDC to all depth intra modes
213                                              // SCU_HS_DEPTH_DC_PRED_G0143
214                                              // HS_TSINGHUA_SDC_SPLIT_G0111
215                                              // QC_PKU_SDC_SPLIT_G0123 Intra SDC Split
216                                              // HS_DMM_SDC_PREDICTOR_UNIFY_H0108  Unification of DMM and SDC predictor derivation
217                                              // LGE_SIMP_DIM_NOT_PRESENT_FLAG_CODING_H0119_H0135  Use only one context for CABAC of dim_not_present_flag
218                                              // QC_SIMP_DELTADC_CODING_H0131   Simplify detaDC entropy coding
219                                              // MTK_DMM_SIMP_CODE_H0092        Remove CABAC context for DMM1 mode coding
220                                              // MTK_DELTA_DC_FLAG_ONE_CONTEXT_H0084_H0100_H0113 Use only one context for CABAC of delta_dc_flag as in JCTVC-H0084, JCTVC-H0100 and JCTVC-H0113
221                                              // MTK_SDC_FLAG_FIX_H0095                          Remove conditional check of PCM flag based on SDC flag, JCTVC-H0095
222                                              // SEC_NO_RESI_DLT_H0105   
223                                              // MTK_DLT_CODING_FIX_H0091
224                                              // HS_DMM_SIGNALLING_I0120
225                                              // SHARP_DMM1_I0110 // LUT size reduction for DMM1 proposed in JCT3V-I0110
226                                              // FAST_SDC_OFFSET_DECISION_I0084
227                                              // SEPARATE_FLAG_I0085
228                                              // H_3D_DELTA_DLT
229                                              // RWTH_DLT_CLIP_I0057               1
230
231
232
233#define H_3D_SINGLE_DEPTH                 1   // Single depth mode proposed in JCT3V-I0095
234#define MTK_SINGLE_DEPTH_VPS_FLAG_J0060   1   // Add VPS control flags and remove slice header control flag for single depth, JCT3V-J0060
235
236#define H_3D_INTER_SDC                    1   // INTER SDC, Inter simplified depth coding
237                                              // LGE_INTER_SDC_E0156 Enable inter SDC for depth coding
238                                              // SEC_INTER_SDC_G0101 Improved inter SDC with multiple DC candidates
239
240#define H_3D_SPIVMP                       1   // H_3D_SPIVMP    // JCT3V-F0110: Sub-PU level inter-view motion prediction
241                                              // SEC_SPIVMP_MCP_SIZE_G0077, Apply SPIVMP only to 2Nx2N partition, JCT3V-G0077
242                                              // QC_SPIVMP_MPI_G0119 Sub-PU level MPI merge candidate
243                                              // Simplification on Sub-PU level temporal interview motion prediction
244                                              // MPI_SUBPU_DEFAULT_MV_H0077_H0099_H0111_H0133
245
246#define H_3D_DBBP                         1   // DBBP: Depth-based Block Partitioning and Merging
247                                              // MTK_DBBP_AMP_REM_H0072   
248                                              // RWTH_DBBP_NO_SPU_H0057   
249                                              // SEC_DBBP_FILTERING_H0104
250                                              // MTK_DBBP_SIGNALING_H0094   
251                                              // H_3D_FIX_DBBP_IVMP        Fix . Enable IVMP is always disabled, when DBBP is enabled. The original intention is to disable Sub-PU IVMP when DBBP is enabled, not to disable IVMP itself.
252                                              // SEC_DBBP_EXPLICIT_SIG_I0077       1   // Remove the partition derivation and signal dbbp_flag only when the partition mode is 2NxN/Nx2N, JCT3V-I0077
253                                              // Disallow DBBP in 8x8 CU, JCT3V-I0078
254                                              // SHARP_DBBP_SIMPLE_FLTER_I0109     1   // Simple condition and one dimensional filter for DBBP
255                                              // SEC_DBBP_DMM4_THRESHOLD_I0076     Simplification of threshold derivation for DBBP and DMM4, JCT3V-I0076
256
257
258#define H_3D_DDD                          1   // Disparity derived depth coding
259
260#define H_3D_FCO                          0   // Flexible coding order for 3D
261#if H_3D_FCO
262#define H_3D_FCO                     1
263#endif
264
265#define H_3D_FAST_INTRA_SDC               1   // I0123
266
267// OTHERS
268                                              // MTK_SONY_PROGRESSIVE_MV_COMPRESSION_E0170 // Progressive MV Compression, JCT3V-E0170
269#define H_3D_REN_MAX_DEV_OUT              0   // Output maximal possible shift deviation
270#define H_3D_FAST_TEXTURE_ENCODING        1   // Fast merge mode decision and early CU determination for texture component of dependent view, JCT3V-E0173
271                                              // MTK_FAST_TEXTURE_ENCODING_E0173
272#if H_3D_DIM
273#define H_3D_FAST_DEPTH_INTRA             1   // Fast DMM and RBC Mode Selection
274                                              // SCU_HS_FAST_DEPTH_INTRA_E0238_HHIFIX
275#define MTK_DMM_SIM_J0035                 1
276#endif
277
278// Rate Control
279#define KWU_FIX_URQ                       1
280#define KWU_RC_VIEWRC_E0227               0  ///< JCT3V-E0227, view-wise target bitrate allocation
281#define KWU_RC_MADPRED_E0227              0  ///< JCT3V-E0227, inter-view MAD prediction
282#endif // H_3D
283
284
285
286/////////////////////////////////////////////////////////////////////////////////////////
287///////////////////////////////////   DERIVED DEFINES /////////////////////////////////// 
288/////////////////////////////////////////////////////////////////////////////////////////
289
290// Fixes
291
292///// ***** SINGLE DEPTH MODE *********
293#if H_3D_SINGLE_DEPTH
294#define SINGLE_DEPTH_MODE_CAND_LIST_SIZE            2 // size of the sample candidate list
295#endif
296
297///// ***** VIEW SYNTHESIS OPTIMIZAION *********
298#if H_3D_VSO                                 
299#define H_3D_VSO_DIST_INT                 1   // Allow negative synthesized view distortion change
300#define H_3D_VSO_COLOR_PLANES             1   // Compute VSO distortion on color planes
301#define H_3D_VSO_EARLY_SKIP               1   // LGE_VSO_EARLY_SKIP_A0093, A0093 modification 4
302#define H_3D_VSO_RM_ASSERTIONS            0   // Output VSO assertions
303#define H_3D_VSO_SYNTH_DIST_OUT           0   // Output of synthesized view distortion instead of depth distortion in encoder output
304#endif
305
306////   ****** NEIGHBOURING BLOCK-BASED DISPARITY VECTOR  *********
307#if H_3D_NBDV
308#define DVFROM_LEFT                       0
309#define DVFROM_ABOVE                      1
310#define IDV_CANDS                         2
311#endif
312
313///// ***** ADVANCED INTERVIEW RESIDUAL PREDICTION *********
314#if H_3D_ARP
315#define H_3D_ARP_WFNR                     3
316#endif
317
318///// ***** DEPTH INTRA MODES *********
319#if H_3D_DIM
320                                              // HHI_DMM4_ENC_I0066
321#define H_3D_DIM_DMM                      1   // Depth Modeling Modes
322#define H_3D_DIM_SDC                      1   // Simplified Depth Coding method
323#define H_3D_DIM_DLT                      1   // Depth Lookup Table
324
325#define H_3D_DIM_ENC                      1   // Depth Intra encoder optimizations, includes:
326                                              // HHI_DEPTH_INTRA_SEARCH_RAU_C0160
327                                              // LG_ZEROINTRADEPTHRESI_A0087
328#endif
329///// ***** VIEW SYNTHESIS PREDICTION *********
330#if H_3D_VSP
331#define H_3D_VSP_BLOCKSIZE                4   // Supported values: 1, 2, and 4
332#if H_3D_VSP_BLOCKSIZE == 1
333#define H_3D_VSP_CONSTRAINED              1   // Constrained VSP @ 1x1
334#else
335#define H_3D_VSP_CONSTRAINED              0
336#endif
337#endif
338
339
340///// ***** ILLUMATION COMPENSATION *********
341#if H_3D_IC
342#define IC_REG_COST_SHIFT                 7
343#define IC_CONST_SHIFT                    5
344#define IC_SHIFT_DIFF                     12
345#define IC_LOW_LATENCY_ENCODING_THRESHOLD 0.1 // Threshold for low-latency IC encoding in JCT3V-H0086
346#endif
347
348
349///// ***** DEPTH BASED BLOCK PARTITIONING *********
350#if H_3D_DBBP
351#define DBBP_INVALID_SHORT                (-4)
352#define DBBP_PACK_MODE               SIZE_2NxN
353#endif
354
355
356///// ***** FCO *********
357#if H_3D_FCO
358#define H_3D_FCO_VSP_DONBDV_E0163               1   // Adaptive depth reference for flexible coding order
359#else
360#define H_3D_FCO_VSP_DONBDV_E0163               0   // Adaptive depth reference for flexible coding order
361#endif
362
363#if H_3D
364#define PPS_FIX_DEPTH                           1
365#endif
366
367/////////////////////////////////////////////////////////////////////////////////
368///////////////////////////////////   MV_HEVC HLS  //////////////////////////////
369/////////////////////////////////////////////////////////////////////////////////
370// TBD: Check if integration is necessary.
371#define H_MV_HLS_PTL_LIMITS                  0
372#define H_MV_HLS7_GEN                        0  // General changes (not tested)
373#define H_MV_ALIGN_HM_15                     1 
374
375// POC
376// #define H_MV_HLS_7_POC_P0041_3            0 // (POC/P0041/POC reset) #3 It was remarked that we should require each non-IRAP picture that has discardable_flag equal to 1 to have NUT value indicating that it is a sub-layer non-reference picture. This was agreed. Decision: Adopt (with constraint for discardable_flag as described above)
377// #define H_MV_HLS_7_POC_P0041_FIXES        0 // (POC/P0041/Fixes) For each non-IRAP picture that has discardable_flag equal to 1 to have NUT value indicating that it is a sub-layer non-reference picture.
378// #define H_MV_HLS_7_POC_P0056_4            0 // (POC/P0056/layer tree poc) #4 Proposal 1: If the POC reset approach is adopted as the basis for multi-layer POC derivation, it is proposed to derive the POC anchor picture from the previous TID0 picture (that is not a RASL picture, a RADL picture or a sub-layer non-reference picture and not with discardable_flag equal to 1) of  the current layer or any of its reference layer. This is asserted to improve loss resilience and reduce bit rate overhead. Decision: Adopt Proposal 1 (with the suggested modifications Ewith text provided as P0297).
379
380// SEI related
381//#define H_MV_HLS_8_SEI_NODOC_53  0 // #53 (SEI    /NODOC/Added Multiview view position SEI message) Plain copy from AVC.
382//#define H_MV_HLS_8_SEI_NODOC_52  0 // #52 (SEI    /NODOC/Added Multiview acquisition information SEI) Plain copy from AVC.
383//#define H_MV_HLS_8_SEI_NODOC_51  0 // #51 (SEI    /NODOC/Added Multiview scene information SEI message)
384//#define H_MV_HLS_8_SEI_Q0189_35  0 // #35 (SEI    /Q0189/SEI message for indicating constraints on TMVP) Proposal 2.3,  SEI message for indicating constraints on TMVP
385//#define H_MV_HLS_8_EDF_Q0116_29  0 // #29 (ED.FIX /Q0116/Recovery point SEI) , consider adding a note regarding how random accessibility is affected by the recovery point SEI message
386//#define H_MV_HLS_8_GEN_Q0183_23  0 // #23 (GEN    /Q0183/SEI clean-ups) numerous small clean-ups on SEI messages.
387//#define H_MV_HLS_8_MIS_Q0247_49  0 // #49 (MISC   /Q0247/frame-field information SEI message)
388//#define H_MV_HLS_8_MIS_Q0189_34  0 // #34 (MISC   /Q0189/slice temporal mvp enabled flag) Proposal 2.2, clarification of semantics of slice temporal mvp enabled flag
389//#define H_MV_HLS_8_EDF_Q0081_01  0 // #1  (ED.FIX /Q0081/alpha channel persist) On reuse of alpha planes in auxiliary pictures. It was asked why there would not be a presumption that the alpha channel content would simply persist, without needing the flag to indicate it. Decision (Ed.): Delegated to editors to clarify, as necessary, that the alpha channel content persists until cancelled or updated in output order.
390//#define H_MV_HLS_8_SEI_Q0253_37  0 // #37 (SEI    /Q0253/layer not present), modified semantics of layers not present SEI message to correct bug introduced during editing
391//#define H_MV_HLS_8_SEI_Q0045_11  0 // #11 (SEI    /Q0045/Overlay) Proposal for an SEI message on selectable overlays. Decision: Adopt (modified for variable-length strings).
392//#define H_MV_HLS_7_SEI_P0133_28  0 // (SEI/P0133/Recovery point SEI) #28 Decision: Adopt change to recover point semantics only (-v3)
393//#define H_MV_HLS_7_SEI_P0123_25  0 // (SEI/P0123/Alpha channel info) #25 Add alpha channel information SEI message Decision: Adopt. Constrain the bit depth indicated to be equal to the coded bit depth of the aux picture.
394
395// DPB
396//#define H_MV_HLS_8_HRD_Q0102_09  0 // #9  (HRD    /Q0102/NoOutputOfPriorPicsFlag) It was suggested that also the separate_colour_plane_flag should affect inference of NoOutputOfPriorPicsFlag. Decision (Ed.): Agreed (affects RExt text).
397//#define H_MV_HLS_8_DBP_Q0154_38  0 // #38 (DBP    /Q0154/VPS DPB) Proposal in C.5.2.1: Add in the decoding process that when a new VPS is activated, all pictures in the DPB are marked as unused for reference
398//#define H_MV_HLS_8_HRD_Q0154_10  0 // #10 (HRD    /Q0154/DPB Flushing and parameters) On picture flushing and DPB parameters Decision: Adopted (some details to be discussed further in BoG).
399//#define H_MV_HLS_7_OTHER_P0187_1 0 // (OTHER/P0187/NoOutputOfPriorPicsFlag) #1 Inference of NoOutputOfPriorPicsFlag and proposes to take into account colour format and bit depth for the inference in addition to spatial resolution
400
401// OTHERS
402//#define H_MV_HLS_8_HSB_Q0041_03  0 // #3  (HS     /Q0041/hybrid scalability) The proposed text was endorsed, with non-editorial open issues considered as follows ?// #define H_MV_HLS_7_OTHER_P0187_1          0 // (OTHER/P0187/NoOutputOfPriorPicsFlag) #1 Inference of NoOutputOfPriorPicsFlag and proposes to take into account colour format and bit depth for the inference in addition to spatial resolution
403//#define H_MV_HLS_8_MIS_Q0078_24  0 // #24 (MISC   /Q0078/scan and pic type) , Items 3 b,c and 4, clarifying which pictures in an output layer sets are applied the values of general_progressive_source_flag, general_interlaced_source_flag, general_non_packed_constraint_flag and general_frame_only_constraint_flag.
404//#define H_MV_HLS_7_HRD_P0138_6   0 //     (HRD/P0138/HRD parameters for bitstreams excluding) #6 Decision: Adopt (as revised in updated contribution, with the specification of a flag in the BP SEI (HRD/P0192/sub-DPB) #12 Establish sub-DPBs based on the representation format indicated at the VPS level. It was suggested that the expressed shared capacity limit would need to be less than or equal to the sum of the individual capacity limits. Decision: Adopt as modified. Further study is encouraged on profile/level constraint selections.
405
406/////////////////////////////////////////////////////////////////////////////////////////
407///////////////////////////////////   HM RELATED DEFINES ////////////////////////////////
408/////////////////////////////////////////////////////////////////////////////////////////
409#define HARMONIZE_GOP_FIRST_FIELD_COUPLE  1
410#define FIX_FIELD_DEPTH                 1
411#if H_MV
412#define EFFICIENT_FIELD_IRAP            0
413#else
414#define EFFICIENT_FIELD_IRAP            1
415#endif
416#define ALLOW_RECOVERY_POINT_AS_RAP     1
417#define BUGFIX_INTRAPERIOD              1
418#define SAO_ENCODE_ALLOW_USE_PREDEBLOCK 1
419
420#define SAO_SGN_FUNC 1
421
422#define TILE_SIZE_CHECK 1
423
424#define FIX1172 1 ///< fix ticket #1172
425
426#define SETTING_PIC_OUTPUT_MARK     1
427#define SETTING_NO_OUT_PIC_PRIOR    1
428#define FIX_EMPTY_PAYLOAD_NAL       1
429#define FIX_WRITING_OUTPUT          1
430#define FIX_OUTPUT_EOS              1
431
432#define FIX_POC_CRA_NORASL_OUTPUT   1
433
434#define MAX_NUM_PICS_IN_SOP           1024
435
436#define MAX_NESTING_NUM_OPS         1024
437#define MAX_NESTING_NUM_LAYER       64
438
439#if H_MV
440#define MAX_VPS_NUM_HRD_PARAMETERS                1024
441#else
442#define MAX_VPS_NUM_HRD_PARAMETERS                1
443#endif
444#if H_MV
445#define MAX_NUM_SUB_LAYERS                        7
446#define MAX_NUM_SIGNALLED_PARTITIONING_SCHEMES    16
447#endif
448#define MAX_VPS_OP_SETS_PLUS1                     1024
449#if H_MV
450#define MAX_VPS_NUM_ADD_LAYER_SETS                1024
451#define MAX_VPS_NUH_LAYER_ID_PLUS1  63
452#define MAX_NUM_SCALABILITY_TYPES   16
453#define ENC_CFG_CONSOUT_SPACE       29           
454#else
455#define MAX_VPS_NUH_RESERVED_ZERO_LAYER_ID_PLUS1  1
456#endif
457
458
459#define MAX_CPB_CNT                     32  ///< Upper bound of (cpb_cnt_minus1 + 1)
460#if H_MV
461#define MAX_NUM_LAYER_IDS               63
462#define MAX_NUM_LAYERS                  63
463#define MAX_VPS_PROFILE_TIER_LEVEL      64
464#define MAX_VPS_ADD_OUTPUT_LAYER_SETS   1024
465#define MAX_VPS_OUTPUTLAYER_SETS        ( MAX_VPS_ADD_OUTPUT_LAYER_SETS + MAX_VPS_OP_SETS_PLUS1 + MAX_VPS_OP_SETS_PLUS1 )
466#define  MAX_NUM_VIDEO_SIGNAL_INFO      16
467#define MAX_NUM_SCALED_REF_LAYERS       MAX_NUM_LAYERS-1
468#else
469#define MAX_NUM_LAYER_IDS                64
470#endif
471
472#define COEF_REMAIN_BIN_REDUCTION        3 ///< indicates the level at which the VLC
473                                           ///< transitions from Golomb-Rice to TU+EG(k)
474
475#define CU_DQP_TU_CMAX 5                   ///< max number bins for truncated unary
476#define CU_DQP_EG_k 0                      ///< expgolomb order
477
478#define SBH_THRESHOLD                    4  ///< I0156: value of the fixed SBH controlling threshold
479 
480#define SEQUENCE_LEVEL_LOSSLESS           0  ///< H0530: used only for sequence or frame-level lossless coding
481
482#define DISABLING_CLIP_FOR_BIPREDME         1  ///< Ticket #175
483 
484#define C1FLAG_NUMBER               8 // maximum number of largerThan1 flag coded in one chunk :  16 in HM5
485#define C2FLAG_NUMBER               1 // maximum number of largerThan2 flag coded in one chunk:  16 in HM5
486#define SAO_ENCODING_CHOICE              1  ///< I0184: picture early termination
487#if SAO_ENCODING_CHOICE
488#define SAO_ENCODING_RATE                0.75
489#define SAO_ENCODING_CHOICE_CHROMA       1 ///< J0044: picture early termination Luma and Chroma are handled separately
490#if SAO_ENCODING_CHOICE_CHROMA
491#define SAO_ENCODING_RATE_CHROMA         0.5
492#endif
493#endif
494
495#define MAX_NUM_VPS                16
496#define MAX_NUM_SPS                16
497#define MAX_NUM_PPS                64
498
499#define RDOQ_CHROMA_LAMBDA          1   ///< F386: weighting of chroma for RDOQ
500
501#define MIN_SCAN_POS_CROSS          4
502
503#define FAST_BIT_EST                1   ///< G763: Table-based bit estimation for CABAC
504
505#define MLS_GRP_NUM                         64     ///< G644 : Max number of coefficient groups, max(16, 64)
506#define MLS_CG_SIZE                         4      ///< G644 : Coefficient group size of 4x4
507
508#define ADAPTIVE_QP_SELECTION               1      ///< G382: Adaptive reconstruction levels, non-normative part for adaptive QP selection
509#if ADAPTIVE_QP_SELECTION
510#define ARL_C_PRECISION                     7      ///< G382: 7-bit arithmetic precision
511#define LEVEL_RANGE                         30     ///< G382: max coefficient level in statistics collection
512#endif
513
514#define HHI_RQT_INTRA_SPEEDUP             1           ///< tests one best mode with full rqt
515#define HHI_RQT_INTRA_SPEEDUP_MOD         0           ///< tests two best modes with full rqt
516
517#if HHI_RQT_INTRA_SPEEDUP_MOD && !HHI_RQT_INTRA_SPEEDUP
518#error
519#endif
520
521#define VERBOSE_RATE 0 ///< Print additional rate information in encoder
522
523#define AMVP_DECIMATION_FACTOR            4
524
525#define SCAN_SET_SIZE                     16
526#define LOG2_SCAN_SET_SIZE                4
527
528#define FAST_UDI_MAX_RDMODE_NUM               35          ///< maximum number of RD comparison in fast-UDI estimation loop
529
530#define ZERO_MVD_EST                          0           ///< Zero Mvd Estimation in normal mode
531
532#define NUM_INTRA_MODE 36
533#if !REMOVE_LM_CHROMA
534#define LM_CHROMA_IDX  35
535#endif
536
537#define WRITE_BACK                      1           ///< Enable/disable the encoder to replace the deltaPOC and Used by current from the config file with the values derived by the refIdc parameter.
538#define AUTO_INTER_RPS                  1           ///< Enable/disable the automatic generation of refIdc from the deltaPOC and Used by current from the config file.
539#define PRINT_RPS_INFO                  0           ///< Enable/disable the printing of bits used to send the RPS.
540                                                    // using one nearest frame as reference frame, and the other frames are high quality (POC%4==0) frames (1+X)
541                                                    // this should be done with encoder only decision
542                                                    // but because of the absence of reference frame management, the related code was hard coded currently
543
544#define RVM_VCEGAM10_M 4
545
546#define PLANAR_IDX             0
547#define VER_IDX                26                    // index for intra VERTICAL   mode
548#define HOR_IDX                10                    // index for intra HORIZONTAL mode
549#define DC_IDX                 1                     // index for intra DC mode
550#define NUM_CHROMA_MODE        5                     // total number of chroma modes
551#define DM_CHROMA_IDX          36                    // chroma mode index for derived from luma intra mode
552
553
554#define FAST_UDI_USE_MPM 1
555
556#define RDO_WITHOUT_DQP_BITS              0           ///< Disable counting dQP bits in RDO-based mode decision
557
558#define FULL_NBIT 0 ///< When enabled, compute costs using full sample bitdepth.  When disabled, compute costs as if it is 8-bit source video.
559#if FULL_NBIT
560# define DISTORTION_PRECISION_ADJUSTMENT(x) 0
561#else
562# define DISTORTION_PRECISION_ADJUSTMENT(x) (x)
563#endif
564
565#define LOG2_MAX_NUM_COLUMNS_MINUS1        7
566#define LOG2_MAX_NUM_ROWS_MINUS1           7
567#define LOG2_MAX_COLUMN_WIDTH              13
568#define LOG2_MAX_ROW_HEIGHT                13
569
570#define MATRIX_MULT                             0   // Brute force matrix multiplication instead of partial butterfly
571
572#define REG_DCT 65535
573
574#define AMP_SAD                               1           ///< dedicated SAD functions for AMP
575#define AMP_ENC_SPEEDUP                       1           ///< encoder only speed-up by AMP mode skipping
576#if AMP_ENC_SPEEDUP
577#define AMP_MRG                               1           ///< encoder only force merge for AMP partition (no motion search for AMP)
578#endif
579
580#define CABAC_INIT_PRESENT_FLAG     1
581
582// ====================================================================================================================
583// Basic type redefinition
584// ====================================================================================================================
585
586typedef       void                Void;
587typedef       bool                Bool;
588
589#ifdef __arm__
590typedef       signed char         Char;
591#else
592typedef       char                Char;
593#endif
594typedef       unsigned char       UChar;
595typedef       short               Short;
596typedef       unsigned short      UShort;
597typedef       int                 Int;
598typedef       unsigned int        UInt;
599typedef       double              Double;
600typedef       float               Float;
601
602// ====================================================================================================================
603// 64-bit integer type
604// ====================================================================================================================
605
606#ifdef _MSC_VER
607typedef       __int64             Int64;
608
609#if _MSC_VER <= 1200 // MS VC6
610typedef       __int64             UInt64;   // MS VC6 does not support unsigned __int64 to double conversion
611#else
612typedef       unsigned __int64    UInt64;
613#endif
614
615#else
616
617typedef       long long           Int64;
618typedef       unsigned long long  UInt64;
619
620#endif
621
622// ====================================================================================================================
623// Type definition
624// ====================================================================================================================
625
626typedef       UChar           Pxl;        ///< 8-bit pixel type
627typedef       Short           Pel;        ///< 16-bit pixel type
628typedef       Int             TCoeff;     ///< transform coefficient
629
630#if H_3D_VSO
631// ====================================================================================================================
632// Define Distortion Types
633// ====================================================================================================================
634typedef       Int64           RMDist;     ///< renderer model distortion
635
636#if H_3D_VSO_DIST_INT
637typedef       Int64            Dist;       ///< RDO distortion
638typedef       Int64            Dist64; 
639#define       RDO_DIST_MIN     MIN_INT
640#define       RDO_DIST_MAX     MAX_INT
641#else
642typedef       UInt             Dist;       ///< RDO distortion
643typedef       UInt64           Dist; 
644#define       RDO_DIST_MIN     0
645#define       RDO_DIST_MAX     MAX_UINT
646#endif
647#endif
648/// parameters for adaptive loop filter
649class TComPicSym;
650
651// Slice / Slice segment encoding modes
652enum SliceConstraint
653{
654  NO_SLICES              = 0,          ///< don't use slices / slice segments
655  FIXED_NUMBER_OF_LCU    = 1,          ///< Limit maximum number of largest coding tree blocks in a slice / slice segments
656  FIXED_NUMBER_OF_BYTES  = 2,          ///< Limit maximum number of bytes in a slice / slice segment
657  FIXED_NUMBER_OF_TILES  = 3,          ///< slices / slice segments span an integer number of tiles
658};
659
660enum SAOComponentIdx
661{
662  SAO_Y =0,
663  SAO_Cb,
664  SAO_Cr,
665  NUM_SAO_COMPONENTS
666};
667
668enum SAOMode //mode
669{
670  SAO_MODE_OFF = 0,
671  SAO_MODE_NEW,
672  SAO_MODE_MERGE,
673  NUM_SAO_MODES
674};
675
676enum SAOModeMergeTypes
677{
678  SAO_MERGE_LEFT =0,
679  SAO_MERGE_ABOVE,
680  NUM_SAO_MERGE_TYPES
681};
682
683
684enum SAOModeNewTypes
685{
686  SAO_TYPE_START_EO =0,
687  SAO_TYPE_EO_0 = SAO_TYPE_START_EO,
688  SAO_TYPE_EO_90,
689  SAO_TYPE_EO_135,
690  SAO_TYPE_EO_45,
691
692  SAO_TYPE_START_BO,
693  SAO_TYPE_BO = SAO_TYPE_START_BO,
694
695  NUM_SAO_NEW_TYPES
696};
697#define NUM_SAO_EO_TYPES_LOG2 2
698
699enum SAOEOClasses
700{
701  SAO_CLASS_EO_FULL_VALLEY = 0,
702  SAO_CLASS_EO_HALF_VALLEY = 1,
703  SAO_CLASS_EO_PLAIN       = 2,
704  SAO_CLASS_EO_HALF_PEAK   = 3,
705  SAO_CLASS_EO_FULL_PEAK   = 4,
706  NUM_SAO_EO_CLASSES,
707};
708
709
710#define NUM_SAO_BO_CLASSES_LOG2  5
711enum SAOBOClasses
712{
713  //SAO_CLASS_BO_BAND0 = 0,
714  //SAO_CLASS_BO_BAND1,
715  //SAO_CLASS_BO_BAND2,
716  //...
717  //SAO_CLASS_BO_BAND31,
718
719  NUM_SAO_BO_CLASSES = (1<<NUM_SAO_BO_CLASSES_LOG2),
720};
721#define MAX_NUM_SAO_CLASSES  32  //(NUM_SAO_EO_GROUPS > NUM_SAO_BO_GROUPS)?NUM_SAO_EO_GROUPS:NUM_SAO_BO_GROUPS
722
723struct SAOOffset
724{
725  Int modeIdc; //NEW, MERGE, OFF
726  Int typeIdc; //NEW: EO_0, EO_90, EO_135, EO_45, BO. MERGE: left, above
727  Int typeAuxInfo; //BO: starting band index
728  Int offset[MAX_NUM_SAO_CLASSES];
729
730  SAOOffset();
731  ~SAOOffset();
732  Void reset();
733
734  const SAOOffset& operator= (const SAOOffset& src);
735};
736
737struct SAOBlkParam
738{
739
740  SAOBlkParam();
741  ~SAOBlkParam();
742  Void reset();
743  const SAOBlkParam& operator= (const SAOBlkParam& src);
744  SAOOffset& operator[](Int compIdx){ return offsetParam[compIdx];}
745private:
746  SAOOffset offsetParam[NUM_SAO_COMPONENTS];
747
748};
749
750/// parameters for deblocking filter
751typedef struct _LFCUParam
752{
753  Bool bInternalEdge;                     ///< indicates internal edge
754  Bool bLeftEdge;                         ///< indicates left edge
755  Bool bTopEdge;                          ///< indicates top edge
756} LFCUParam;
757
758// ====================================================================================================================
759// Enumeration
760// ====================================================================================================================
761
762/// supported slice type
763enum SliceType
764{
765  B_SLICE,
766  P_SLICE,
767  I_SLICE
768};
769
770/// chroma formats (according to semantics of chroma_format_idc)
771enum ChromaFormat
772{
773  CHROMA_400  = 0,
774  CHROMA_420  = 1,
775  CHROMA_422  = 2,
776  CHROMA_444  = 3
777};
778
779/// supported partition shape
780enum PartSize
781{
782  SIZE_2Nx2N,           ///< symmetric motion partition,  2Nx2N
783  SIZE_2NxN,            ///< symmetric motion partition,  2Nx N
784  SIZE_Nx2N,            ///< symmetric motion partition,   Nx2N
785  SIZE_NxN,             ///< symmetric motion partition,   Nx N
786  SIZE_2NxnU,           ///< asymmetric motion partition, 2Nx( N/2) + 2Nx(3N/2)
787  SIZE_2NxnD,           ///< asymmetric motion partition, 2Nx(3N/2) + 2Nx( N/2)
788  SIZE_nLx2N,           ///< asymmetric motion partition, ( N/2)x2N + (3N/2)x2N
789  SIZE_nRx2N,           ///< asymmetric motion partition, (3N/2)x2N + ( N/2)x2N
790  SIZE_NONE = 15
791};
792
793/// supported prediction type
794enum PredMode
795{
796  MODE_INTER,           ///< inter-prediction mode
797  MODE_INTRA,           ///< intra-prediction mode
798  MODE_NONE = 15
799};
800
801/// texture component type
802enum TextType
803{
804  TEXT_LUMA,            ///< luma
805  TEXT_CHROMA,          ///< chroma (U+V)
806  TEXT_CHROMA_U,        ///< chroma U
807  TEXT_CHROMA_V,        ///< chroma V
808  TEXT_ALL,             ///< Y+U+V
809  TEXT_NONE = 15
810};
811
812/// reference list index
813enum RefPicList
814{
815  REF_PIC_LIST_0 = 0,   ///< reference list 0
816  REF_PIC_LIST_1 = 1,   ///< reference list 1
817  REF_PIC_LIST_X = 100  ///< special mark
818};
819
820/// distortion function index
821enum DFunc
822{
823  DF_DEFAULT  = 0,
824  DF_SSE      = 1,      ///< general size SSE
825  DF_SSE4     = 2,      ///<   4xM SSE
826  DF_SSE8     = 3,      ///<   8xM SSE
827  DF_SSE16    = 4,      ///<  16xM SSE
828  DF_SSE32    = 5,      ///<  32xM SSE
829  DF_SSE64    = 6,      ///<  64xM SSE
830  DF_SSE16N   = 7,      ///< 16NxM SSE
831 
832  DF_SAD      = 8,      ///< general size SAD
833  DF_SAD4     = 9,      ///<   4xM SAD
834  DF_SAD8     = 10,     ///<   8xM SAD
835  DF_SAD16    = 11,     ///<  16xM SAD
836  DF_SAD32    = 12,     ///<  32xM SAD
837  DF_SAD64    = 13,     ///<  64xM SAD
838  DF_SAD16N   = 14,     ///< 16NxM SAD
839 
840  DF_SADS     = 15,     ///< general size SAD with step
841  DF_SADS4    = 16,     ///<   4xM SAD with step
842  DF_SADS8    = 17,     ///<   8xM SAD with step
843  DF_SADS16   = 18,     ///<  16xM SAD with step
844  DF_SADS32   = 19,     ///<  32xM SAD with step
845  DF_SADS64   = 20,     ///<  64xM SAD with step
846  DF_SADS16N  = 21,     ///< 16NxM SAD with step
847 
848  DF_HADS     = 22,     ///< general size Hadamard with step
849  DF_HADS4    = 23,     ///<   4xM HAD with step
850  DF_HADS8    = 24,     ///<   8xM HAD with step
851  DF_HADS16   = 25,     ///<  16xM HAD with step
852  DF_HADS32   = 26,     ///<  32xM HAD with step
853  DF_HADS64   = 27,     ///<  64xM HAD with step
854  DF_HADS16N  = 28,     ///< 16NxM HAD with step
855#if H_3D_VSO
856  DF_VSD      = 29,      ///< general size VSD
857  DF_VSD4     = 30,      ///<   4xM VSD
858  DF_VSD8     = 31,      ///<   8xM VSD
859  DF_VSD16    = 32,      ///<  16xM VSD
860  DF_VSD32    = 33,      ///<  32xM VSD
861  DF_VSD64    = 34,      ///<  64xM VSD
862  DF_VSD16N   = 35,      ///< 16NxM VSD
863#endif
864
865#if AMP_SAD
866  DF_SAD12    = 43,
867  DF_SAD24    = 44,
868  DF_SAD48    = 45,
869
870  DF_SADS12   = 46,
871  DF_SADS24   = 47,
872  DF_SADS48   = 48,
873
874  DF_SSE_FRAME = 50     ///< Frame-based SSE
875#else
876  DF_SSE_FRAME = 33     ///< Frame-based SSE
877#endif
878};
879
880/// index for SBAC based RD optimization
881enum CI_IDX
882{
883  CI_CURR_BEST = 0,     ///< best mode index
884  CI_NEXT_BEST,         ///< next best index
885  CI_TEMP_BEST,         ///< temporal index
886  CI_CHROMA_INTRA,      ///< chroma intra index
887  CI_QT_TRAFO_TEST,
888  CI_QT_TRAFO_ROOT,
889  CI_NUM,               ///< total number
890};
891
892/// motion vector predictor direction used in AMVP
893enum MVP_DIR
894{
895  MD_LEFT = 0,          ///< MVP of left block
896  MD_ABOVE,             ///< MVP of above block
897  MD_ABOVE_RIGHT,       ///< MVP of above right block
898  MD_BELOW_LEFT,        ///< MVP of below left block
899  MD_ABOVE_LEFT         ///< MVP of above left block
900};
901
902/// merging candidates
903#if H_3D
904enum DefaultMergCandOrder
905{
906  MRG_T = 0,            ///< MPI
907  MRG_D,                ///< DDD
908  MRG_IVMC,             ///< Temporal inter-view
909  MRG_A1,               ///< Left
910  MRG_B1,               ///< Above
911  MRG_B0,               ///< Above right
912  MRG_IVDC,             ///< Disparity inter-view
913  MRG_VSP,              ///< VSP
914  MRG_A0,               ///< Left bottom
915  MRG_B2,               ///< Above left
916  MRG_IVSHIFT,          ///< Shifted IVMC of Shifted IVDC. (These are mutually exclusive)
917  MRG_COL               ///< Temporal co-located
918};
919#endif
920
921/// coefficient scanning type used in ACS
922enum COEFF_SCAN_TYPE
923{
924  SCAN_DIAG = 0,         ///< up-right diagonal scan
925  SCAN_HOR,              ///< horizontal first scan
926  SCAN_VER               ///< vertical first scan
927};
928
929namespace Profile
930{
931  enum Name
932  {
933    NONE = 0,
934    MAIN = 1,
935    MAIN10 = 2,
936    MAINSTILLPICTURE = 3,
937#if H_MV
938    MULTIVIEWMAIN = 6,
939#if H_3D
940    MAIN3D = 8, 
941#endif
942#endif
943  };
944}
945
946namespace Level
947{
948  enum Tier
949  {
950    MAIN = 0,
951    HIGH = 1,
952  };
953
954  enum Name
955  {
956    NONE     = 0,
957    LEVEL1   = 30,
958    LEVEL2   = 60,
959    LEVEL2_1 = 63,
960    LEVEL3   = 90,
961    LEVEL3_1 = 93,
962    LEVEL4   = 120,
963    LEVEL4_1 = 123,
964    LEVEL5   = 150,
965    LEVEL5_1 = 153,
966    LEVEL5_2 = 156,
967    LEVEL6   = 180,
968    LEVEL6_1 = 183,
969    LEVEL6_2 = 186,
970  };
971}
972//! \}
973
974#if H_MV
975
976/// scalability types
977  enum ScalabilityType
978  {
979#if H_3D
980    DEPTH_ID = 0,   
981#endif   
982    VIEW_ORDER_INDEX  = 1,
983    DEPENDENCY_ID = 2,
984    AUX_ID = 3,
985  };
986#endif
987#if H_3D
988  // Renderer
989  enum BlenMod
990  {
991    BLEND_NONE  = -1,
992    BLEND_AVRG  = 0,
993    BLEND_LEFT  = 1,
994    BLEND_RIGHT = 2,
995    BLEND_GEN   =  3
996  };
997
998 
999  enum
1000  {
1001    VIEWPOS_INVALID = -1,
1002    VIEWPOS_LEFT    = 0,
1003    VIEWPOS_RIGHT   = 1,
1004    VIEWPOS_MERGED  = 2
1005  };
1006
1007#define Log2( n ) ( log((double)n) / log(2.0) ) // Ed.(GT): This is very very bad and should be fixed to used integer arithmetics ( see gCeilLog2 ) moreover it should not be defined in the tool macro section!
1008#endif
1009#endif
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