source: 3DVCSoftware/branches/HTM-12.1-dev0/source/Lib/TLibCommon/TypeDef.h @ 1074

Last change on this file since 1074 was 1074, checked in by tech, 10 years ago

Removed 3D-HEVC related macros.

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33
34/** \file     TypeDef.h
35    \brief    Define basic types, new types and enumerations
36*/
37
38#ifndef _TYPEDEF__
39#define _TYPEDEF__
40
41//! \ingroup TLibCommon
42//! \{
43/////////////////////////////////////////////////////////////////////////////////////////
44///////////////////////////////// EXTENSION SELECTION /////////////////////////////////// 
45/////////////////////////////////////////////////////////////////////////////////////////
46
47/* HEVC_EXT might be defined by compiler/makefile options.
48   
49   Linux makefiles support the following settings:   
50   make             -> HEVC_EXT not defined   
51   make HEVC_EXT=0  -> H_MV=0 H_3D=0   --> plain HM
52   make HEVC_EXT=1  -> H_MV=1 H_3D=0   --> MV only
53   make HEVC_EXT=2  -> H_MV=1 H_3D=1   --> full 3D
54*/
55
56#ifndef HEVC_EXT
57#define HEVC_EXT                    2
58#endif
59
60#if ( HEVC_EXT < 0 )||( HEVC_EXT > 2 )
61#error HEVC_EXT must be in the range of 0 to 2, inclusive.
62#endif
63
64#define H_MV          ( HEVC_EXT != 0)
65#define H_3D          ( HEVC_EXT == 2)
66
67#define NTT_BUG_FIX_TK54    1
68#define BUG_FIX_TK65        1
69
70#define MTK_I0093           1
71/////////////////////////////////////////////////////////////////////////////////////////
72///////////////////////////////////   MAJOR DEFINES   /////////////////////////////////// 
73/////////////////////////////////////////////////////////////////////////////////////////
74
75#if H_MV
76#define H_MV_ENC_DEC_TRAC                 1  //< CU/PU level tracking
77#endif
78
79#if H_3D
80#define H_3D_QTLPC                        1   // OL_QTLIMIT_PREDCODING_B0068 //JCT3V-B0068
81                                              // HHI_QTLPC_RAU_OFF_C0160 JCT3V-C0160 change 2: quadtree limitation and predictive coding switched off in random access units
82                                              // MTK_TEX_DEP_PAR_G0055 Texture-partition-dependent depth partition. JCT3V-G0055
83
84#define H_3D_VSO                          1   // VSO, View synthesis optimization, includes:
85                                              // HHI_VSO
86                                              // HHI_VSO_LS_TABLE_M23714 enable table base Lagrange multiplier optimization
87                                              // SAIT_VSO_EST_A0033, JCT3V-A0033 modification 3
88                                              // LGE_WVSO_A0119
89                                              // SCU_HS_VSD_BUGFIX_IMPROV_G0163
90#define H_3D_NBDV                         1   // Neighboring block disparity derivation
91                                              // QC_JCT3V-A0097
92                                              // LGE_DVMCP_A0126
93                                              // LGE_DVMCP_MEM_REDUCTION_B0135     
94                                              // QC_SIMPLE_NBDV_B0047
95                                              // FIX_LGE_DVMCP_B0133
96                                              // QC_NBDV_LDB_FIX_C0055
97                                              // MTK_SAIT_TEMPORAL_FIRST_ORDER_C0141_C0097
98                                              // MTK_SIMPLIFY_DVTC_C0135           
99                                              // QC_CU_NBDV_D0181
100                                              // SEC_DEFAULT_DV_D0112
101                                              // MTK_DVMCP_FIX_E0172       fix the mismatch between software and WD for DV derivation from DVMCP blocks, issue 2 in JCT3V-E0172
102                                              // SEC_SIMPLIFIED_NBDV_E0142 Simplified NBDV, JCT3V-E0142 and JCT3V-E0190
103                                              // MTK_NBDV_TN_FIX_E0172     fix the issue of DV derivation from the temporal neighboring blocks, issue 7 in JCT3V-E0172
104                                              // MTK_TEXTURE_MRGCAND_BUGFIX_E0182  Bug fix for TEXTURE MERGING CANDIDATE     , JCT3V-E0182
105
106#define H_3D_ARP                          1   // Advanced residual prediction (ARP), JCT3V-D0177
107                                              // QC_MTK_INTERVIEW_ARP_F0123_F0108 JCT3V-F0123; JCT3V-F0108
108                                              // SHARP_ARP_REF_CHECK_F0105        ARP reference picture selection and DPB check
109                                              // LGE_ARP_CTX_F0161                JCT3V-F0161
110                                              // MTK_ARP_FLAG_CABAC_SIMP_G0061 Use 2 context for ARP flag referring to only left neighbor block in JCT3V-G0061
111                                              // MTK_ARP_REF_SELECTION_G0053 ARP Reference picture selection in JCT3V-G0053
112                                              // MTK_ALIGN_SW_WD_BI_PRED_ARP_H0085  Align the SW and WD for the bi-prediction ARP PUs by disallowing non-normative fast bi-prediction for ARP PUs, JCT3V-H0085
113                                              // QC_I0051_ARP_SIMP         
114                                              // SHARP_ARP_CHROMA_I0104     
115                                              // MTK_I0072_IVARP_SCALING_FIX
116
117#define H_3D_IC                           1   // Illumination Compensation, JCT3V-B0045, JCT3V-C0046, JCT3V-D0060
118                                              // Unifying rounding offset, for IC part, JCT3V-D0135
119                                              // Full Pel Interpolation for Depth, HHI_FULL_PEL_DEPTH_MAP_MV_ACC
120                                              // SHARP_ILLUCOMP_REFINE_E0046
121                                              // MTK_CLIPPING_ALIGN_IC_E0168       // To support simplify bi-prediction PU with identical motion checking, JCT3V-E0168
122                                              // LGE_IC_CTX_F0160 //JCT3V-F0160
123                                              // SEC_ONLY_TEXTURE_IC_F0151
124                                              // MTK_IC_FLAG_CABAC_SIMP_G0061
125                                              // SEC_IC_ARP_SIG_G0072, Disabling IC when ARP is enabled, option 1 in JCT3V-G0072, part 2 in JCT3V-G0121
126                                              // MTK_LOW_LATENCY_IC_ENCODING_H0086  Low-latency IC encoding in JCT3V-H0086
127                                              // MTK_LOW_LATENCY_IC_ENCODING_H0086_FIX  1  // Remove the global variables used in JCT3V-H0086
128                                              // SEC_IC_NEIGHBOR_CLIP_I0080    // Clipping of neighboring sample position, JCT3V-I0080
129
130#if H_3D_NBDV
131#define H_3D_NBDV_REF                     1   // Depth oriented neighboring block disparity derivation
132                                              // MTK_D0156
133                                              // MERL_D0166: Reference view selection in NBDV & Bi-VSP
134                                              // MERL_C0152: Basic VSP
135                                              // NBDV_DEFAULT_VIEWIDX_BUGFIX Bug fix for invalid default view index for NBDV
136                                              // NTT_DoNBDV_VECTOR_CLIP_E0141 disparity vector clipping in DoNBDV, JCT3V-E0141 and JCT3V-E0209
137                                              // SEC_VER_DONBDV_H0103          Vertical DV Restriction for DoNBDV
138#endif
139
140#define H_3D_VSP                          1   // View synthesis prediction
141                                              // MERL_C0152: Basic VSP
142                                              // MERL_D0166: Reference view selection in NBDV & Bi-VSP
143                                              // MTK_D0105, LG_D0139: No VSP for depth
144                                              // QC_D0191: Clean up
145                                              // LG_D0092: Multiple VSP candidate allowed
146                                              // MTK_VSP_FIX_ALIGN_WD_E0172
147                                              // NTT_VSP_ADAPTIVE_SPLIT_E0207 adaptive sub-PU partitioning in VSP, JCT3V-E0207
148                                              // NTT_VSP_DC_BUGFIX_E0208 bugfix for sub-PU based DC in VSP, JCT3V-E0208
149                                              // NTT_VSP_COMMON_E0207_E0208 common part of JCT3V-E0207 and JCT3V-E0208
150                                              // MTK_F0109_LG_F0120_VSP_BLOCK MTK_LG_SIMPLIFY_VSP_BLOCK_PARTITION_F0109_F0120 
151                                              // SHARP_VSP_BLOCK_IN_AMP_F0102 VSP partitioning for AMP
152                                              // MTK_VSP_SIMPLIFICATION_F0111 1. Inherited VSP also use NBDV of current CU, 2. VSP cannot be inherited from above LCU rowss
153                                              // LGE_SHARP_VSP_INHERIT_F0104
154                                              // NTT_STORE_SPDV_VSP_G0148 Storing Sub-PU based DV for VSP
155                                              // Restricted bi-prediction for VSP
156
157#define H_3D_IV_MERGE                     1   // Inter-view motion merge candidate
158                                              // HHI_INTER_VIEW_MOTION_PRED
159                                              // SAIT_IMPROV_MOTION_PRED_M24829, improved inter-view motion vector prediction
160                                              // QC_MRG_CANS_B0048             , JCT3V-B0048, B0086, B0069
161                                              // OL_DISMV_POS_B0069            , different pos for disparity MV candidate, B0069
162                                              // MTK_INTERVIEW_MERGE_A0049     , second part
163                                              // QC_AMVP_MRG_UNIFY_IVCAN_C0051     
164                                              // TEXTURE MERGING CANDIDATE     , JCT3V-C0137
165                                              // QC_INRIA_MTK_MRG_E0126
166                                              // ETRIKHU_MERGE_REUSE_F0093 QC_DEPTH_IV_MRG_F0125, JCT3V-F0125: Depth oriented Inter-view MV candidate
167                                              // EC_MPI_ENABLING_MERGE_F0150, MPI flag in VPS and enabling in Merge mode
168                                              // MTK_NBDV_IVREF_FIX_G0067      , Disable IvMC, VSP when IVREF is not available, JCT3V-G0067
169                                              // SEC_DEPTH_DV_DERIVAITON_G0074, Simplification of DV derivation for depth, JCT3V-G0074
170                                              // QC_DEPTH_MERGE_SIMP_G0127 Remove DV candidate and shifting candidate for depth coding
171                                              // QC_IV_PRED_CONSTRAINT_H0137   Constraint on inter-view (motion) prediction tools
172                                              // ETRIKHU_BUGFIX_H0083          bug-fix for DV candidate pruning
173                                              // ETRIKHU_CLEANUP_H0083         cleaned-up source code for constructing merging candidate list
174                                              // ETRIKHU_CLEANUP_H0083_MISSING missing guard macros added by GT
175                                              // SHARP_SIMPLE_MERGE_H0062      Restrict 3D-HEVC merge cand in small PUs
176                                              // MTK_DIS_SPBIP8X4_H0205        Disable bi-prediction for 8x4 and 4x8 sub PU and remove the SPIVMP 2Nx2N restriction
177                                              // SEC_ADAPT_DISABLE_IVMP        Disabling IVMP merge candidates when IC is enabled, JCT3V-H0070
178                                              // SEC_SIMP_SHIFTED_DV_I0086     Simplification of Shifted DV candidate, JCT3V-I0086
179
180
181
182#define H_3D_TMVP                         1   // QC_TMVP_C0047
183                                              // Sony_M23639
184
185#define H_3D_DIM                          1   // DIM, Depth intra modes, includes:
186                                              // HHI_DMM_WEDGE_INTRA
187                                              // HHI_DMM_PRED_TEX
188                                              // FIX_WEDGE_NOFLOAT_D0036
189                                              // LGE_EDGE_INTRA_A0070
190                                              // LGE_DMM3_SIMP_C0044
191                                              // QC_DC_PREDICTOR_D0183
192                                              // HHI_DELTADC_DLT_D0035
193                                              // PKU_QC_DEPTH_INTRA_UNI_D0195
194                                              // RWTH_SDC_DLT_B0036
195                                              // INTEL_SDC64_D0193
196                                              // RWTH_SDC_CTX_SIMPL_D0032
197                                              // LGE_CONCATENATE_D0141
198                                              // FIX_SDC_ENC_RD_WVSO_D0163
199                                              // MTK_SAMPLE_BASED_SDC_D0110
200                                              // SEC_DMM2_E0146_HHIFIX Removal of DMM2 from DMMs
201                                              // ZJU_DEPTH_INTRA_MODE_E0204 Simplified Binarization for depth_intra_mode
202                                              // KWU_SDC_SIMPLE_DC_E0117 Simplified DC calculation for SDC
203                                              // SCU_HS_DMM4_REMOVE_DIV_E0242 DMM4 Division Removal
204                                              // LGE_SDC_REMOVE_DC_E0158 Removal of DC mode from SDC
205                                              // LGE_PKU_DMM3_OVERLAP_E0159_HHIFIX 1   Removal of overlap between DMM3 and DMM1
206                                              // LGE_PRED_RES_CODING_DLT_DOMAIN_F0159 JCT3V-F0159
207                                              // HHI_DIM_PREDSAMP_FIX_F0171
208                                              // SEC_DMM3_RBC_F0147 Removal of DMM3 and RBC from DMMs
209                                              // QC_DIM_DELTADC_UNIFY_F0132 Unify delta DC coding in depth intra modes
210                                              // Unify intra SDC and inter SDC
211                                              // QC_GENERIC_SDC_G0122 Generalize SDC to all depth intra modes
212                                              // SCU_HS_DEPTH_DC_PRED_G0143
213                                              // HS_TSINGHUA_SDC_SPLIT_G0111
214                                              // QC_PKU_SDC_SPLIT_G0123 Intra SDC Split
215                                              // HS_DMM_SDC_PREDICTOR_UNIFY_H0108  Unification of DMM and SDC predictor derivation
216                                              // LGE_SIMP_DIM_NOT_PRESENT_FLAG_CODING_H0119_H0135  Use only one context for CABAC of dim_not_present_flag
217                                              // QC_SIMP_DELTADC_CODING_H0131   Simplify detaDC entropy coding
218                                              // MTK_DMM_SIMP_CODE_H0092        Remove CABAC context for DMM1 mode coding
219                                              // MTK_DELTA_DC_FLAG_ONE_CONTEXT_H0084_H0100_H0113 Use only one context for CABAC of delta_dc_flag as in JCTVC-H0084, JCTVC-H0100 and JCTVC-H0113
220                                              // MTK_SDC_FLAG_FIX_H0095                          Remove conditional check of PCM flag based on SDC flag, JCTVC-H0095
221                                              // SEC_NO_RESI_DLT_H0105   
222                                              // MTK_DLT_CODING_FIX_H0091
223                                              // HS_DMM_SIGNALLING_I0120
224                                              // SHARP_DMM1_I0110 // LUT size reduction for DMM1 proposed in JCT3V-I0110
225                                              // FAST_SDC_OFFSET_DECISION_I0084
226                                              // SEPARATE_FLAG_I0085
227                                              // H_3D_DELTA_DLT
228                                              // RWTH_DLT_CLIP_I0057               1
229
230
231
232#define H_3D_SINGLE_DEPTH                 1   // Single depth mode proposed in JCT3V-I0095
233
234
235#define H_3D_INTER_SDC                    1   // INTER SDC, Inter simplified depth coding
236                                              // LGE_INTER_SDC_E0156 Enable inter SDC for depth coding
237                                              // SEC_INTER_SDC_G0101 Improved inter SDC with multiple DC candidates
238
239#define H_3D_SPIVMP                       1   // H_3D_SPIVMP    // JCT3V-F0110: Sub-PU level inter-view motion prediction
240                                              // SEC_SPIVMP_MCP_SIZE_G0077, Apply SPIVMP only to 2Nx2N partition, JCT3V-G0077
241                                              // QC_SPIVMP_MPI_G0119 Sub-PU level MPI merge candidate
242                                              // Simplification on Sub-PU level temporal interview motion prediction
243                                              // MPI_SUBPU_DEFAULT_MV_H0077_H0099_H0111_H0133
244
245#define H_3D_DBBP                         1   // DBBP: Depth-based Block Partitioning and Merging
246                                              // MTK_DBBP_AMP_REM_H0072   
247                                              // RWTH_DBBP_NO_SPU_H0057   
248                                              // SEC_DBBP_FILTERING_H0104
249                                              // MTK_DBBP_SIGNALING_H0094   
250                                              // H_3D_FIX_DBBP_IVMP        Fix . Enable IVMP is always disabled, when DBBP is enabled. The original intention is to disable Sub-PU IVMP when DBBP is enabled, not to disable IVMP itself.
251                                              // SEC_DBBP_EXPLICIT_SIG_I0077       1   // Remove the partition derivation and signal dbbp_flag only when the partition mode is 2NxN/Nx2N, JCT3V-I0077
252                                              // Disallow DBBP in 8x8 CU, JCT3V-I0078
253                                              // SHARP_DBBP_SIMPLE_FLTER_I0109     1   // Simple condition and one dimensional filter for DBBP
254                                              // SEC_DBBP_DMM4_THRESHOLD_I0076     Simplification of threshold derivation for DBBP and DMM4, JCT3V-I0076
255
256
257#define H_3D_DDD                          1   // Disparity derived depth coding
258
259#define H_3D_FCO                          0   // Flexible coding order for 3D
260#if H_3D_FCO
261#define H_3D_FCO                     1
262#endif
263
264#define H_3D_FAST_INTRA_SDC               1   // I0123
265
266// OTHERS
267                                              // MTK_SONY_PROGRESSIVE_MV_COMPRESSION_E0170 // Progressive MV Compression, JCT3V-E0170
268#define H_3D_REN_MAX_DEV_OUT              0   // Output maximal possible shift deviation
269#define H_3D_FAST_TEXTURE_ENCODING        1   // Fast merge mode decision and early CU determination for texture component of dependent view, JCT3V-E0173
270                                              // MTK_FAST_TEXTURE_ENCODING_E0173
271#if H_3D_DIM
272#define H_3D_FAST_DEPTH_INTRA             1   // Fast DMM and RBC Mode Selection
273                                              // SCU_HS_FAST_DEPTH_INTRA_E0238_HHIFIX
274#endif
275
276// Rate Control
277#define KWU_FIX_URQ                       1
278#define KWU_RC_VIEWRC_E0227               0  ///< JCT3V-E0227, view-wise target bitrate allocation
279#define KWU_RC_MADPRED_E0227              0  ///< JCT3V-E0227, inter-view MAD prediction
280#endif // H_3D
281
282
283
284/////////////////////////////////////////////////////////////////////////////////////////
285///////////////////////////////////   DERIVED DEFINES /////////////////////////////////// 
286/////////////////////////////////////////////////////////////////////////////////////////
287
288// Fixes
289
290///// ***** SINGLE DEPTH MODE *********
291#if H_3D_SINGLE_DEPTH
292#define SINGLE_DEPTH_MODE_CAND_LIST_SIZE            2 // size of the sample candidate list
293#endif
294
295///// ***** VIEW SYNTHESIS OPTIMIZAION *********
296#if H_3D_VSO                                 
297#define H_3D_VSO_DIST_INT                 1   // Allow negative synthesized view distortion change
298#define H_3D_VSO_COLOR_PLANES             1   // Compute VSO distortion on color planes
299#define H_3D_VSO_EARLY_SKIP               1   // LGE_VSO_EARLY_SKIP_A0093, A0093 modification 4
300#define H_3D_VSO_RM_ASSERTIONS            0   // Output VSO assertions
301#define H_3D_VSO_SYNTH_DIST_OUT           0   // Output of synthesized view distortion instead of depth distortion in encoder output
302#endif
303
304////   ****** NEIGHBOURING BLOCK-BASED DISPARITY VECTOR  *********
305#if H_3D_NBDV
306#define DVFROM_LEFT                       0
307#define DVFROM_ABOVE                      1
308#define IDV_CANDS                         2
309#endif
310
311///// ***** ADVANCED INTERVIEW RESIDUAL PREDICTION *********
312#if H_3D_ARP
313#define H_3D_ARP_WFNR                     3
314#endif
315
316///// ***** DEPTH INTRA MODES *********
317#if H_3D_DIM
318                                              // HHI_DMM4_ENC_I0066
319#define H_3D_DIM_DMM                      1   // Depth Modeling Modes
320#define H_3D_DIM_SDC                      1   // Simplified Depth Coding method
321#define H_3D_DIM_DLT                      1   // Depth Lookup Table
322
323#define H_3D_DIM_ENC                      1   // Depth Intra encoder optimizations, includes:
324                                              // HHI_DEPTH_INTRA_SEARCH_RAU_C0160
325                                              // LG_ZEROINTRADEPTHRESI_A0087
326#endif
327///// ***** VIEW SYNTHESIS PREDICTION *********
328#if H_3D_VSP
329#define H_3D_VSP_BLOCKSIZE                4   // Supported values: 1, 2, and 4
330#if H_3D_VSP_BLOCKSIZE == 1
331#define H_3D_VSP_CONSTRAINED              1   // Constrained VSP @ 1x1
332#else
333#define H_3D_VSP_CONSTRAINED              0
334#endif
335#endif
336
337
338///// ***** ILLUMATION COMPENSATION *********
339#if H_3D_IC
340#define IC_REG_COST_SHIFT                 7
341#define IC_CONST_SHIFT                    5
342#define IC_SHIFT_DIFF                     12
343#define IC_LOW_LATENCY_ENCODING_THRESHOLD 0.1 // Threshold for low-latency IC encoding in JCT3V-H0086
344#endif
345
346
347///// ***** DEPTH BASED BLOCK PARTITIONING *********
348#if H_3D_DBBP
349#define DBBP_INVALID_SHORT                (-4)
350#define DBBP_PACK_MODE               SIZE_2NxN
351#endif
352
353
354///// ***** FCO *********
355#if H_3D_FCO
356#define H_3D_FCO_VSP_DONBDV_E0163               1   // Adaptive depth reference for flexible coding order
357#else
358#define H_3D_FCO_VSP_DONBDV_E0163               0   // Adaptive depth reference for flexible coding order
359#endif
360
361#if H_3D
362#define PPS_FIX_DEPTH                           1
363#endif
364
365/////////////////////////////////////////////////////////////////////////////////
366///////////////////////////////////   MV_HEVC HLS  //////////////////////////////
367/////////////////////////////////////////////////////////////////////////////////
368// TBD: Check if integration is necessary.
369
370
371
372//Added by Qualcomm for HLS
373#define DISCARDABLE_PIC_RPS              1      ///< JCT3V-G0131: Inter-layer RPS and temporal RPS should not contain picture with discardable_flag equal to 1
374#define VPS_MISC_UPDATES                 1      ///< Misc updates:JCT3V-0240,
375#define NON_REF_NAL_TYPE_DISCARDABLE     1      ///< JCT3V-G0031: If discardable picture is a non-IRAP, it must be a non-referenced sub-layer picture
376#define INFERENCE_POC_MSB_VAL_PRESENT    1      ///< JCT3V-H0042: poc_msb_val_present_flag shall be equal to 0 when slice_header_extension_length is (inferred to be ) equal to 0
377#define INFERENCE_POC_RESET_INFO_PRESENT 1      ///< JCT3V-H0042: Infer the value of poc_reset_info_present_flag to be equal to 0 when no pps extension / pps extension for multilayer.
378#define I0044_SLICE_TMVP                 1      ///< JCT3V-I0044: Regarding slice_temporal_mvp_enabled_flag
379#define I0045_BR_PR_ADD_LAYER_SET        1      ///< JCT3V-I0045: Signalling of bit-rate and picture rate for additional layer set
380#define I0045_VPS_VUI_VST_PARAMS         1      ///< JCT3V-I0045: Related to signalling of VST parameters of the base layer.
381
382
383#define H_MV_HLS10_GEN                       0  // General changes (not tested)
384
385#define H_MV_HLS10_AUX                       1 // Auxiliary pictures
386#define H_MV_HLS10_GEN_FIX                   1
387#define H_MV_FIX_LOOP_GOPSIZE                1
388#define H_MV_FIX_SUB_LAYERS_MAX_MINUS1       1
389
390#define H_MV_HLS10_GEN_VSP_CONF_WIN          1  // VPS conformance window
391#define H_MV_HLS10_GEN_VSP_BASE_LAYER_AVAIL  1  // vps_base_layer_available
392#define H_MV_HLS10_REF_PRED_LAYERS           1  // reference and predicted layer derivation
393#define H_MV_HLS10_NESSECARY_LAYER           1  // necessary layers
394#define H_MV_HLS10_ADD_LAYERSETS             1  // additional layer sets
395#define H_MV_HLS10_DBP_SIZE                  1  // dpb size syntax structure
396#define H_MV_HLS10_MAXNUMPICS                1  // constraint on number of pictures in rps 
397#define H_MV_HLS10_PTL                       1  // profile tier level
398#define H_MV_HLS10_PTL_FIX                   1  // profile tier level fix
399#define H_MV_HLS10_PTL_INBL_FIX              1  // profile tier level fix
400#define H_MV_HLS10_PTL_INFER_FIX             1  // fix inference ptl
401#define H_MV_HLS10_MULTILAYERSPS             1  // multilayer SPS extension
402#define H_MV_HLS10_VPS_VUI                   1  // vsp vui
403#define H_MV_HLS10_VPS_VUI_BSP               1  // vsp vui bsp
404#define H_MV_HLS10_PPS                       1  // PPS modifications
405
406#define H_MV_HLS10_VPS_VUI_BSP_STORE         0  // Currently bsp vui bsp hrd parameters are not stored, some dynamic memory allocation with upper bounds is required.
407
408
409#define H_MV_HLS7_GEN                        0  // General changes (not tested)
410
411
412// POC
413// #define H_MV_HLS_7_POC_P0041_3            0 // (POC/P0041/POC reset) #3 It was remarked that we should require each non-IRAP picture that has discardable_flag equal to 1 to have NUT value indicating that it is a sub-layer non-reference picture. This was agreed. Decision: Adopt (with constraint for discardable_flag as described above)
414// #define H_MV_HLS_7_POC_P0041_FIXES        0 // (POC/P0041/Fixes) For each non-IRAP picture that has discardable_flag equal to 1 to have NUT value indicating that it is a sub-layer non-reference picture.
415// #define H_MV_HLS_7_POC_P0056_4            0 // (POC/P0056/layer tree poc) #4 Proposal 1: If the POC reset approach is adopted as the basis for multi-layer POC derivation, it is proposed to derive the POC anchor picture from the previous TID0 picture (that is not a RASL picture, a RADL picture or a sub-layer non-reference picture and not with discardable_flag equal to 1) of  the current layer or any of its reference layer. This is asserted to improve loss resilience and reduce bit rate overhead. Decision: Adopt Proposal 1 (with the suggested modifications Ewith text provided as P0297).
416
417// SEI related
418//#define H_MV_HLS_8_SEI_NODOC_53  0 // #53 (SEI    /NODOC/Added Multiview view position SEI message) Plain copy from AVC.
419//#define H_MV_HLS_8_SEI_NODOC_52  0 // #52 (SEI    /NODOC/Added Multiview acquisition information SEI) Plain copy from AVC.
420//#define H_MV_HLS_8_SEI_NODOC_51  0 // #51 (SEI    /NODOC/Added Multiview scene information SEI message)
421//#define H_MV_HLS_8_SEI_Q0189_35  0 // #35 (SEI    /Q0189/SEI message for indicating constraints on TMVP) Proposal 2.3,  SEI message for indicating constraints on TMVP
422//#define H_MV_HLS_8_EDF_Q0116_29  0 // #29 (ED.FIX /Q0116/Recovery point SEI) , consider adding a note regarding how random accessibility is affected by the recovery point SEI message
423//#define H_MV_HLS_8_GEN_Q0183_23  0 // #23 (GEN    /Q0183/SEI clean-ups) numerous small clean-ups on SEI messages.
424//#define H_MV_HLS_8_MIS_Q0247_49  0 // #49 (MISC   /Q0247/frame-field information SEI message)
425//#define H_MV_HLS_8_MIS_Q0189_34  0 // #34 (MISC   /Q0189/slice temporal mvp enabled flag) Proposal 2.2, clarification of semantics of slice temporal mvp enabled flag
426//#define H_MV_HLS_8_EDF_Q0081_01  0 // #1  (ED.FIX /Q0081/alpha channel persist) On reuse of alpha planes in auxiliary pictures. It was asked why there would not be a presumption that the alpha channel content would simply persist, without needing the flag to indicate it. Decision (Ed.): Delegated to editors to clarify, as necessary, that the alpha channel content persists until cancelled or updated in output order.
427//#define H_MV_HLS_8_SEI_Q0253_37  0 // #37 (SEI    /Q0253/layer not present), modified semantics of layers not present SEI message to correct bug introduced during editing
428//#define H_MV_HLS_8_SEI_Q0045_11  0 // #11 (SEI    /Q0045/Overlay) Proposal for an SEI message on selectable overlays. Decision: Adopt (modified for variable-length strings).
429//#define H_MV_HLS_7_SEI_P0133_28  0 // (SEI/P0133/Recovery point SEI) #28 Decision: Adopt change to recover point semantics only (-v3)
430//#define H_MV_HLS_7_SEI_P0123_25  0 // (SEI/P0123/Alpha channel info) #25 Add alpha channel information SEI message Decision: Adopt. Constrain the bit depth indicated to be equal to the coded bit depth of the aux picture.
431
432// Auxiliary picture related
433//#define H_MV_HLS_8_AUX_NODOC_40  0 // #40 (AUX    /NODOC/primary pic) Clarify that an auxiliary picture can be associated with more than one primary picture. Consider if the language associating an alpha auxiliary picture with a primary picture in the semantics of dimension_id[ ][ ] near the AuxId derivation could be moved to the alpha SEI message.
434//#define H_MV_HLS_8_AUX_Q0081_2   0 // #2  (AUX    /Q0081/primary) Decision: Remove the constraint that an alpha picture must be accompanied by a primary picture.
435//#define H_MV_HLS_8_AUX_Q0078_44  0 // #44 (AUX    /Q0078/concepts Auxiliary picture concepts:
436//#define H_MV_HLS_8_AUX_Q0078_39  0 // #39 (AUX    /Q0078/conformance): mechanism for signaling a profile/tier/level conformance point for auxiliary pictures
437
438// Profiles
439//#define H_MV_HLS_8_PRO_NODOC_50  0 // #50 (PROF   /NODOC/Monochrome) Add Monochrome 8-bit profile
440//#define H_MV_HLS_8_PRO_NODOC_31  0 // #31 (PROF   /NODOC/Profile constraint) Add a profile constraint to the Scalable Main, Scalable Main 10, and Stereo Main profiles against allowing layers with duplicate values of DependencyId (or ViewOrderIdx) when AuxId equal to 0.
441//#define H_MV_HLS_8_PRO_H0126_45  0 // #45 (PROF   /H0126/Stereo main) Phrasing used in specifying the Stereo Main profile.
442//#define H_MV_HLS_8_PRO_Q0160_33  0 // #33 (PROF   /Q0160/alt_output_flag) v2: Add constraint to stereo main profile that it must contain exactly two texture views, and add a note to state that the constraint implies a restriction that alt_output_flag equal to 0.
443
444// DPB
445//#define H_MV_HLS_8_HRD_Q0102_09  0 // #9  (HRD    /Q0102/NoOutputOfPriorPicsFlag) It was suggested that also the separate_colour_plane_flag should affect inference of NoOutputOfPriorPicsFlag. Decision (Ed.): Agreed (affects RExt text).
446//#define H_MV_HLS_8_DBP_Q0154_38  0 // #38 (DBP    /Q0154/VPS DPB) Proposal in C.5.2.1: Add in the decoding process that when a new VPS is activated, all pictures in the DPB are marked as unused for reference
447//#define H_MV_HLS_8_HRD_Q0154_10  0 // #10 (HRD    /Q0154/DPB Flushing and parameters) On picture flushing and DPB parameters Decision: Adopted (some details to be discussed further in BoG).
448//#define H_MV_HLS_7_OTHER_P0187_1 0 // (OTHER/P0187/NoOutputOfPriorPicsFlag) #1 Inference of NoOutputOfPriorPicsFlag and proposes to take into account colour format and bit depth for the inference in addition to spatial resolution
449
450// OTHERS
451//#define H_MV_HLS_8_HSB_Q0041_03  0 // #3  (HS     /Q0041/hybrid scalability) The proposed text was endorsed, with non-editorial open issues considered as follows ?// #define H_MV_HLS_7_OTHER_P0187_1          0 // (OTHER/P0187/NoOutputOfPriorPicsFlag) #1 Inference of NoOutputOfPriorPicsFlag and proposes to take into account colour format and bit depth for the inference in addition to spatial resolution
452//#define H_MV_HLS_8_MIS_Q0078_24  0 // #24 (MISC   /Q0078/scan and pic type) , Items 3 b,c and 4, clarifying which pictures in an output layer sets are applied the values of general_progressive_source_flag, general_interlaced_source_flag, general_non_packed_constraint_flag and general_frame_only_constraint_flag.
453//#define H_MV_HLS_7_HRD_P0138_6   0 //     (HRD/P0138/HRD parameters for bitstreams excluding) #6 Decision: Adopt (as revised in updated contribution, with the specification of a flag in the BP SEI (HRD/P0192/sub-DPB) #12 Establish sub-DPBs based on the representation format indicated at the VPS level. It was suggested that the expressed shared capacity limit would need to be less than or equal to the sum of the individual capacity limits. Decision: Adopt as modified. Further study is encouraged on profile/level constraint selections.
454
455/////////////////////////////////////////////////////////////////////////////////////////
456///////////////////////////////////   HM RELATED DEFINES ////////////////////////////////
457/////////////////////////////////////////////////////////////////////////////////////////
458#define HARMONIZE_GOP_FIRST_FIELD_COUPLE  1
459#define FIX_FIELD_DEPTH                 1
460#if H_MV
461#define EFFICIENT_FIELD_IRAP            0
462#else
463#define EFFICIENT_FIELD_IRAP            1
464#endif
465#define ALLOW_RECOVERY_POINT_AS_RAP     1
466#define BUGFIX_INTRAPERIOD              1
467#define SAO_ENCODE_ALLOW_USE_PREDEBLOCK 1
468
469#define SAO_SGN_FUNC 1
470
471#define FIX1172 1 ///< fix ticket #1172
472
473#define SETTING_PIC_OUTPUT_MARK     1
474#define SETTING_NO_OUT_PIC_PRIOR    1
475#define FIX_EMPTY_PAYLOAD_NAL       1
476#define FIX_WRITING_OUTPUT          1
477#define FIX_OUTPUT_EOS              1
478
479#define FIX_POC_CRA_NORASL_OUTPUT   1
480
481#define MAX_NUM_PICS_IN_SOP           1024
482
483#define MAX_NESTING_NUM_OPS         1024
484#define MAX_NESTING_NUM_LAYER       64
485
486#if H_MV_HLS10_VPS_VUI_BSP
487#define MAX_VPS_NUM_HRD_PARAMETERS                1024
488#define MAX_NUM_SUB_LAYERS                        7
489#define MAX_NUM_SIGNALLED_PARTITIONING_SCHEMES    16
490#else
491#define MAX_VPS_NUM_HRD_PARAMETERS                1
492#endif
493
494#define MAX_VPS_OP_SETS_PLUS1                     1024
495#if H_MV
496#if H_MV_HLS10_ADD_LAYERSETS
497#define MAX_VPS_NUM_ADD_LAYER_SETS                1024
498#endif
499#define MAX_VPS_NUH_LAYER_ID_PLUS1  63
500#define MAX_NUM_SCALABILITY_TYPES   16
501#define ENC_CFG_CONSOUT_SPACE       29           
502#else
503#define MAX_VPS_NUH_RESERVED_ZERO_LAYER_ID_PLUS1  1
504#endif
505
506
507#define MAX_CPB_CNT                     32  ///< Upper bound of (cpb_cnt_minus1 + 1)
508#if H_MV
509#define MAX_NUM_LAYER_IDS               63
510#define MAX_NUM_LAYERS                  63
511#define MAX_VPS_PROFILE_TIER_LEVEL      64
512#define MAX_VPS_ADD_OUTPUT_LAYER_SETS   1024
513#if H_MV_HLS10_ADD_LAYERSETS
514#define MAX_VPS_OUTPUTLAYER_SETS        ( MAX_VPS_ADD_OUTPUT_LAYER_SETS + MAX_VPS_OP_SETS_PLUS1 + MAX_VPS_OP_SETS_PLUS1 )
515#else
516#define MAX_VPS_OUTPUTLAYER_SETS        ( MAX_VPS_ADD_OUTPUT_LAYER_SETS + MAX_VPS_OP_SETS_PLUS1 )
517#endif
518#define  MAX_NUM_VIDEO_SIGNAL_INFO      16
519#define MAX_NUM_SCALED_REF_LAYERS       MAX_NUM_LAYERS-1
520#if !H_MV_HLS10_VPS_VUI_BSP
521#define MAX_NUM_BSP_HRD_PARAMETERS      100 ///< Maximum value is actually not specified
522#define MAX_NUM_BITSTREAM_PARTITIONS    100 ///< Maximum value is actually not specified
523#define MAX_NUM_BSP_SCHED_COMBINATION   100 ///< Maximum value is actually not specified
524#define MAX_SUB_STREAMS                 1024
525#endif
526#else
527#define MAX_NUM_LAYER_IDS                64
528#endif
529
530#define COEF_REMAIN_BIN_REDUCTION        3 ///< indicates the level at which the VLC
531                                           ///< transitions from Golomb-Rice to TU+EG(k)
532
533#define CU_DQP_TU_CMAX 5                   ///< max number bins for truncated unary
534#define CU_DQP_EG_k 0                      ///< expgolomb order
535
536#define SBH_THRESHOLD                    4  ///< I0156: value of the fixed SBH controlling threshold
537 
538#define SEQUENCE_LEVEL_LOSSLESS           0  ///< H0530: used only for sequence or frame-level lossless coding
539
540#define DISABLING_CLIP_FOR_BIPREDME         1  ///< Ticket #175
541 
542#define C1FLAG_NUMBER               8 // maximum number of largerThan1 flag coded in one chunk :  16 in HM5
543#define C2FLAG_NUMBER               1 // maximum number of largerThan2 flag coded in one chunk:  16 in HM5
544#define SAO_ENCODING_CHOICE              1  ///< I0184: picture early termination
545#if SAO_ENCODING_CHOICE
546#define SAO_ENCODING_RATE                0.75
547#define SAO_ENCODING_CHOICE_CHROMA       1 ///< J0044: picture early termination Luma and Chroma are handled separately
548#if SAO_ENCODING_CHOICE_CHROMA
549#define SAO_ENCODING_RATE_CHROMA         0.5
550#endif
551#endif
552
553#define MAX_NUM_VPS                16
554#define MAX_NUM_SPS                16
555#define MAX_NUM_PPS                64
556
557#define RDOQ_CHROMA_LAMBDA          1   ///< F386: weighting of chroma for RDOQ
558
559#define MIN_SCAN_POS_CROSS          4
560
561#define FAST_BIT_EST                1   ///< G763: Table-based bit estimation for CABAC
562
563#define MLS_GRP_NUM                         64     ///< G644 : Max number of coefficient groups, max(16, 64)
564#define MLS_CG_SIZE                         4      ///< G644 : Coefficient group size of 4x4
565
566#define ADAPTIVE_QP_SELECTION               1      ///< G382: Adaptive reconstruction levels, non-normative part for adaptive QP selection
567#if ADAPTIVE_QP_SELECTION
568#define ARL_C_PRECISION                     7      ///< G382: 7-bit arithmetic precision
569#define LEVEL_RANGE                         30     ///< G382: max coefficient level in statistics collection
570#endif
571
572#define HHI_RQT_INTRA_SPEEDUP             1           ///< tests one best mode with full rqt
573#define HHI_RQT_INTRA_SPEEDUP_MOD         0           ///< tests two best modes with full rqt
574
575#if HHI_RQT_INTRA_SPEEDUP_MOD && !HHI_RQT_INTRA_SPEEDUP
576#error
577#endif
578
579#define VERBOSE_RATE 0 ///< Print additional rate information in encoder
580
581#define AMVP_DECIMATION_FACTOR            4
582
583#define SCAN_SET_SIZE                     16
584#define LOG2_SCAN_SET_SIZE                4
585
586#define FAST_UDI_MAX_RDMODE_NUM               35          ///< maximum number of RD comparison in fast-UDI estimation loop
587
588#define ZERO_MVD_EST                          0           ///< Zero Mvd Estimation in normal mode
589
590#define NUM_INTRA_MODE 36
591#if !REMOVE_LM_CHROMA
592#define LM_CHROMA_IDX  35
593#endif
594
595#define WRITE_BACK                      1           ///< Enable/disable the encoder to replace the deltaPOC and Used by current from the config file with the values derived by the refIdc parameter.
596#define AUTO_INTER_RPS                  1           ///< Enable/disable the automatic generation of refIdc from the deltaPOC and Used by current from the config file.
597#define PRINT_RPS_INFO                  0           ///< Enable/disable the printing of bits used to send the RPS.
598                                                    // using one nearest frame as reference frame, and the other frames are high quality (POC%4==0) frames (1+X)
599                                                    // this should be done with encoder only decision
600                                                    // but because of the absence of reference frame management, the related code was hard coded currently
601
602#define RVM_VCEGAM10_M 4
603
604#define PLANAR_IDX             0
605#define VER_IDX                26                    // index for intra VERTICAL   mode
606#define HOR_IDX                10                    // index for intra HORIZONTAL mode
607#define DC_IDX                 1                     // index for intra DC mode
608#define NUM_CHROMA_MODE        5                     // total number of chroma modes
609#define DM_CHROMA_IDX          36                    // chroma mode index for derived from luma intra mode
610
611
612#define FAST_UDI_USE_MPM 1
613
614#define RDO_WITHOUT_DQP_BITS              0           ///< Disable counting dQP bits in RDO-based mode decision
615
616#define FULL_NBIT 0 ///< When enabled, compute costs using full sample bitdepth.  When disabled, compute costs as if it is 8-bit source video.
617#if FULL_NBIT
618# define DISTORTION_PRECISION_ADJUSTMENT(x) 0
619#else
620# define DISTORTION_PRECISION_ADJUSTMENT(x) (x)
621#endif
622
623#define LOG2_MAX_NUM_COLUMNS_MINUS1        7
624#define LOG2_MAX_NUM_ROWS_MINUS1           7
625#define LOG2_MAX_COLUMN_WIDTH              13
626#define LOG2_MAX_ROW_HEIGHT                13
627
628#define MATRIX_MULT                             0   // Brute force matrix multiplication instead of partial butterfly
629
630#define REG_DCT 65535
631
632#define AMP_SAD                               1           ///< dedicated SAD functions for AMP
633#define AMP_ENC_SPEEDUP                       1           ///< encoder only speed-up by AMP mode skipping
634#if AMP_ENC_SPEEDUP
635#define AMP_MRG                               1           ///< encoder only force merge for AMP partition (no motion search for AMP)
636#endif
637
638#define CABAC_INIT_PRESENT_FLAG     1
639
640// ====================================================================================================================
641// Basic type redefinition
642// ====================================================================================================================
643
644typedef       void                Void;
645typedef       bool                Bool;
646
647#ifdef __arm__
648typedef       signed char         Char;
649#else
650typedef       char                Char;
651#endif
652typedef       unsigned char       UChar;
653typedef       short               Short;
654typedef       unsigned short      UShort;
655typedef       int                 Int;
656typedef       unsigned int        UInt;
657typedef       double              Double;
658typedef       float               Float;
659
660// ====================================================================================================================
661// 64-bit integer type
662// ====================================================================================================================
663
664#ifdef _MSC_VER
665typedef       __int64             Int64;
666
667#if _MSC_VER <= 1200 // MS VC6
668typedef       __int64             UInt64;   // MS VC6 does not support unsigned __int64 to double conversion
669#else
670typedef       unsigned __int64    UInt64;
671#endif
672
673#else
674
675typedef       long long           Int64;
676typedef       unsigned long long  UInt64;
677
678#endif
679
680// ====================================================================================================================
681// Type definition
682// ====================================================================================================================
683
684typedef       UChar           Pxl;        ///< 8-bit pixel type
685typedef       Short           Pel;        ///< 16-bit pixel type
686typedef       Int             TCoeff;     ///< transform coefficient
687
688#if H_3D_VSO
689// ====================================================================================================================
690// Define Distortion Types
691// ====================================================================================================================
692typedef       Int64           RMDist;     ///< renderer model distortion
693
694#if H_3D_VSO_DIST_INT
695typedef       Int64            Dist;       ///< RDO distortion
696typedef       Int64            Dist64; 
697#define       RDO_DIST_MIN     MIN_INT
698#define       RDO_DIST_MAX     MAX_INT
699#else
700typedef       UInt             Dist;       ///< RDO distortion
701typedef       UInt64           Dist; 
702#define       RDO_DIST_MIN     0
703#define       RDO_DIST_MAX     MAX_UINT
704#endif
705#endif
706/// parameters for adaptive loop filter
707class TComPicSym;
708
709// Slice / Slice segment encoding modes
710enum SliceConstraint
711{
712  NO_SLICES              = 0,          ///< don't use slices / slice segments
713  FIXED_NUMBER_OF_LCU    = 1,          ///< Limit maximum number of largest coding tree blocks in a slice / slice segments
714  FIXED_NUMBER_OF_BYTES  = 2,          ///< Limit maximum number of bytes in a slice / slice segment
715  FIXED_NUMBER_OF_TILES  = 3,          ///< slices / slice segments span an integer number of tiles
716};
717
718enum SAOComponentIdx
719{
720  SAO_Y =0,
721  SAO_Cb,
722  SAO_Cr,
723  NUM_SAO_COMPONENTS
724};
725
726enum SAOMode //mode
727{
728  SAO_MODE_OFF = 0,
729  SAO_MODE_NEW,
730  SAO_MODE_MERGE,
731  NUM_SAO_MODES
732};
733
734enum SAOModeMergeTypes
735{
736  SAO_MERGE_LEFT =0,
737  SAO_MERGE_ABOVE,
738  NUM_SAO_MERGE_TYPES
739};
740
741
742enum SAOModeNewTypes
743{
744  SAO_TYPE_START_EO =0,
745  SAO_TYPE_EO_0 = SAO_TYPE_START_EO,
746  SAO_TYPE_EO_90,
747  SAO_TYPE_EO_135,
748  SAO_TYPE_EO_45,
749
750  SAO_TYPE_START_BO,
751  SAO_TYPE_BO = SAO_TYPE_START_BO,
752
753  NUM_SAO_NEW_TYPES
754};
755#define NUM_SAO_EO_TYPES_LOG2 2
756
757enum SAOEOClasses
758{
759  SAO_CLASS_EO_FULL_VALLEY = 0,
760  SAO_CLASS_EO_HALF_VALLEY = 1,
761  SAO_CLASS_EO_PLAIN       = 2,
762  SAO_CLASS_EO_HALF_PEAK   = 3,
763  SAO_CLASS_EO_FULL_PEAK   = 4,
764  NUM_SAO_EO_CLASSES,
765};
766
767
768#define NUM_SAO_BO_CLASSES_LOG2  5
769enum SAOBOClasses
770{
771  //SAO_CLASS_BO_BAND0 = 0,
772  //SAO_CLASS_BO_BAND1,
773  //SAO_CLASS_BO_BAND2,
774  //...
775  //SAO_CLASS_BO_BAND31,
776
777  NUM_SAO_BO_CLASSES = (1<<NUM_SAO_BO_CLASSES_LOG2),
778};
779#define MAX_NUM_SAO_CLASSES  32  //(NUM_SAO_EO_GROUPS > NUM_SAO_BO_GROUPS)?NUM_SAO_EO_GROUPS:NUM_SAO_BO_GROUPS
780
781struct SAOOffset
782{
783  Int modeIdc; //NEW, MERGE, OFF
784  Int typeIdc; //NEW: EO_0, EO_90, EO_135, EO_45, BO. MERGE: left, above
785  Int typeAuxInfo; //BO: starting band index
786  Int offset[MAX_NUM_SAO_CLASSES];
787
788  SAOOffset();
789  ~SAOOffset();
790  Void reset();
791
792  const SAOOffset& operator= (const SAOOffset& src);
793};
794
795struct SAOBlkParam
796{
797
798  SAOBlkParam();
799  ~SAOBlkParam();
800  Void reset();
801  const SAOBlkParam& operator= (const SAOBlkParam& src);
802  SAOOffset& operator[](Int compIdx){ return offsetParam[compIdx];}
803private:
804  SAOOffset offsetParam[NUM_SAO_COMPONENTS];
805
806};
807
808/// parameters for deblocking filter
809typedef struct _LFCUParam
810{
811  Bool bInternalEdge;                     ///< indicates internal edge
812  Bool bLeftEdge;                         ///< indicates left edge
813  Bool bTopEdge;                          ///< indicates top edge
814} LFCUParam;
815
816// ====================================================================================================================
817// Enumeration
818// ====================================================================================================================
819
820/// supported slice type
821enum SliceType
822{
823  B_SLICE,
824  P_SLICE,
825  I_SLICE
826};
827
828/// chroma formats (according to semantics of chroma_format_idc)
829enum ChromaFormat
830{
831  CHROMA_400  = 0,
832  CHROMA_420  = 1,
833  CHROMA_422  = 2,
834  CHROMA_444  = 3
835};
836
837/// supported partition shape
838enum PartSize
839{
840  SIZE_2Nx2N,           ///< symmetric motion partition,  2Nx2N
841  SIZE_2NxN,            ///< symmetric motion partition,  2Nx N
842  SIZE_Nx2N,            ///< symmetric motion partition,   Nx2N
843  SIZE_NxN,             ///< symmetric motion partition,   Nx N
844  SIZE_2NxnU,           ///< asymmetric motion partition, 2Nx( N/2) + 2Nx(3N/2)
845  SIZE_2NxnD,           ///< asymmetric motion partition, 2Nx(3N/2) + 2Nx( N/2)
846  SIZE_nLx2N,           ///< asymmetric motion partition, ( N/2)x2N + (3N/2)x2N
847  SIZE_nRx2N,           ///< asymmetric motion partition, (3N/2)x2N + ( N/2)x2N
848  SIZE_NONE = 15
849};
850
851/// supported prediction type
852enum PredMode
853{
854  MODE_INTER,           ///< inter-prediction mode
855  MODE_INTRA,           ///< intra-prediction mode
856  MODE_NONE = 15
857};
858
859/// texture component type
860enum TextType
861{
862  TEXT_LUMA,            ///< luma
863  TEXT_CHROMA,          ///< chroma (U+V)
864  TEXT_CHROMA_U,        ///< chroma U
865  TEXT_CHROMA_V,        ///< chroma V
866  TEXT_ALL,             ///< Y+U+V
867  TEXT_NONE = 15
868};
869
870/// reference list index
871enum RefPicList
872{
873  REF_PIC_LIST_0 = 0,   ///< reference list 0
874  REF_PIC_LIST_1 = 1,   ///< reference list 1
875  REF_PIC_LIST_X = 100  ///< special mark
876};
877
878/// distortion function index
879enum DFunc
880{
881  DF_DEFAULT  = 0,
882  DF_SSE      = 1,      ///< general size SSE
883  DF_SSE4     = 2,      ///<   4xM SSE
884  DF_SSE8     = 3,      ///<   8xM SSE
885  DF_SSE16    = 4,      ///<  16xM SSE
886  DF_SSE32    = 5,      ///<  32xM SSE
887  DF_SSE64    = 6,      ///<  64xM SSE
888  DF_SSE16N   = 7,      ///< 16NxM SSE
889 
890  DF_SAD      = 8,      ///< general size SAD
891  DF_SAD4     = 9,      ///<   4xM SAD
892  DF_SAD8     = 10,     ///<   8xM SAD
893  DF_SAD16    = 11,     ///<  16xM SAD
894  DF_SAD32    = 12,     ///<  32xM SAD
895  DF_SAD64    = 13,     ///<  64xM SAD
896  DF_SAD16N   = 14,     ///< 16NxM SAD
897 
898  DF_SADS     = 15,     ///< general size SAD with step
899  DF_SADS4    = 16,     ///<   4xM SAD with step
900  DF_SADS8    = 17,     ///<   8xM SAD with step
901  DF_SADS16   = 18,     ///<  16xM SAD with step
902  DF_SADS32   = 19,     ///<  32xM SAD with step
903  DF_SADS64   = 20,     ///<  64xM SAD with step
904  DF_SADS16N  = 21,     ///< 16NxM SAD with step
905 
906  DF_HADS     = 22,     ///< general size Hadamard with step
907  DF_HADS4    = 23,     ///<   4xM HAD with step
908  DF_HADS8    = 24,     ///<   8xM HAD with step
909  DF_HADS16   = 25,     ///<  16xM HAD with step
910  DF_HADS32   = 26,     ///<  32xM HAD with step
911  DF_HADS64   = 27,     ///<  64xM HAD with step
912  DF_HADS16N  = 28,     ///< 16NxM HAD with step
913#if H_3D_VSO
914  DF_VSD      = 29,      ///< general size VSD
915  DF_VSD4     = 30,      ///<   4xM VSD
916  DF_VSD8     = 31,      ///<   8xM VSD
917  DF_VSD16    = 32,      ///<  16xM VSD
918  DF_VSD32    = 33,      ///<  32xM VSD
919  DF_VSD64    = 34,      ///<  64xM VSD
920  DF_VSD16N   = 35,      ///< 16NxM VSD
921#endif
922
923#if AMP_SAD
924  DF_SAD12    = 43,
925  DF_SAD24    = 44,
926  DF_SAD48    = 45,
927
928  DF_SADS12   = 46,
929  DF_SADS24   = 47,
930  DF_SADS48   = 48,
931
932  DF_SSE_FRAME = 50     ///< Frame-based SSE
933#else
934  DF_SSE_FRAME = 33     ///< Frame-based SSE
935#endif
936};
937
938/// index for SBAC based RD optimization
939enum CI_IDX
940{
941  CI_CURR_BEST = 0,     ///< best mode index
942  CI_NEXT_BEST,         ///< next best index
943  CI_TEMP_BEST,         ///< temporal index
944  CI_CHROMA_INTRA,      ///< chroma intra index
945  CI_QT_TRAFO_TEST,
946  CI_QT_TRAFO_ROOT,
947  CI_NUM,               ///< total number
948};
949
950/// motion vector predictor direction used in AMVP
951enum MVP_DIR
952{
953  MD_LEFT = 0,          ///< MVP of left block
954  MD_ABOVE,             ///< MVP of above block
955  MD_ABOVE_RIGHT,       ///< MVP of above right block
956  MD_BELOW_LEFT,        ///< MVP of below left block
957  MD_ABOVE_LEFT         ///< MVP of above left block
958};
959
960/// merging candidates
961#if H_3D
962enum DefaultMergCandOrder
963{
964  MRG_T = 0,            ///< MPI
965  MRG_D,                ///< DDD
966  MRG_IVMC,             ///< Temporal inter-view
967  MRG_A1,               ///< Left
968  MRG_B1,               ///< Above
969  MRG_B0,               ///< Above right
970  MRG_IVDC,             ///< Disparity inter-view
971  MRG_VSP,              ///< VSP
972  MRG_A0,               ///< Left bottom
973  MRG_B2,               ///< Above left
974  MRG_IVSHIFT,          ///< Shifted IVMC of Shifted IVDC. (These are mutually exclusive)
975  MRG_COL               ///< Temporal co-located
976};
977#endif
978
979/// coefficient scanning type used in ACS
980enum COEFF_SCAN_TYPE
981{
982  SCAN_DIAG = 0,         ///< up-right diagonal scan
983  SCAN_HOR,              ///< horizontal first scan
984  SCAN_VER               ///< vertical first scan
985};
986
987namespace Profile
988{
989  enum Name
990  {
991    NONE = 0,
992    MAIN = 1,
993    MAIN10 = 2,
994    MAINSTILLPICTURE = 3,
995#if H_MV
996#if H_MV_HLS10_PTL
997    MULTIVIEWMAIN = 6,
998#if H_3D
999    MAIN3D = 8, 
1000#endif
1001#else
1002    MAINSTEREO = 4,
1003    MAINMULTIVIEW = 5,
1004#if H_3D
1005    MAIN3D = 6, 
1006#endif
1007#endif
1008#endif
1009  };
1010}
1011
1012namespace Level
1013{
1014  enum Tier
1015  {
1016    MAIN = 0,
1017    HIGH = 1,
1018  };
1019
1020  enum Name
1021  {
1022    NONE     = 0,
1023    LEVEL1   = 30,
1024    LEVEL2   = 60,
1025    LEVEL2_1 = 63,
1026    LEVEL3   = 90,
1027    LEVEL3_1 = 93,
1028    LEVEL4   = 120,
1029    LEVEL4_1 = 123,
1030    LEVEL5   = 150,
1031    LEVEL5_1 = 153,
1032    LEVEL5_2 = 156,
1033    LEVEL6   = 180,
1034    LEVEL6_1 = 183,
1035    LEVEL6_2 = 186,
1036  };
1037}
1038//! \}
1039
1040#if H_MV
1041
1042/// scalability types
1043  enum ScalabilityType
1044  {
1045#if H_3D
1046    DEPTH_ID = 0,   
1047#endif   
1048    VIEW_ORDER_INDEX  = 1,
1049#if H_MV_HLS10_AUX
1050    DEPENDENCY_ID = 2,
1051    AUX_ID = 3,
1052#endif   
1053  };
1054#endif
1055#if H_3D
1056  // Renderer
1057  enum BlenMod
1058  {
1059    BLEND_NONE  = -1,
1060    BLEND_AVRG  = 0,
1061    BLEND_LEFT  = 1,
1062    BLEND_RIGHT = 2,
1063    BLEND_GEN   =  3
1064  };
1065
1066 
1067  enum
1068  {
1069    VIEWPOS_INVALID = -1,
1070    VIEWPOS_LEFT    = 0,
1071    VIEWPOS_RIGHT   = 1,
1072    VIEWPOS_MERGED  = 2
1073  };
1074
1075#define Log2( n ) ( log((double)n) / log(2.0) ) // Ed.(GT): This is very very bad and should be fixed to used integer arithmetics ( see gCeilLog2 ) moreover it should not be defined in the tool macro section!
1076#endif
1077#endif
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