source: 3DVCSoftware/branches/HTM-11.2-dev0/source/Lib/TLibCommon/TypeDef.h @ 1037

Last change on this file since 1037 was 1037, checked in by tech, 10 years ago

Fix ticket #68 MV clipping bug in the sub-PU MPI default MV generation

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[5]1/* The copyright in this software is being made available under the BSD
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[608]4 * granted under this license. 
[5]5 *
[872]6* Copyright (c) 2010-2014, ITU/ISO/IEC
[5]7 * All rights reserved.
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33
[2]34/** \file     TypeDef.h
35    \brief    Define basic types, new types and enumerations
36*/
37
38#ifndef _TYPEDEF__
39#define _TYPEDEF__
40
[56]41//! \ingroup TLibCommon
42//! \{
[608]43/////////////////////////////////////////////////////////////////////////////////////////
44///////////////////////////////// EXTENSION SELECTION /////////////////////////////////// 
45/////////////////////////////////////////////////////////////////////////////////////////
[296]46
[608]47/* HEVC_EXT might be defined by compiler/makefile options.
48   
49   Linux makefiles support the following settings:   
50   make             -> HEVC_EXT not defined   
51   make HEVC_EXT=0  -> H_MV=0 H_3D=0   --> plain HM
52   make HEVC_EXT=1  -> H_MV=1 H_3D=0   --> MV only
53   make HEVC_EXT=2  -> H_MV=1 H_3D=1   --> full 3D
54*/
[2]55
[608]56#ifndef HEVC_EXT
57#define HEVC_EXT                    2
58#endif
[296]59
[608]60#if ( HEVC_EXT < 0 )||( HEVC_EXT > 2 )
61#error HEVC_EXT must be in the range of 0 to 2, inclusive.
62#endif
[101]63
[608]64#define H_MV          ( HEVC_EXT != 0)
65#define H_3D          ( HEVC_EXT == 2)
[118]66
[950]67#define NTT_BUG_FIX_TK54    1
[964]68#define BUG_FIX_TK65        1
[724]69
[1029]70#define MTK_I0093           1
[608]71/////////////////////////////////////////////////////////////////////////////////////////
72///////////////////////////////////   MAJOR DEFINES   /////////////////////////////////// 
73/////////////////////////////////////////////////////////////////////////////////////////
[773]74
[608]75#if H_MV
76#define H_MV_ENC_DEC_TRAC                 1  //< CU/PU level tracking
77#endif
[210]78
[608]79#if H_3D
80#define H_3D_QTLPC                        1   // OL_QTLIMIT_PREDCODING_B0068 //JCT3V-B0068
[884]81                                              // HHI_QTLPC_RAU_OFF_C0160 JCT3V-C0160 change 2: quadtree limitation and predictive coding switched off in random access units
82                                              // MTK_TEX_DEP_PAR_G0055 Texture-partition-dependent depth partition. JCT3V-G0055
[443]83
[608]84#define H_3D_VSO                          1   // VSO, View synthesis optimization, includes:
85                                              // HHI_VSO
86                                              // HHI_VSO_LS_TABLE_M23714 enable table base Lagrange multiplier optimization
87                                              // SAIT_VSO_EST_A0033, JCT3V-A0033 modification 3
88                                              // LGE_WVSO_A0119
[884]89                                              // SCU_HS_VSD_BUGFIX_IMPROV_G0163
[608]90#define H_3D_NBDV                         1   // Neighboring block disparity derivation
91                                              // QC_JCT3V-A0097
92                                              // LGE_DVMCP_A0126
93                                              // LGE_DVMCP_MEM_REDUCTION_B0135     
94                                              // QC_SIMPLE_NBDV_B0047
95                                              // FIX_LGE_DVMCP_B0133
96                                              // QC_NBDV_LDB_FIX_C0055
97                                              // MTK_SAIT_TEMPORAL_FIRST_ORDER_C0141_C0097
98                                              // MTK_SIMPLIFY_DVTC_C0135           
99                                              // QC_CU_NBDV_D0181
100                                              // SEC_DEFAULT_DV_D0112
[655]101                                              // MTK_DVMCP_FIX_E0172       fix the mismatch between software and WD for DV derivation from DVMCP blocks, issue 2 in JCT3V-E0172
102                                              // SEC_SIMPLIFIED_NBDV_E0142 Simplified NBDV, JCT3V-E0142 and JCT3V-E0190
103                                              // MTK_NBDV_TN_FIX_E0172     fix the issue of DV derivation from the temporal neighboring blocks, issue 7 in JCT3V-E0172
104                                              // MTK_TEXTURE_MRGCAND_BUGFIX_E0182  Bug fix for TEXTURE MERGING CANDIDATE     , JCT3V-E0182
[976]105
[608]106#define H_3D_ARP                          1   // Advanced residual prediction (ARP), JCT3V-D0177
[773]107                                              // QC_MTK_INTERVIEW_ARP_F0123_F0108 JCT3V-F0123; JCT3V-F0108
108                                              // SHARP_ARP_REF_CHECK_F0105        ARP reference picture selection and DPB check
109                                              // LGE_ARP_CTX_F0161                JCT3V-F0161
[884]110                                              // MTK_ARP_FLAG_CABAC_SIMP_G0061 Use 2 context for ARP flag referring to only left neighbor block in JCT3V-G0061
111                                              // MTK_ARP_REF_SELECTION_G0053 ARP Reference picture selection in JCT3V-G0053
[976]112                                              // MTK_ALIGN_SW_WD_BI_PRED_ARP_H0085  Align the SW and WD for the bi-prediction ARP PUs by disallowing non-normative fast bi-prediction for ARP PUs, JCT3V-H0085
[884]113
[950]114
[608]115#define H_3D_IC                           1   // Illumination Compensation, JCT3V-B0045, JCT3V-C0046, JCT3V-D0060
116                                              // Unifying rounding offset, for IC part, JCT3V-D0135
117                                              // Full Pel Interpolation for Depth, HHI_FULL_PEL_DEPTH_MAP_MV_ACC
[655]118                                              // SHARP_ILLUCOMP_REFINE_E0046
119                                              // MTK_CLIPPING_ALIGN_IC_E0168       // To support simplify bi-prediction PU with identical motion checking, JCT3V-E0168
[773]120                                              // LGE_IC_CTX_F0160 //JCT3V-F0160
121                                              // SEC_ONLY_TEXTURE_IC_F0151
[884]122                                              // MTK_IC_FLAG_CABAC_SIMP_G0061
123                                              // SEC_IC_ARP_SIG_G0072, Disabling IC when ARP is enabled, option 1 in JCT3V-G0072, part 2 in JCT3V-G0121
[976]124                                              // MTK_LOW_LATENCY_IC_ENCODING_H0086  Low-latency IC encoding in JCT3V-H0086
[608]125
[1030]126#define SEC_IC_NEIGHBOR_CLIP_I0080        1   // Clipping of neighboring sample position, JCT3V-I0080
[950]127
[1030]128
[608]129#if H_3D_NBDV
130#define H_3D_NBDV_REF                     1   // Depth oriented neighboring block disparity derivation
131                                              // MTK_D0156
132                                              // MERL_D0166: Reference view selection in NBDV & Bi-VSP
133                                              // MERL_C0152: Basic VSP
[655]134                                              // NBDV_DEFAULT_VIEWIDX_BUGFIX Bug fix for invalid default view index for NBDV
135                                              // NTT_DoNBDV_VECTOR_CLIP_E0141 disparity vector clipping in DoNBDV, JCT3V-E0141 and JCT3V-E0209
[976]136                                              // SEC_VER_DONBDV_H0103          Vertical DV Restriction for DoNBDV
[443]137#endif
[296]138
[608]139#define H_3D_VSP                          1   // View synthesis prediction
140                                              // MERL_C0152: Basic VSP
141                                              // MERL_D0166: Reference view selection in NBDV & Bi-VSP
142                                              // MTK_D0105, LG_D0139: No VSP for depth
143                                              // QC_D0191: Clean up
144                                              // LG_D0092: Multiple VSP candidate allowed
[622]145                                              // MTK_VSP_FIX_ALIGN_WD_E0172
[655]146                                              // NTT_VSP_ADAPTIVE_SPLIT_E0207 adaptive sub-PU partitioning in VSP, JCT3V-E0207
147                                              // NTT_VSP_DC_BUGFIX_E0208 bugfix for sub-PU based DC in VSP, JCT3V-E0208
148                                              // NTT_VSP_COMMON_E0207_E0208 common part of JCT3V-E0207 and JCT3V-E0208
[773]149                                              // MTK_F0109_LG_F0120_VSP_BLOCK MTK_LG_SIMPLIFY_VSP_BLOCK_PARTITION_F0109_F0120 
150                                              // SHARP_VSP_BLOCK_IN_AMP_F0102 VSP partitioning for AMP
151                                              // MTK_VSP_SIMPLIFICATION_F0111 1. Inherited VSP also use NBDV of current CU, 2. VSP cannot be inherited from above LCU rowss
152                                              // LGE_SHARP_VSP_INHERIT_F0104
[884]153                                              // NTT_STORE_SPDV_VSP_G0148 Storing Sub-PU based DV for VSP
154                                              // Restricted bi-prediction for VSP
[773]155
[608]156#define H_3D_IV_MERGE                     1   // Inter-view motion merge candidate
[296]157                                              // HHI_INTER_VIEW_MOTION_PRED
158                                              // SAIT_IMPROV_MOTION_PRED_M24829, improved inter-view motion vector prediction
159                                              // QC_MRG_CANS_B0048             , JCT3V-B0048, B0086, B0069
160                                              // OL_DISMV_POS_B0069            , different pos for disparity MV candidate, B0069
161                                              // MTK_INTERVIEW_MERGE_A0049     , second part
[608]162                                              // QC_AMVP_MRG_UNIFY_IVCAN_C0051     
163                                              // TEXTURE MERGING CANDIDATE     , JCT3V-C0137
[724]164                                              // QC_INRIA_MTK_MRG_E0126
[773]165                                              // ETRIKHU_MERGE_REUSE_F0093 QC_DEPTH_IV_MRG_F0125, JCT3V-F0125: Depth oriented Inter-view MV candidate
166                                              // EC_MPI_ENABLING_MERGE_F0150, MPI flag in VPS and enabling in Merge mode
[884]167                                              // MTK_NBDV_IVREF_FIX_G0067      , Disable IvMC, VSP when IVREF is not available, JCT3V-G0067
168                                              // SEC_DEPTH_DV_DERIVAITON_G0074, Simplification of DV derivation for depth, JCT3V-G0074
169                                              // QC_DEPTH_MERGE_SIMP_G0127 Remove DV candidate and shifting candidate for depth coding
[976]170                                              // QC_IV_PRED_CONSTRAINT_H0137   Constraint on inter-view (motion) prediction tools
171                                              // ETRIKHU_BUGFIX_H0083          bug-fix for DV candidate pruning
172                                              // ETRIKHU_CLEANUP_H0083         cleaned-up source code for constructing merging candidate list
173                                              // ETRIKHU_CLEANUP_H0083_MISSING missing guard macros added by GT
174                                              // SHARP_SIMPLE_MERGE_H0062      Restrict 3D-HEVC merge cand in small PUs
175                                              // MTK_DIS_SPBIP8X4_H0205        Disable bi-prediction for 8x4 and 4x8 sub PU and remove the SPIVMP 2Nx2N restriction
176                                              // SEC_ADAPT_DISABLE_IVMP        Disalbing IVMP merge candidates when IC is enabled, JCT3V-H0070
[884]177
[1029]178#define SEC_SIMP_SHIFTED_DV_I0086         1   // Simplification of Shifted DV candidate, JCT3V-I0086
179
[608]180#define H_3D_TMVP                         1   // QC_TMVP_C0047
181                                              // Sony_M23639
[189]182
[608]183#define H_3D_DIM                          1   // DIM, Depth intra modes, includes:
184                                              // HHI_DMM_WEDGE_INTRA
185                                              // HHI_DMM_PRED_TEX
186                                              // FIX_WEDGE_NOFLOAT_D0036
187                                              // LGE_EDGE_INTRA_A0070
188                                              // LGE_DMM3_SIMP_C0044
189                                              // QC_DC_PREDICTOR_D0183
190                                              // HHI_DELTADC_DLT_D0035
191                                              // PKU_QC_DEPTH_INTRA_UNI_D0195
192                                              // RWTH_SDC_DLT_B0036
193                                              // INTEL_SDC64_D0193
194                                              // RWTH_SDC_CTX_SIMPL_D0032
195                                              // LGE_CONCATENATE_D0141
196                                              // FIX_SDC_ENC_RD_WVSO_D0163
197                                              // MTK_SAMPLE_BASED_SDC_D0110
[655]198                                              // SEC_DMM2_E0146_HHIFIX Removal of DMM2 from DMMs
199                                              // ZJU_DEPTH_INTRA_MODE_E0204 Simplified Binarization for depth_intra_mode
200                                              // KWU_SDC_SIMPLE_DC_E0117 Simplified DC calculation for SDC
201                                              // SCU_HS_DMM4_REMOVE_DIV_E0242 DMM4 Division Removal
202                                              // LGE_SDC_REMOVE_DC_E0158 Removal of DC mode from SDC
203                                              // LGE_PKU_DMM3_OVERLAP_E0159_HHIFIX 1   Removal of overlap between DMM3 and DMM1
[773]204                                              // LGE_PRED_RES_CODING_DLT_DOMAIN_F0159 JCT3V-F0159
205                                              // HHI_DIM_PREDSAMP_FIX_F0171
206                                              // SEC_DMM3_RBC_F0147 Removal of DMM3 and RBC from DMMs
207                                              // QC_DIM_DELTADC_UNIFY_F0132 Unify delta DC coding in depth intra modes
[884]208                                              // Unify intra SDC and inter SDC
209                                              // QC_GENERIC_SDC_G0122 Generalize SDC to all depth intra modes
210                                              // SCU_HS_DEPTH_DC_PRED_G0143
211                                              // HS_TSINGHUA_SDC_SPLIT_G0111
212                                              // QC_PKU_SDC_SPLIT_G0123 Intra SDC Split
[976]213                                              // HS_DMM_SDC_PREDICTOR_UNIFY_H0108  Unification of DMM and SDC predictor derivation
214                                              // LGE_SIMP_DIM_NOT_PRESENT_FLAG_CODING_H0119_H0135  Use only one context for CABAC of dim_not_present_flag
215                                              // QC_SIMP_DELTADC_CODING_H0131   Simplify detaDC entropy coding
216                                              // MTK_DMM_SIMP_CODE_H0092        Remove CABAC context for DMM1 mode coding
217                                              // MTK_DELTA_DC_FLAG_ONE_CONTEXT_H0084_H0100_H0113 Use only one context for CABAC of delta_dc_flag as in JCTVC-H0084, JCTVC-H0100 and JCTVC-H0113
218                                              // MTK_SDC_FLAG_FIX_H0095                          Remove conditional check of PCM flag based on SDC flag, JCTVC-H0095
219                                              // SEC_NO_RESI_DLT_H0105   
220                                              // MTK_DLT_CODING_FIX_H0091
[189]221
[983]222#define MTK_SINGLE_DEPTH_MODE_I0095       1   // Single depth mode proposed in JCT3V-I0095
223#if MTK_SINGLE_DEPTH_MODE_I0095
224#define MTK_SINGLE_DEPTH_MODE_CANDIDATE_LIST_SIZE            2 // size of the sample candidate list
225#endif
[976]226
[655]227#define H_3D_INTER_SDC                    1   // INTER SDC, Inter simplified depth coding
[884]228                                              // LGE_INTER_SDC_E0156 Enable inter SDC for depth coding
229                                              // SEC_INTER_SDC_G0101 Improved inter SDC with multiple DC candidates
230
[773]231#define H_3D_SPIVMP                       1   // H_3D_SPIVMP    // JCT3V-F0110: Sub-PU level inter-view motion prediction
[884]232                                              // SEC_SPIVMP_MCP_SIZE_G0077, Apply SPIVMP only to 2Nx2N partition, JCT3V-G0077
233                                              // QC_SPIVMP_MPI_G0119 Sub-PU level MPI merge candidate
234                                              // Simplification on Sub-PU level temporal interview motion prediction
[976]235                                              // MPI_SUBPU_DEFAULT_MV_H0077_H0099_H0111_H0133
[884]236
237#define H_3D_DBBP                         1   // DBBP: Depth-based Block Partitioning and Merging
[976]238                                              // MTK_DBBP_AMP_REM_H0072   
239                                              // RWTH_DBBP_NO_SPU_H0057   
240                                              // SEC_DBBP_FILTERING_H0104
241                                              // MTK_DBBP_SIGNALING_H0094   
242                                              // H_3D_FIX_DBBP_IVMP        Fix . Enable IVMP is always disabled, when DBBP is enabled. The original intention is to disable Sub-PU IVMP when DBBP is enabled, not to disable IVMP itself.
[884]243
[1029]244#define SEC_DBBP_EXPLICIT_SIG_I0077       1   // Remove the partition derivation and signal dbbp_flag only when the partion mode is 2NxN/Nx2N, JCT3V-I0077
245#define SEC_DBBP_DISALLOW_8x8_I0078       1   // Disallow DBBP in 8x8 CU, JCT3V-I0078
246#define SHARP_DBBP_SIMPLE_FLTER_I0109     1   // Simple condition and one dimensional dilter for DBBP
[1013]247#define SEC_DBBP_DMM4_THRESHOLD_I0076     1   // Simplification of threshold derivation for DBBP and DMM4, JCT3V-I0076
[976]248
[1013]249
[884]250#define H_3D_DDD                          1   // Disparity derived depth coding
251
[655]252#define H_3D_FCO                          0   // Flexible coding order for 3D
[189]253
[993]254#define SCU_HS_FAST_INTRA_SDC_I0123       1
[189]255
[655]256// OTHERS
257                                              // MTK_SONY_PROGRESSIVE_MV_COMPRESSION_E0170 // Progressive MV Compression, JCT3V-E0170
258#define H_3D_REN_MAX_DEV_OUT              0   // Output maximal possible shift deviation
259#define H_3D_FAST_TEXTURE_ENCODING        1   // Fast merge mode decision and early CU determination for texture component of dependent view, JCT3V-E0173
260                                              // MTK_FAST_TEXTURE_ENCODING_E0173
[608]261#if H_3D_DIM
[655]262#define H_3D_FAST_DEPTH_INTRA             1   // Fast DMM and RBC Mode Selection
263                                              // SCU_HS_FAST_DEPTH_INTRA_E0238_HHIFIX
[608]264#endif
[189]265
[1030]266#define MTK_I0099_VPS_EX2                 1  ///< JCT3V-I0099, sub-PU size signaling and lim_qt_pred_flag in VPS extension 2
267#define MTK_I0099_FIX                     1  ///< Fix the problem of removing encoder only QTL
268
[655]269// Rate Control
270#define KWU_FIX_URQ                       1
271#define KWU_RC_VIEWRC_E0227               0  ///< JCT3V-E0227, view-wise target bitrate allocation
272#define KWU_RC_MADPRED_E0227              0  ///< JCT3V-E0227, inter-view MAD prediction
[189]273
[1030]274#define SEC_VPS_CLEANUP_I0090             1
275#define SEC_HLS_CLEANUP_I0100             1
276
[608]277#endif // H_3D
[296]278
[332]279
[443]280
[608]281/////////////////////////////////////////////////////////////////////////////////////////
282///////////////////////////////////   DERIVED DEFINES /////////////////////////////////// 
283/////////////////////////////////////////////////////////////////////////////////////////
[443]284
[1033]285// Fixes
[1037]286#define FIX_TICKET_68                     1    // MV clipping bug in the sub-PU MPI default MV generation
[1036]287#define FIX_TICKET_71                     1    // IC parameters is meaningless in HTM when no training samples are available
[1035]288#define FIX_TICKET_77                     1    // Unused variable m_iBitsPerDepthValue
[1034]289#define FIX_TICKET_76                     1    // unused functions
290#define FIX_TICKET_62                     1    // buffer overflow for print
[1033]291#define FIX_TICKET_61                     1    // layerIdsInSets size check
292
[608]293///// ***** VIEW SYNTHESIS OPTIMIZAION *********
294#if H_3D_VSO                                 
295#define H_3D_VSO_DIST_INT                 1   // Allow negative synthesized view distortion change
296#define H_3D_VSO_COLOR_PLANES             1   // Compute VSO distortion on color planes
297#define H_3D_VSO_EARLY_SKIP               1   // LGE_VSO_EARLY_SKIP_A0093, A0093 modification 4
298#define H_3D_VSO_RM_ASSERTIONS            0   // Output VSO assertions
299#define H_3D_VSO_SYNTH_DIST_OUT           0   // Output of synthesized view distortion instead of depth distortion in encoder output
300#define H_3D_VSO_FIX                      0   // This fix should be enabled after verification
[655]301#endif
[608]302
[773]303////   ****** NEIGHBOURING BLOCK-BASED DISPARITY VECTOR  *********
[608]304#if H_3D_NBDV
305#define DVFROM_LEFT                       0
306#define DVFROM_ABOVE                      1
307#define IDV_CANDS                         2
[443]308#endif
[296]309
[608]310///// ***** ADVANCED INTERVIEW RESIDUAL PREDICTION *********
311#if H_3D_ARP
312#define H_3D_ARP_WFNR                     3
[1030]313#define QC_I0129_ARP_FIX                  1
314#define QC_I0051_ARP_SIMP                 1
315#define SHARP_ARP_CHROMA_I0104            1
316#define MTK_I0072_IVARP_SCALING_FIX       1
[443]317#endif
[655]318
[608]319///// ***** DEPTH INTRA MODES *********
320#if H_3D_DIM
321#define H_3D_DIM_DMM                      1   // Depth Modeling Modes
322#define H_3D_DIM_SDC                      1   // Simplified Depth Coding method
323#define H_3D_DIM_DLT                      1   // Depth Lookup Table
[994]324#define HS_DMM_SIGNALLING_I0120  1   
[1001]325#define SHARP_DMM1_I0110                  1   // LUT size reduction for DMM1 proposed in JCT3V-I0110
[1000]326#define FIX_WARNING                       1   // fix narrowing conversion of NumPocStCurr0,NumPocStCurr1 at TComSlice.cpp
[1014]327#define FAST_SDC_OFFSET_DECISION_I0084    1
[1015]328#define SEPARATE_FLAG_I0085               1
[758]329
330#if H_3D_DIM_DLT
331#define H_3D_DELTA_DLT                    1
[1023]332#define RWTH_DLT_CLIP_I0057               1
[758]333#endif
[608]334#define H_3D_DIM_ENC                      1   // Depth Intra encoder optimizations, includes:
335                                              // HHI_DEPTH_INTRA_SEARCH_RAU_C0160
336                                              // LG_ZEROINTRADEPTHRESI_A0087
[1019]337#define HHI_DMM4_ENC_I0066                1
[189]338#endif
[608]339///// ***** VIEW SYNTHESIS PREDICTION *********
340#if H_3D_VSP
341#define H_3D_VSP_BLOCKSIZE                4   // Supported values: 1, 2, and 4
342#if H_3D_VSP_BLOCKSIZE == 1
343#define H_3D_VSP_CONSTRAINED              1   // Constrained VSP @ 1x1
344#else
345#define H_3D_VSP_CONSTRAINED              0
[100]346#endif
347#endif
348
[833]349
[655]350///// ***** ILLUMATION COMPENSATION *********
351#if H_3D_IC
352#define IC_REG_COST_SHIFT                 7
353#define IC_CONST_SHIFT                    5
354#define IC_SHIFT_DIFF                     12
[976]355#define IC_LOW_LATENCY_ENCODING_THRESHOLD 0.1 // Threshold for low-latency IC encoding in JCT3V-H0086
[655]356#endif
357
[833]358
[884]359///// ***** DEPTH BASED BLOCK PARTITIONING *********
360#if H_3D_DBBP
361#define DBBP_INVALID_SHORT                (-4)
362#define RWTH_DBBP_PACK_MODE               SIZE_2NxN
363#endif
364
365
[655]366///// ***** FCO *********
367#if H_3D_FCO
368#define H_3D_FCO_VSP_DONBDV_E0163               1   // Adaptive depth reference for flexible coding order
369#else
370#define H_3D_FCO_VSP_DONBDV_E0163               0   // Adaptive depth reference for flexible coding order
371#endif
372
[773]373#if H_3D
374#define PPS_FIX_DEPTH                           1
375#endif
[724]376
[976]377/////////////////////////////////////////////////////////////////////////////////
378///////////////////////////////////   MV_HEVC HLS  //////////////////////////////
379/////////////////////////////////////////////////////////////////////////////////
380// TBD: Check if integration is necessary.
[964]381#define H_MV_HLS7_GEN                        0  // General changes (not tested)
382
383// POC
[872]384// #define H_MV_HLS_7_POC_P0041_3            0 // (POC/P0041/POC reset) #3 It was remarked that we should require each non-IRAP picture that has discardable_flag equal to 1 to have NUT value indicating that it is a sub-layer non-reference picture. This was agreed. Decision: Adopt (with constraint for discardable_flag as described above)
385// #define H_MV_HLS_7_POC_P0041_FIXES        0 // (POC/P0041/Fixes) For each non-IRAP picture that has discardable_flag equal to 1 to have NUT value indicating that it is a sub-layer non-reference picture.
[950]386// #define H_MV_HLS_7_POC_P0056_4            0 // (POC/P0056/layer tree poc) #4 Proposal 1: If the POC reset approach is adopted as the basis for multi-layer POC derivation, it is proposed to derive the POC anchor picture from the previous TID0 picture (that is not a RASL picture, a RADL picture or a sub-layer non-reference picture and not with discardable_flag equal to 1) of  the current layer or any of its reference layer. This is asserted to improve loss resilience and reduce bit rate overhead. Decision: Adopt Proposal 1 (with the suggested modifications Ewith text provided as P0297).
[872]387
[964]388// SEI related
389//#define H_MV_HLS_8_SEI_NODOC_53  0 // #53 (SEI    /NODOC/Added Multiview view position SEI message) Plain copy from AVC.
390//#define H_MV_HLS_8_SEI_NODOC_52  0 // #52 (SEI    /NODOC/Added Multiview acquisition information SEI) Plain copy from AVC.
391//#define H_MV_HLS_8_SEI_NODOC_51  0 // #51 (SEI    /NODOC/Added Multiview scene information SEI message)
392//#define H_MV_HLS_8_SEI_Q0189_35  0 // #35 (SEI    /Q0189/SEI message for indicating constraints on TMVP) Proposal 2.3,  SEI message for indicating constraints on TMVP
393//#define H_MV_HLS_8_EDF_Q0116_29  0 // #29 (ED.FIX /Q0116/Recovery point SEI) , consider adding a note regarding how random accessibility is affected by the recovery point SEI message
394//#define H_MV_HLS_8_GEN_Q0183_23  0 // #23 (GEN    /Q0183/SEI clean-ups) numerous small clean-ups on SEI messages.
395//#define H_MV_HLS_8_MIS_Q0247_49  0 // #49 (MISC   /Q0247/frame-field information SEI message)
396//#define H_MV_HLS_8_MIS_Q0189_34  0 // #34 (MISC   /Q0189/slice temporal mvp enabled flag) Proposal 2.2, clarification of semantics of slice temporal mvp enabled flag
397//#define H_MV_HLS_8_EDF_Q0081_01  0 // #1  (ED.FIX /Q0081/alpha channel persist) On reuse of alpha planes in auxiliary pictures. It was asked why there would not be a presumption that the alpha channel content would simply persist, without needing the flag to indicate it. Decision (Ed.): Delegated to editors to clarify, as necessary, that the alpha channel content persists until cancelled or updated in output order.
398//#define H_MV_HLS_8_SEI_Q0253_37  0 // #37 (SEI    /Q0253/layer not present), modified semantics of layers not present SEI message to correct bug introduced during editing
399//#define H_MV_HLS_8_SEI_Q0045_11  0 // #11 (SEI    /Q0045/Overlay) Proposal for an SEI message on selectable overlays. Decision: Adopt (modified for variable-length strings).
400//#define H_MV_HLS_7_SEI_P0133_28  0 // (SEI/P0133/Recovery point SEI) #28 Decision: Adopt change to recover point semantics only (-v3)
401//#define H_MV_HLS_7_SEI_P0123_25  0 // (SEI/P0123/Alpha channel info) #25 Add alpha channel information SEI message Decision: Adopt. Constrain the bit depth indicated to be equal to the coded bit depth of the aux picture.
[872]402
[964]403// Auxiliary picture related
404//#define H_MV_HLS_8_AUX_NODOC_40  0 // #40 (AUX    /NODOC/primary pic) Clarify that an auxiliary picture can be associated with more than one primary picture. Consider if the language associating an alpha auxiliary picture with a primary picture in the semantics of dimension_id[ ][ ] near the AuxId derivation could be moved to the alpha SEI message.
405//#define H_MV_HLS_8_AUX_Q0081_2   0 // #2  (AUX    /Q0081/primary) Decision: Remove the constraint that an alpha picture must be accompanied by a primary picture.
406//#define H_MV_HLS_8_AUX_Q0078_44  0 // #44 (AUX    /Q0078/concepts Auxiliary picture concepts:
407//#define H_MV_HLS_8_AUX_Q0078_39  0 // #39 (AUX    /Q0078/conformance): mechanism for signaling a profile/tier/level conformance point for auxiliary pictures
408
409// Profiles
410//#define H_MV_HLS_8_PRO_NODOC_50  0 // #50 (PROF   /NODOC/Monochrome) Add Monochrome 8-bit profile
411//#define H_MV_HLS_8_PRO_NODOC_31  0 // #31 (PROF   /NODOC/Profile constraint) Add a profile constraint to the Scalable Main, Scalable Main 10, and Stereo Main profiles against allowing layers with duplicate values of DependencyId (or ViewOrderIdx) when AuxId equal to 0.
412//#define H_MV_HLS_8_PRO_H0126_45  0 // #45 (PROF   /H0126/Stereo main) Phrasing used in specifying the Stereo Main profile.
413//#define H_MV_HLS_8_PRO_Q0160_33  0 // #33 (PROF   /Q0160/alt_output_flag) v2: Add constraint to stereo main profile that it must contain exactly two texture views, and add a note to state that the constraint implies a restriction that alt_output_flag equal to 0.
414
415// DPB
416//#define H_MV_HLS_8_HRD_Q0102_09  0 // #9  (HRD    /Q0102/NoOutputOfPriorPicsFlag) It was suggested that also the separate_colour_plane_flag should affect inference of NoOutputOfPriorPicsFlag. Decision (Ed.): Agreed (affects RExt text).
417//#define H_MV_HLS_8_DBP_Q0154_38  0 // #38 (DBP    /Q0154/VPS DPB) Proposal in C.5.2.1: Add in the decoding process that when a new VPS is activated, all pictures in the DPB are marked as unused for reference
418//#define H_MV_HLS_8_HRD_Q0154_10  0 // #10 (HRD    /Q0154/DPB Flushing and parameters) On picture flushing and DPB parameters Decision: Adopted (some details to be discussed further in BoG).
419//#define H_MV_HLS_7_OTHER_P0187_1 0 // (OTHER/P0187/NoOutputOfPriorPicsFlag) #1 Inference of NoOutputOfPriorPicsFlag and proposes to take into account colour format and bit depth for the inference in addition to spatial resolution
420
[976]421// OTHERS
[983]422//#define H_MV_HLS_8_HSB_Q0041_03  0 // #3  (HS     /Q0041/hybrid scalability) The proposed text was endorsed, with non-editorial open issues considered as follows ?// #define H_MV_HLS_7_OTHER_P0187_1          0 // (OTHER/P0187/NoOutputOfPriorPicsFlag) #1 Inference of NoOutputOfPriorPicsFlag and proposes to take into account colour format and bit depth for the inference in addition to spatial resolution
[964]423//#define H_MV_HLS_8_MIS_Q0078_24  0 // #24 (MISC   /Q0078/scan and pic type) , Items 3 b,c and 4, clarifying which pictures in an output layer sets are applied the values of general_progressive_source_flag, general_interlaced_source_flag, general_non_packed_constraint_flag and general_frame_only_constraint_flag.
[976]424//#define H_MV_HLS_7_HRD_P0138_6   0 //     (HRD/P0138/HRD parameters for bitstreams excluding) #6 Decision: Adopt (as revised in updated contribution, with the specification of a flag in the BP SEI (HRD/P0192/sub-DPB) #12 Establish sub-DPBs based on the representation format indicated at the VPS level. It was suggested that the expressed shared capacity limit would need to be less than or equal to the sum of the individual capacity limits. Decision: Adopt as modified. Further study is encouraged on profile/level constraint selections.
[964]425
[872]426/////////////////////////////////////////////////////////////////////////////////////////
[608]427///////////////////////////////////   HM RELATED DEFINES ////////////////////////////////
428/////////////////////////////////////////////////////////////////////////////////////////
[964]429#define HARMONIZE_GOP_FIRST_FIELD_COUPLE  1
430#define FIX_FIELD_DEPTH                 1
431#if H_MV
432#define EFFICIENT_FIELD_IRAP            0
433#else
434#define EFFICIENT_FIELD_IRAP            1
435#endif
436#define ALLOW_RECOVERY_POINT_AS_RAP     1
437#define BUGFIX_INTRAPERIOD              1
[872]438#define SAO_ENCODE_ALLOW_USE_PREDEBLOCK 1
[100]439
[964]440#define SAO_SGN_FUNC 1
441
[872]442#define FIX1172 1 ///< fix ticket #1172
[100]443
[964]444#define SETTING_PIC_OUTPUT_MARK     1
445#define SETTING_NO_OUT_PIC_PRIOR    1
446#define FIX_EMPTY_PAYLOAD_NAL       1
447#define FIX_WRITING_OUTPUT          1
448#define FIX_OUTPUT_EOS              1
449
450#define FIX_POC_CRA_NORASL_OUTPUT   1
451
[608]452#define MAX_NUM_PICS_IN_SOP           1024
[56]453
[608]454#define MAX_NESTING_NUM_OPS         1024
455#define MAX_NESTING_NUM_LAYER       64
[56]456
[608]457#define MAX_VPS_NUM_HRD_PARAMETERS                1
458#define MAX_VPS_OP_SETS_PLUS1                     1024
459#if H_MV
[738]460#define MAX_VPS_NUH_LAYER_ID_PLUS1  63
[608]461#define MAX_NUM_SCALABILITY_TYPES   16
462#define ENC_CFG_CONSOUT_SPACE       29           
463#else
464#define MAX_VPS_NUH_RESERVED_ZERO_LAYER_ID_PLUS1  1
[210]465#endif
[296]466
467
[608]468#define MAX_CPB_CNT                     32  ///< Upper bound of (cpb_cnt_minus1 + 1)
[738]469#if H_MV
470#define MAX_NUM_LAYER_IDS               63
471#define MAX_NUM_LAYERS                  63
[608]472#define MAX_VPS_PROFILE_TIER_LEVEL      64
473#define MAX_VPS_ADD_OUTPUT_LAYER_SETS   1024
474#define MAX_VPS_OUTPUTLAYER_SETS        ( MAX_VPS_ADD_OUTPUT_LAYER_SETS + MAX_VPS_OP_SETS_PLUS1 )
[738]475#define  MAX_NUM_VIDEO_SIGNAL_INFO      16
476#define MAX_NUM_SCALED_REF_LAYERS       MAX_NUM_LAYERS-1
477#define MAX_NUM_BSP_HRD_PARAMETERS      100 ///< Maximum value is actually not specified
478#define MAX_NUM_BITSTREAM_PARTITIONS    100 ///< Maximum value is actually not specified
479#define MAX_NUM_BSP_SCHED_COMBINATION   100 ///< Maximum value is actually not specified
[872]480#define MAX_SUB_STREAMS                 1024
[773]481#else
482#define MAX_NUM_LAYER_IDS                64
[738]483#endif
[2]484
[608]485#define COEF_REMAIN_BIN_REDUCTION        3 ///< indicates the level at which the VLC
486                                           ///< transitions from Golomb-Rice to TU+EG(k)
[2]487
[608]488#define CU_DQP_TU_CMAX 5                   ///< max number bins for truncated unary
489#define CU_DQP_EG_k 0                      ///< expgolomb order
[2]490
[608]491#define SBH_THRESHOLD                    4  ///< I0156: value of the fixed SBH controlling threshold
492 
493#define SEQUENCE_LEVEL_LOSSLESS           0  ///< H0530: used only for sequence or frame-level lossless coding
[296]494
495#define DISABLING_CLIP_FOR_BIPREDME         1  ///< Ticket #175
[608]496 
[296]497#define C1FLAG_NUMBER               8 // maximum number of largerThan1 flag coded in one chunk :  16 in HM5
[608]498#define C2FLAG_NUMBER               1 // maximum number of largerThan2 flag coded in one chunk:  16 in HM5
499#define SAO_ENCODING_CHOICE              1  ///< I0184: picture early termination
500#if SAO_ENCODING_CHOICE
501#define SAO_ENCODING_RATE                0.75
502#define SAO_ENCODING_CHOICE_CHROMA       1 ///< J0044: picture early termination Luma and Chroma are handled separately
503#if SAO_ENCODING_CHOICE_CHROMA
504#define SAO_ENCODING_RATE_CHROMA         0.5
[443]505#endif
[608]506#endif
[296]507
[608]508#define MAX_NUM_VPS                16
509#define MAX_NUM_SPS                16
510#define MAX_NUM_PPS                64
[296]511
[56]512#define RDOQ_CHROMA_LAMBDA          1   ///< F386: weighting of chroma for RDOQ
[2]513
[56]514#define MIN_SCAN_POS_CROSS          4
[2]515
[56]516#define FAST_BIT_EST                1   ///< G763: Table-based bit estimation for CABAC
[2]517
[56]518#define MLS_GRP_NUM                         64     ///< G644 : Max number of coefficient groups, max(16, 64)
519#define MLS_CG_SIZE                         4      ///< G644 : Coefficient group size of 4x4
[2]520
[56]521#define ADAPTIVE_QP_SELECTION               1      ///< G382: Adaptive reconstruction levels, non-normative part for adaptive QP selection
522#if ADAPTIVE_QP_SELECTION
523#define ARL_C_PRECISION                     7      ///< G382: 7-bit arithmetic precision
524#define LEVEL_RANGE                         30     ///< G382: max coefficient level in statistics collection
525#endif
[2]526
[56]527#define HHI_RQT_INTRA_SPEEDUP             1           ///< tests one best mode with full rqt
528#define HHI_RQT_INTRA_SPEEDUP_MOD         0           ///< tests two best modes with full rqt
529
530#if HHI_RQT_INTRA_SPEEDUP_MOD && !HHI_RQT_INTRA_SPEEDUP
531#error
[2]532#endif
533
[608]534#define VERBOSE_RATE 0 ///< Print additional rate information in encoder
[2]535
[56]536#define AMVP_DECIMATION_FACTOR            4
[5]537
[56]538#define SCAN_SET_SIZE                     16
539#define LOG2_SCAN_SET_SIZE                4
[5]540
[608]541#define FAST_UDI_MAX_RDMODE_NUM               35          ///< maximum number of RD comparison in fast-UDI estimation loop
[56]542
543#define ZERO_MVD_EST                          0           ///< Zero Mvd Estimation in normal mode
544
545#define NUM_INTRA_MODE 36
[608]546#if !REMOVE_LM_CHROMA
[56]547#define LM_CHROMA_IDX  35
[2]548#endif
549
[56]550#define WRITE_BACK                      1           ///< Enable/disable the encoder to replace the deltaPOC and Used by current from the config file with the values derived by the refIdc parameter.
[608]551#define AUTO_INTER_RPS                  1           ///< Enable/disable the automatic generation of refIdc from the deltaPOC and Used by current from the config file.
[56]552#define PRINT_RPS_INFO                  0           ///< Enable/disable the printing of bits used to send the RPS.
553                                                    // using one nearest frame as reference frame, and the other frames are high quality (POC%4==0) frames (1+X)
554                                                    // this should be done with encoder only decision
555                                                    // but because of the absence of reference frame management, the related code was hard coded currently
[2]556
[608]557#define RVM_VCEGAM10_M 4
[2]558
[56]559#define PLANAR_IDX             0
560#define VER_IDX                26                    // index for intra VERTICAL   mode
561#define HOR_IDX                10                    // index for intra HORIZONTAL mode
562#define DC_IDX                 1                     // index for intra DC mode
[608]563#define NUM_CHROMA_MODE        5                     // total number of chroma modes
[56]564#define DM_CHROMA_IDX          36                    // chroma mode index for derived from luma intra mode
[2]565
566
567#define FAST_UDI_USE_MPM 1
568
[56]569#define RDO_WITHOUT_DQP_BITS              0           ///< Disable counting dQP bits in RDO-based mode decision
[2]570
[608]571#define FULL_NBIT 0 ///< When enabled, compute costs using full sample bitdepth.  When disabled, compute costs as if it is 8-bit source video.
572#if FULL_NBIT
573# define DISTORTION_PRECISION_ADJUSTMENT(x) 0
574#else
575# define DISTORTION_PRECISION_ADJUSTMENT(x) (x)
576#endif
[2]577
[56]578#define LOG2_MAX_NUM_COLUMNS_MINUS1        7
579#define LOG2_MAX_NUM_ROWS_MINUS1           7
580#define LOG2_MAX_COLUMN_WIDTH              13
581#define LOG2_MAX_ROW_HEIGHT                13
[2]582
[56]583#define MATRIX_MULT                             0   // Brute force matrix multiplication instead of partial butterfly
[2]584
[56]585#define REG_DCT 65535
[2]586
[56]587#define AMP_SAD                               1           ///< dedicated SAD functions for AMP
588#define AMP_ENC_SPEEDUP                       1           ///< encoder only speed-up by AMP mode skipping
589#if AMP_ENC_SPEEDUP
590#define AMP_MRG                               1           ///< encoder only force merge for AMP partition (no motion search for AMP)
[2]591#endif
592
[56]593#define CABAC_INIT_PRESENT_FLAG     1
594
[2]595// ====================================================================================================================
596// Basic type redefinition
597// ====================================================================================================================
598
599typedef       void                Void;
600typedef       bool                Bool;
601
[872]602#ifdef __arm__
603typedef       signed char         Char;
604#else
[2]605typedef       char                Char;
[872]606#endif
[2]607typedef       unsigned char       UChar;
608typedef       short               Short;
609typedef       unsigned short      UShort;
610typedef       int                 Int;
611typedef       unsigned int        UInt;
612typedef       double              Double;
[608]613typedef       float               Float;
[2]614
615// ====================================================================================================================
616// 64-bit integer type
617// ====================================================================================================================
618
619#ifdef _MSC_VER
620typedef       __int64             Int64;
621
622#if _MSC_VER <= 1200 // MS VC6
623typedef       __int64             UInt64;   // MS VC6 does not support unsigned __int64 to double conversion
624#else
625typedef       unsigned __int64    UInt64;
626#endif
627
628#else
629
630typedef       long long           Int64;
631typedef       unsigned long long  UInt64;
632
633#endif
634
635// ====================================================================================================================
636// Type definition
637// ====================================================================================================================
638
639typedef       UChar           Pxl;        ///< 8-bit pixel type
640typedef       Short           Pel;        ///< 16-bit pixel type
641typedef       Int             TCoeff;     ///< transform coefficient
642
[608]643#if H_3D_VSO
[2]644// ====================================================================================================================
645// Define Distortion Types
646// ====================================================================================================================
647typedef       Int64           RMDist;     ///< renderer model distortion
648
[608]649#if H_3D_VSO_DIST_INT
650typedef       Int64            Dist;       ///< RDO distortion
651typedef       Int64            Dist64; 
[2]652#define       RDO_DIST_MIN     MIN_INT
653#define       RDO_DIST_MAX     MAX_INT
654#else
655typedef       UInt             Dist;       ///< RDO distortion
[608]656typedef       UInt64           Dist; 
[2]657#define       RDO_DIST_MIN     0
658#define       RDO_DIST_MAX     MAX_UINT
659#endif
[608]660#endif
[2]661/// parameters for adaptive loop filter
662class TComPicSym;
663
[608]664// Slice / Slice segment encoding modes
665enum SliceConstraint
666{
667  NO_SLICES              = 0,          ///< don't use slices / slice segments
668  FIXED_NUMBER_OF_LCU    = 1,          ///< Limit maximum number of largest coding tree blocks in a slice / slice segments
669  FIXED_NUMBER_OF_BYTES  = 2,          ///< Limit maximum number of bytes in a slice / slice segment
670  FIXED_NUMBER_OF_TILES  = 3,          ///< slices / slice segments span an integer number of tiles
671};
672
[872]673enum SAOComponentIdx
674{
675  SAO_Y =0,
676  SAO_Cb,
677  SAO_Cr,
678  NUM_SAO_COMPONENTS
679};
[2]680
[872]681enum SAOMode //mode
[2]682{
[872]683  SAO_MODE_OFF = 0,
684  SAO_MODE_NEW,
685  SAO_MODE_MERGE,
686  NUM_SAO_MODES
[2]687};
688
[872]689enum SAOModeMergeTypes
[2]690{
[872]691  SAO_MERGE_LEFT =0,
692  SAO_MERGE_ABOVE,
693  NUM_SAO_MERGE_TYPES
[2]694};
695
[872]696
697enum SAOModeNewTypes
[2]698{
[872]699  SAO_TYPE_START_EO =0,
700  SAO_TYPE_EO_0 = SAO_TYPE_START_EO,
701  SAO_TYPE_EO_90,
702  SAO_TYPE_EO_135,
703  SAO_TYPE_EO_45,
[2]704
[872]705  SAO_TYPE_START_BO,
706  SAO_TYPE_BO = SAO_TYPE_START_BO,
[2]707
[872]708  NUM_SAO_NEW_TYPES
709};
710#define NUM_SAO_EO_TYPES_LOG2 2
[2]711
[872]712enum SAOEOClasses
713{
714  SAO_CLASS_EO_FULL_VALLEY = 0,
715  SAO_CLASS_EO_HALF_VALLEY = 1,
716  SAO_CLASS_EO_PLAIN       = 2,
717  SAO_CLASS_EO_HALF_PEAK   = 3,
718  SAO_CLASS_EO_FULL_PEAK   = 4,
719  NUM_SAO_EO_CLASSES,
720};
[2]721
722
[872]723#define NUM_SAO_BO_CLASSES_LOG2  5
724enum SAOBOClasses
[2]725{
[872]726  //SAO_CLASS_BO_BAND0 = 0,
727  //SAO_CLASS_BO_BAND1,
728  //SAO_CLASS_BO_BAND2,
729  //...
730  //SAO_CLASS_BO_BAND31,
[56]731
[872]732  NUM_SAO_BO_CLASSES = (1<<NUM_SAO_BO_CLASSES_LOG2),
733};
734#define MAX_NUM_SAO_CLASSES  32  //(NUM_SAO_EO_GROUPS > NUM_SAO_BO_GROUPS)?NUM_SAO_EO_GROUPS:NUM_SAO_BO_GROUPS
735
736struct SAOOffset
[56]737{
[872]738  Int modeIdc; //NEW, MERGE, OFF
739  Int typeIdc; //NEW: EO_0, EO_90, EO_135, EO_45, BO. MERGE: left, above
740  Int typeAuxInfo; //BO: starting band index
741  Int offset[MAX_NUM_SAO_CLASSES];
742
743  SAOOffset();
744  ~SAOOffset();
745  Void reset();
746
747  const SAOOffset& operator= (const SAOOffset& src);
[2]748};
749
[872]750struct SAOBlkParam
751{
752
753  SAOBlkParam();
754  ~SAOBlkParam();
755  Void reset();
756  const SAOBlkParam& operator= (const SAOBlkParam& src);
757  SAOOffset& operator[](Int compIdx){ return offsetParam[compIdx];}
758private:
759  SAOOffset offsetParam[NUM_SAO_COMPONENTS];
760
761};
762
[2]763/// parameters for deblocking filter
764typedef struct _LFCUParam
765{
766  Bool bInternalEdge;                     ///< indicates internal edge
767  Bool bLeftEdge;                         ///< indicates left edge
768  Bool bTopEdge;                          ///< indicates top edge
769} LFCUParam;
770
771// ====================================================================================================================
772// Enumeration
773// ====================================================================================================================
774
775/// supported slice type
776enum SliceType
777{
[608]778  B_SLICE,
[2]779  P_SLICE,
[608]780  I_SLICE
[2]781};
782
[56]783/// chroma formats (according to semantics of chroma_format_idc)
784enum ChromaFormat
785{
786  CHROMA_400  = 0,
787  CHROMA_420  = 1,
788  CHROMA_422  = 2,
789  CHROMA_444  = 3
790};
791
[2]792/// supported partition shape
793enum PartSize
794{
795  SIZE_2Nx2N,           ///< symmetric motion partition,  2Nx2N
796  SIZE_2NxN,            ///< symmetric motion partition,  2Nx N
797  SIZE_Nx2N,            ///< symmetric motion partition,   Nx2N
798  SIZE_NxN,             ///< symmetric motion partition,   Nx N
[56]799  SIZE_2NxnU,           ///< asymmetric motion partition, 2Nx( N/2) + 2Nx(3N/2)
800  SIZE_2NxnD,           ///< asymmetric motion partition, 2Nx(3N/2) + 2Nx( N/2)
801  SIZE_nLx2N,           ///< asymmetric motion partition, ( N/2)x2N + (3N/2)x2N
802  SIZE_nRx2N,           ///< asymmetric motion partition, (3N/2)x2N + ( N/2)x2N
[2]803  SIZE_NONE = 15
804};
805
806/// supported prediction type
807enum PredMode
808{
809  MODE_INTER,           ///< inter-prediction mode
810  MODE_INTRA,           ///< intra-prediction mode
811  MODE_NONE = 15
812};
813
814/// texture component type
815enum TextType
816{
817  TEXT_LUMA,            ///< luma
818  TEXT_CHROMA,          ///< chroma (U+V)
819  TEXT_CHROMA_U,        ///< chroma U
820  TEXT_CHROMA_V,        ///< chroma V
821  TEXT_ALL,             ///< Y+U+V
822  TEXT_NONE = 15
823};
824
825/// reference list index
826enum RefPicList
827{
828  REF_PIC_LIST_0 = 0,   ///< reference list 0
829  REF_PIC_LIST_1 = 1,   ///< reference list 1
830  REF_PIC_LIST_X = 100  ///< special mark
831};
832
833/// distortion function index
834enum DFunc
835{
836  DF_DEFAULT  = 0,
837  DF_SSE      = 1,      ///< general size SSE
838  DF_SSE4     = 2,      ///<   4xM SSE
839  DF_SSE8     = 3,      ///<   8xM SSE
840  DF_SSE16    = 4,      ///<  16xM SSE
841  DF_SSE32    = 5,      ///<  32xM SSE
842  DF_SSE64    = 6,      ///<  64xM SSE
843  DF_SSE16N   = 7,      ///< 16NxM SSE
[608]844 
[2]845  DF_SAD      = 8,      ///< general size SAD
846  DF_SAD4     = 9,      ///<   4xM SAD
847  DF_SAD8     = 10,     ///<   8xM SAD
848  DF_SAD16    = 11,     ///<  16xM SAD
849  DF_SAD32    = 12,     ///<  32xM SAD
850  DF_SAD64    = 13,     ///<  64xM SAD
851  DF_SAD16N   = 14,     ///< 16NxM SAD
[608]852 
[2]853  DF_SADS     = 15,     ///< general size SAD with step
854  DF_SADS4    = 16,     ///<   4xM SAD with step
855  DF_SADS8    = 17,     ///<   8xM SAD with step
856  DF_SADS16   = 18,     ///<  16xM SAD with step
857  DF_SADS32   = 19,     ///<  32xM SAD with step
858  DF_SADS64   = 20,     ///<  64xM SAD with step
859  DF_SADS16N  = 21,     ///< 16NxM SAD with step
[608]860 
[2]861  DF_HADS     = 22,     ///< general size Hadamard with step
862  DF_HADS4    = 23,     ///<   4xM HAD with step
863  DF_HADS8    = 24,     ///<   8xM HAD with step
864  DF_HADS16   = 25,     ///<  16xM HAD with step
865  DF_HADS32   = 26,     ///<  32xM HAD with step
866  DF_HADS64   = 27,     ///<  64xM HAD with step
867  DF_HADS16N  = 28,     ///< 16NxM HAD with step
[608]868#if H_3D_VSO
[100]869  DF_VSD      = 29,      ///< general size VSD
870  DF_VSD4     = 30,      ///<   4xM VSD
871  DF_VSD8     = 31,      ///<   8xM VSD
872  DF_VSD16    = 32,      ///<  16xM VSD
873  DF_VSD32    = 33,      ///<  32xM VSD
874  DF_VSD64    = 34,      ///<  64xM VSD
875  DF_VSD16N   = 35,      ///< 16NxM VSD
876#endif
877
[56]878#if AMP_SAD
879  DF_SAD12    = 43,
880  DF_SAD24    = 44,
881  DF_SAD48    = 45,
882
883  DF_SADS12   = 46,
884  DF_SADS24   = 47,
885  DF_SADS48   = 48,
886
887  DF_SSE_FRAME = 50     ///< Frame-based SSE
888#else
[2]889  DF_SSE_FRAME = 33     ///< Frame-based SSE
[56]890#endif
[2]891};
892
893/// index for SBAC based RD optimization
894enum CI_IDX
895{
896  CI_CURR_BEST = 0,     ///< best mode index
897  CI_NEXT_BEST,         ///< next best index
898  CI_TEMP_BEST,         ///< temporal index
899  CI_CHROMA_INTRA,      ///< chroma intra index
900  CI_QT_TRAFO_TEST,
901  CI_QT_TRAFO_ROOT,
902  CI_NUM,               ///< total number
903};
904
905/// motion vector predictor direction used in AMVP
906enum MVP_DIR
907{
908  MD_LEFT = 0,          ///< MVP of left block
909  MD_ABOVE,             ///< MVP of above block
910  MD_ABOVE_RIGHT,       ///< MVP of above right block
911  MD_BELOW_LEFT,        ///< MVP of below left block
912  MD_ABOVE_LEFT         ///< MVP of above left block
913};
914
[950]915/// merging candidates
[976]916#if H_3D
[950]917enum DefaultMergCandOrder
918{
919  MRG_T = 0,            ///< MPI
920  MRG_D,                ///< DDD
921  MRG_IVMC,             ///< Temporal inter-view
922  MRG_A1,               ///< Left
923  MRG_B1,               ///< Above
924  MRG_B0,               ///< Above right
925  MRG_IVDC,             ///< Disparity inter-view
926  MRG_VSP,              ///< VSP
927  MRG_A0,               ///< Left bottom
928  MRG_B2,               ///< Above left
929  MRG_IVSHIFT,          ///< Shifted IVMC of Shifted IVDC. (These are mutually exclusive)
930  MRG_COL               ///< Temporal co-located
931};
932#endif
933
[2]934/// coefficient scanning type used in ACS
935enum COEFF_SCAN_TYPE
936{
[608]937  SCAN_DIAG = 0,         ///< up-right diagonal scan
938  SCAN_HOR,              ///< horizontal first scan
939  SCAN_VER               ///< vertical first scan
[2]940};
941
[608]942namespace Profile
[56]943{
[608]944  enum Name
945  {
946    NONE = 0,
947    MAIN = 1,
948    MAIN10 = 2,
949    MAINSTILLPICTURE = 3,
950#if H_MV
951    MAINSTEREO = 4,
952    MAINMULTIVIEW = 5,
953#if H_3D
954    MAIN3D = 6, 
955#endif
956#endif
957  };
958}
[56]959
[608]960namespace Level
961{
962  enum Tier
963  {
964    MAIN = 0,
965    HIGH = 1,
966  };
967
968  enum Name
969  {
970    NONE     = 0,
971    LEVEL1   = 30,
972    LEVEL2   = 60,
973    LEVEL2_1 = 63,
974    LEVEL3   = 90,
975    LEVEL3_1 = 93,
976    LEVEL4   = 120,
977    LEVEL4_1 = 123,
978    LEVEL5   = 150,
979    LEVEL5_1 = 153,
980    LEVEL5_2 = 156,
981    LEVEL6   = 180,
982    LEVEL6_1 = 183,
983    LEVEL6_2 = 186,
984  };
985}
[56]986//! \}
987
[608]988#if H_MV
[738]989
[608]990/// scalability types
991  enum ScalabilityType
992  {
[622]993#if H_3D
994    DEPTH_ID = 0,   
995#endif   
996    VIEW_ORDER_INDEX  = 1,
[608]997  };
[2]998#endif
[608]999#if H_3D
1000  // Renderer
1001  enum BlenMod
1002  {
1003    BLEND_NONE  = -1,
1004    BLEND_AVRG  = 0,
1005    BLEND_LEFT  = 1,
1006    BLEND_RIGHT = 2,
1007    BLEND_GEN   =  3
1008  };
[2]1009
[608]1010 
1011  enum
1012  {
1013    VIEWPOS_INVALID = -1,
1014    VIEWPOS_LEFT    = 0,
1015    VIEWPOS_RIGHT   = 1,
1016    VIEWPOS_MERGED  = 2
1017  };
[56]1018
[773]1019#define Log2( n ) ( log((double)n) / log(2.0) ) // Ed.(GT): This is very very bad and should be fixed to used integer arithmetics ( see gCeilLog2 ) moreover it should not be defined in the tool macro section!
[608]1020#endif
1021#endif
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