source: 3DVCSoftware/branches/HTM-10.2-dev3-Hisilicon/source/Lib/TLibCommon/TypeDef.h @ 928

Last change on this file since 928 was 928, checked in by hisilicon-htm, 10 years ago

Integration of H0108 "Clean-up on DMM and SDC DC value derivation"

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33
34/** \file     TypeDef.h
35    \brief    Define basic types, new types and enumerations
36*/
37
38#ifndef _TYPEDEF__
39#define _TYPEDEF__
40
41//! \ingroup TLibCommon
42//! \{
43/////////////////////////////////////////////////////////////////////////////////////////
44///////////////////////////////// EXTENSION SELECTION /////////////////////////////////// 
45/////////////////////////////////////////////////////////////////////////////////////////
46
47/* HEVC_EXT might be defined by compiler/makefile options.
48   
49   Linux makefiles support the following settings:   
50   make             -> HEVC_EXT not defined   
51   make HEVC_EXT=0  -> H_MV=0 H_3D=0   --> plain HM
52   make HEVC_EXT=1  -> H_MV=1 H_3D=0   --> MV only
53   make HEVC_EXT=2  -> H_MV=1 H_3D=1   --> full 3D
54*/
55
56#ifndef HEVC_EXT
57#define HEVC_EXT                    2
58#endif
59
60#if ( HEVC_EXT < 0 )||( HEVC_EXT > 2 )
61#error HEVC_EXT must be in the range of 0 to 2, inclusive.
62#endif
63
64#define H_MV          ( HEVC_EXT != 0)
65#define H_3D          ( HEVC_EXT == 2)
66
67#define NTT_BUG_FIX_TK54    1
68
69
70/////////////////////////////////////////////////////////////////////////////////////////
71///////////////////////////////////   MAJOR DEFINES   /////////////////////////////////// 
72/////////////////////////////////////////////////////////////////////////////////////////
73
74#if H_MV
75#define H_MV_ENC_DEC_TRAC                 1  //< CU/PU level tracking
76#endif
77
78#if H_3D
79#define H_3D_QTLPC                        1   // OL_QTLIMIT_PREDCODING_B0068 //JCT3V-B0068
80                                              // HHI_QTLPC_RAU_OFF_C0160 JCT3V-C0160 change 2: quadtree limitation and predictive coding switched off in random access units
81                                              // MTK_TEX_DEP_PAR_G0055 Texture-partition-dependent depth partition. JCT3V-G0055
82
83#define H_3D_VSO                          1   // VSO, View synthesis optimization, includes:
84                                              // HHI_VSO
85                                              // HHI_VSO_LS_TABLE_M23714 enable table base Lagrange multiplier optimization
86                                              // SAIT_VSO_EST_A0033, JCT3V-A0033 modification 3
87                                              // LGE_WVSO_A0119
88                                              // SCU_HS_VSD_BUGFIX_IMPROV_G0163
89#define H_3D_NBDV                         1   // Neighboring block disparity derivation
90                                              // QC_JCT3V-A0097
91                                              // LGE_DVMCP_A0126
92                                              // LGE_DVMCP_MEM_REDUCTION_B0135     
93                                              // QC_SIMPLE_NBDV_B0047
94                                              // FIX_LGE_DVMCP_B0133
95                                              // QC_NBDV_LDB_FIX_C0055
96                                              // MTK_SAIT_TEMPORAL_FIRST_ORDER_C0141_C0097
97                                              // MTK_SIMPLIFY_DVTC_C0135           
98                                              // QC_CU_NBDV_D0181
99                                              // SEC_DEFAULT_DV_D0112
100                                              // MTK_DVMCP_FIX_E0172       fix the mismatch between software and WD for DV derivation from DVMCP blocks, issue 2 in JCT3V-E0172
101                                              // SEC_SIMPLIFIED_NBDV_E0142 Simplified NBDV, JCT3V-E0142 and JCT3V-E0190
102                                              // MTK_NBDV_TN_FIX_E0172     fix the issue of DV derivation from the temporal neighboring blocks, issue 7 in JCT3V-E0172
103                                              // MTK_TEXTURE_MRGCAND_BUGFIX_E0182  Bug fix for TEXTURE MERGING CANDIDATE     , JCT3V-E0182
104#define H_3D_ARP                          1   // Advanced residual prediction (ARP), JCT3V-D0177
105                                              // QC_MTK_INTERVIEW_ARP_F0123_F0108 JCT3V-F0123; JCT3V-F0108
106                                              // SHARP_ARP_REF_CHECK_F0105        ARP reference picture selection and DPB check
107                                              // LGE_ARP_CTX_F0161                JCT3V-F0161
108                                              // MTK_ARP_FLAG_CABAC_SIMP_G0061 Use 2 context for ARP flag referring to only left neighbor block in JCT3V-G0061
109                                              // MTK_ARP_REF_SELECTION_G0053 ARP Reference picture selection in JCT3V-G0053
110
111#define H_3D_IC                           1   // Illumination Compensation, JCT3V-B0045, JCT3V-C0046, JCT3V-D0060
112                                              // Unifying rounding offset, for IC part, JCT3V-D0135
113                                              // Full Pel Interpolation for Depth, HHI_FULL_PEL_DEPTH_MAP_MV_ACC
114                                              // SHARP_ILLUCOMP_REFINE_E0046
115                                              // MTK_CLIPPING_ALIGN_IC_E0168       // To support simplify bi-prediction PU with identical motion checking, JCT3V-E0168
116                                              // LGE_IC_CTX_F0160 //JCT3V-F0160
117                                              // SEC_ONLY_TEXTURE_IC_F0151
118                                              // MTK_IC_FLAG_CABAC_SIMP_G0061
119                                              // SEC_IC_ARP_SIG_G0072, Disabling IC when ARP is enabled, option 1 in JCT3V-G0072, part 2 in JCT3V-G0121
120
121#define MTK_LOW_LATENCY_IC_ENCODING_H0086   1 // Low-latency IC encoding in JCT3V-H0086
122#if MTK_LOW_LATENCY_IC_ENCODING_H0086
123#define MTK_LOW_LATENCY_IC_ENCODING_THRESHOLD_H0086    0.1 // Threshold for low-latency IC encoding in JCT3V-H0086
124#endif
125
126#if H_3D_NBDV
127#define H_3D_NBDV_REF                     1   // Depth oriented neighboring block disparity derivation
128                                              // MTK_D0156
129                                              // MERL_D0166: Reference view selection in NBDV & Bi-VSP
130                                              // MERL_C0152: Basic VSP
131                                              // NBDV_DEFAULT_VIEWIDX_BUGFIX Bug fix for invalid default view index for NBDV
132                                              // NTT_DoNBDV_VECTOR_CLIP_E0141 disparity vector clipping in DoNBDV, JCT3V-E0141 and JCT3V-E0209
133#endif
134
135#define H_3D_VSP                          1   // View synthesis prediction
136                                              // MERL_C0152: Basic VSP
137                                              // MERL_D0166: Reference view selection in NBDV & Bi-VSP
138                                              // MTK_D0105, LG_D0139: No VSP for depth
139                                              // QC_D0191: Clean up
140                                              // LG_D0092: Multiple VSP candidate allowed
141                                              // MTK_VSP_FIX_ALIGN_WD_E0172
142                                              // NTT_VSP_ADAPTIVE_SPLIT_E0207 adaptive sub-PU partitioning in VSP, JCT3V-E0207
143                                              // NTT_VSP_DC_BUGFIX_E0208 bugfix for sub-PU based DC in VSP, JCT3V-E0208
144                                              // NTT_VSP_COMMON_E0207_E0208 common part of JCT3V-E0207 and JCT3V-E0208
145                                              // MTK_F0109_LG_F0120_VSP_BLOCK MTK_LG_SIMPLIFY_VSP_BLOCK_PARTITION_F0109_F0120 
146                                              // SHARP_VSP_BLOCK_IN_AMP_F0102 VSP partitioning for AMP
147                                              // MTK_VSP_SIMPLIFICATION_F0111 1. Inherited VSP also use NBDV of current CU, 2. VSP cannot be inherited from above LCU rowss
148                                              // LGE_SHARP_VSP_INHERIT_F0104
149                                              // NTT_STORE_SPDV_VSP_G0148 Storing Sub-PU based DV for VSP
150                                              // Restricted bi-prediction for VSP
151
152#define H_3D_IV_MERGE                     1   // Inter-view motion merge candidate
153                                              // HHI_INTER_VIEW_MOTION_PRED
154                                              // SAIT_IMPROV_MOTION_PRED_M24829, improved inter-view motion vector prediction
155                                              // QC_MRG_CANS_B0048             , JCT3V-B0048, B0086, B0069
156                                              // OL_DISMV_POS_B0069            , different pos for disparity MV candidate, B0069
157                                              // MTK_INTERVIEW_MERGE_A0049     , second part
158                                              // QC_AMVP_MRG_UNIFY_IVCAN_C0051     
159                                              // TEXTURE MERGING CANDIDATE     , JCT3V-C0137
160                                              // QC_INRIA_MTK_MRG_E0126
161                                              // ETRIKHU_MERGE_REUSE_F0093 QC_DEPTH_IV_MRG_F0125, JCT3V-F0125: Depth oriented Inter-view MV candidate
162                                              // EC_MPI_ENABLING_MERGE_F0150, MPI flag in VPS and enabling in Merge mode
163                                              // MTK_NBDV_IVREF_FIX_G0067      , Disable IvMC, VSP when IVREF is not available, JCT3V-G0067
164                                              // SEC_DEPTH_DV_DERIVAITON_G0074, Simplification of DV derivation for depth, JCT3V-G0074
165                                              // QC_DEPTH_MERGE_SIMP_G0127 Remove DV candidate and shifting candidate for depth coding
166
167#define H_3D_TMVP                         1   // QC_TMVP_C0047
168                                              // Sony_M23639
169
170#define H_3D_DIM                          1   // DIM, Depth intra modes, includes:
171                                              // HHI_DMM_WEDGE_INTRA
172                                              // HHI_DMM_PRED_TEX
173                                              // FIX_WEDGE_NOFLOAT_D0036
174                                              // LGE_EDGE_INTRA_A0070
175                                              // LGE_DMM3_SIMP_C0044
176                                              // QC_DC_PREDICTOR_D0183
177                                              // HHI_DELTADC_DLT_D0035
178                                              // PKU_QC_DEPTH_INTRA_UNI_D0195
179                                              // RWTH_SDC_DLT_B0036
180                                              // INTEL_SDC64_D0193
181                                              // RWTH_SDC_CTX_SIMPL_D0032
182                                              // LGE_CONCATENATE_D0141
183                                              // FIX_SDC_ENC_RD_WVSO_D0163
184                                              // MTK_SAMPLE_BASED_SDC_D0110
185                                              // SEC_DMM2_E0146_HHIFIX Removal of DMM2 from DMMs
186                                              // ZJU_DEPTH_INTRA_MODE_E0204 Simplified Binarization for depth_intra_mode
187                                              // KWU_SDC_SIMPLE_DC_E0117 Simplified DC calculation for SDC
188                                              // SCU_HS_DMM4_REMOVE_DIV_E0242 DMM4 Division Removal
189                                              // LGE_SDC_REMOVE_DC_E0158 Removal of DC mode from SDC
190                                              // LGE_PKU_DMM3_OVERLAP_E0159_HHIFIX 1   Removal of overlap between DMM3 and DMM1
191                                              // LGE_PRED_RES_CODING_DLT_DOMAIN_F0159 JCT3V-F0159
192                                              // HHI_DIM_PREDSAMP_FIX_F0171
193                                              // SEC_DMM3_RBC_F0147 Removal of DMM3 and RBC from DMMs
194                                              // QC_DIM_DELTADC_UNIFY_F0132 Unify delta DC coding in depth intra modes
195                                              // Unify intra SDC and inter SDC
196                                              // QC_GENERIC_SDC_G0122 Generalize SDC to all depth intra modes
197                                              // SCU_HS_DEPTH_DC_PRED_G0143
198                                              // HS_TSINGHUA_SDC_SPLIT_G0111
199                                              // QC_PKU_SDC_SPLIT_G0123 Intra SDC Split
200#define MTK_DELTA_DC_FLAG_ONE_CONTEXT_H0084_H0100_H0113     1 // Use only one context for CABAC of delta_dc_flag as in JCTVC-H0084, JCTVC-H0100 and JCTVC-H0113
201#define MTK_SDC_FLAG_FIX_H0095            1   // Remove conditional check of PCM flag based on SDC flag, JCTVC-H0095
202
203#define MTK_DMM_SIMP_CODE_H0092           1   // Remove CABAC context for DMM1 mode coding
204
205#define H_3D_INTER_SDC                    1   // INTER SDC, Inter simplified depth coding
206                                              // LGE_INTER_SDC_E0156 Enable inter SDC for depth coding
207                                              // SEC_INTER_SDC_G0101 Improved inter SDC with multiple DC candidates
208
209#define H_3D_SPIVMP                       1   // H_3D_SPIVMP    // JCT3V-F0110: Sub-PU level inter-view motion prediction
210                                              // SEC_SPIVMP_MCP_SIZE_G0077, Apply SPIVMP only to 2Nx2N partition, JCT3V-G0077
211                                              // QC_SPIVMP_MPI_G0119 Sub-PU level MPI merge candidate
212                                              // Simplification on Sub-PU level temporal interview motion prediction
213
214
215#define H_3D_DBBP                         1   // DBBP: Depth-based Block Partitioning and Merging
216
217#define H_3D_DDD                          1   // Disparity derived depth coding
218
219#define H_3D_FCO                          0   // Flexible coding order for 3D
220
221
222
223// OTHERS
224                                              // MTK_SONY_PROGRESSIVE_MV_COMPRESSION_E0170 // Progressive MV Compression, JCT3V-E0170
225#define H_3D_REN_MAX_DEV_OUT              0   // Output maximal possible shift deviation
226#define H_3D_FAST_TEXTURE_ENCODING        1   // Fast merge mode decision and early CU determination for texture component of dependent view, JCT3V-E0173
227                                              // MTK_FAST_TEXTURE_ENCODING_E0173
228#define QC_IV_PRED_CONSTRAINT_H0137       1   // Constraint on inter-view (motion) prediction tools
229#if H_3D_DIM
230#define H_3D_FAST_DEPTH_INTRA             1   // Fast DMM and RBC Mode Selection
231                                              // SCU_HS_FAST_DEPTH_INTRA_E0238_HHIFIX
232#endif
233
234// Rate Control
235#define KWU_FIX_URQ                       1
236#define KWU_RC_VIEWRC_E0227               0  ///< JCT3V-E0227, view-wise target bitrate allocation
237#define KWU_RC_MADPRED_E0227              0  ///< JCT3V-E0227, inter-view MAD prediction
238
239#endif // H_3D
240
241
242
243/////////////////////////////////////////////////////////////////////////////////////////
244///////////////////////////////////   DERIVED DEFINES /////////////////////////////////// 
245/////////////////////////////////////////////////////////////////////////////////////////
246
247///// ***** VIEW SYNTHESIS OPTIMIZAION *********
248#if H_3D_VSO                                 
249#define H_3D_VSO_DIST_INT                 1   // Allow negative synthesized view distortion change
250#define H_3D_VSO_COLOR_PLANES             1   // Compute VSO distortion on color planes
251#define H_3D_VSO_EARLY_SKIP               1   // LGE_VSO_EARLY_SKIP_A0093, A0093 modification 4
252#define H_3D_VSO_RM_ASSERTIONS            0   // Output VSO assertions
253#define H_3D_VSO_SYNTH_DIST_OUT           0   // Output of synthesized view distortion instead of depth distortion in encoder output
254#define H_3D_VSO_FIX                      0   // This fix should be enabled after verification
255#endif
256
257////   ****** NEIGHBOURING BLOCK-BASED DISPARITY VECTOR  *********
258#if H_3D_NBDV
259#define DVFROM_LEFT                       0
260#define DVFROM_ABOVE                      1
261#define IDV_CANDS                         2
262#endif
263
264///// ***** ADVANCED INTERVIEW RESIDUAL PREDICTION *********
265#if H_3D_ARP
266#define H_3D_ARP_WFNR                     3
267#endif
268
269///// ***** DEPTH INTRA MODES *********
270#if H_3D_DIM
271#define H_3D_DIM_DMM                      1   // Depth Modeling Modes
272#define H_3D_DIM_SDC                      1   // Simplified Depth Coding method
273#define H_3D_DIM_DLT                      1   // Depth Lookup Table
274
275#define HS_DMM_SDC_PREDICTOR_UNIFY_H0108  1   // Unification of DMM and SDC predictor derivation
276#define LGE_SIMP_DIM_NOT_PRESENT_FLAG_CODING_H0119_H0135  1 // Use only one context for CABAC of dim_not_present_flag
277#define QC_SIMP_DELTADC_CODING_H0131      1   // Simplify detaDC entropy coding
278#if H_3D_DIM_DLT
279#define H_3D_DELTA_DLT                    1
280#endif
281#define H_3D_DIM_ENC                      1   // Depth Intra encoder optimizations, includes:
282                                              // HHI_DEPTH_INTRA_SEARCH_RAU_C0160
283                                              // LG_ZEROINTRADEPTHRESI_A0087
284#endif
285///// ***** VIEW SYNTHESIS PREDICTION *********
286#if H_3D_VSP
287#define H_3D_VSP_BLOCKSIZE                4   // Supported values: 1, 2, and 4
288#if H_3D_VSP_BLOCKSIZE == 1
289#define H_3D_VSP_CONSTRAINED              1   // Constrained VSP @ 1x1
290#else
291#define H_3D_VSP_CONSTRAINED              0
292#endif
293#endif
294
295
296///// ***** ILLUMATION COMPENSATION *********
297#if H_3D_IC
298#define IC_REG_COST_SHIFT                 7
299#define IC_CONST_SHIFT                    5
300#define IC_SHIFT_DIFF                     12
301#endif
302
303
304///// ***** DEPTH BASED BLOCK PARTITIONING *********
305#if H_3D_DBBP
306#define DBBP_INVALID_SHORT                (-4)
307#define RWTH_DBBP_PACK_MODE               SIZE_2NxN
308#endif
309
310
311///// ***** FCO *********
312#if H_3D_FCO
313#define H_3D_FCO_VSP_DONBDV_E0163               1   // Adaptive depth reference for flexible coding order
314#else
315#define H_3D_FCO_VSP_DONBDV_E0163               0   // Adaptive depth reference for flexible coding order
316#endif
317
318#if H_3D
319#define PPS_FIX_DEPTH                           1
320#endif
321
322/////////////////////////////////////////////////////////////////////////////////////////
323///////////////////////////////////   TBD                  //////////////////////////////
324/////////////////////////////////////////////////////////////////////////////////////////
325
326// #define H_MV_HLS_7_POC_P0041_3            0 // (POC/P0041/POC reset) #3 It was remarked that we should require each non-IRAP picture that has discardable_flag equal to 1 to have NUT value indicating that it is a sub-layer non-reference picture. This was agreed. Decision: Adopt (with constraint for discardable_flag as described above)
327// #define H_MV_HLS_7_POC_P0041_FIXES        0 // (POC/P0041/Fixes) For each non-IRAP picture that has discardable_flag equal to 1 to have NUT value indicating that it is a sub-layer non-reference picture.
328// #define H_MV_HLS_7_POC_P0056_4            0 // (POC/P0056/layer tree poc) #4 Proposal 1: If the POC reset approach is adopted as the basis for multi-layer POC derivation, it is proposed to derive the POC anchor picture from the previous TID0 picture (that is not a RASL picture, a RADL picture or a sub-layer non-reference picture and not with discardable_flag equal to 1) of  the current layer or any of its reference layer. This is asserted to improve loss resilience and reduce bit rate overhead. Decision: Adopt Proposal 1 (with the suggested modifications Ewith text provided as P0297).
329
330// #define H_MV_HLS_7_SEI_P0133_28           0 // (SEI/P0133/Recovery point SEI) #28 Decision: Adopt change to recover point semantics only (-v3)
331// #define H_MV_HLS_7_SEI_P0123_25           0 // (SEI/P0123/Alpha channel info) #25 Add alpha channel information SEI message Decision: Adopt. Constrain the bit depth indicated to be equal to the coded bit depth of the aux picture.
332
333// #define H_MV_HLS_7_HRD_P0138_6            0 // (HRD/P0138/HRD parameters for bitstreams excluding) #6 Decision: Adopt (as revised in updated contribution, with the specification of a flag in the BP SEI (HRD/P0192/sub-DPB) #12 Establish sub-DPBs based on the representation format indicated at the VPS level. It was suggested that the expressed shared capacity limit would need to be less than or equal to the sum of the individual capacity limits. Decision: Adopt as modified. Further study is encouraged on profile/level constraint selections.
334// #define H_MV_HLS_7_OTHER_P0187_1          0 // (OTHER/P0187/NoOutputOfPriorPicsFlag) #1 Inference of NoOutputOfPriorPicsFlag and proposes to take into account colour format and bit depth for the inference in addition to spatial resolution
335// #define H_MV_HLS_7_VPS_P0300_27           0 // Output part only. (VPS/P0300/alt output layer flag) #27 Change alt output layer flag to be signalled within the loop of output layer sets, from JCTVC-P0300-v2. Decision: Adopt.
336
337#define H_MV_HLS7_GEN                        0  // General changes (not tested)
338
339
340
341/////////////////////////////////////////////////////////////////////////////////////////
342///////////////////////////////////   HM RELATED DEFINES ////////////////////////////////
343/////////////////////////////////////////////////////////////////////////////////////////
344#define BUGFIX_INTRAPERIOD 1
345#define SAO_ENCODE_ALLOW_USE_PREDEBLOCK 1
346
347#define FIX1172 1 ///< fix ticket #1172
348
349#define MAX_NUM_PICS_IN_SOP           1024
350
351#define MAX_NESTING_NUM_OPS         1024
352#define MAX_NESTING_NUM_LAYER       64
353
354#define MAX_VPS_NUM_HRD_PARAMETERS                1
355#define MAX_VPS_OP_SETS_PLUS1                     1024
356#if H_MV
357#define MAX_VPS_NUH_LAYER_ID_PLUS1  63
358#define MAX_NUM_SCALABILITY_TYPES   16
359#define ENC_CFG_CONSOUT_SPACE       29           
360#else
361#define MAX_VPS_NUH_RESERVED_ZERO_LAYER_ID_PLUS1  1
362#endif
363
364
365#define MAX_CPB_CNT                     32  ///< Upper bound of (cpb_cnt_minus1 + 1)
366#if H_MV
367#define MAX_NUM_LAYER_IDS               63
368#define MAX_NUM_LAYERS                  63
369#define MAX_VPS_PROFILE_TIER_LEVEL      64
370#define MAX_VPS_ADD_OUTPUT_LAYER_SETS   1024
371#define MAX_VPS_OUTPUTLAYER_SETS        ( MAX_VPS_ADD_OUTPUT_LAYER_SETS + MAX_VPS_OP_SETS_PLUS1 )
372#define  MAX_NUM_VIDEO_SIGNAL_INFO      16
373#define MAX_NUM_SCALED_REF_LAYERS       MAX_NUM_LAYERS-1
374#define MAX_NUM_BSP_HRD_PARAMETERS      100 ///< Maximum value is actually not specified
375#define MAX_NUM_BITSTREAM_PARTITIONS    100 ///< Maximum value is actually not specified
376#define MAX_NUM_BSP_SCHED_COMBINATION   100 ///< Maximum value is actually not specified
377#define MAX_SUB_STREAMS                 1024
378#else
379#define MAX_NUM_LAYER_IDS                64
380#endif
381
382#define COEF_REMAIN_BIN_REDUCTION        3 ///< indicates the level at which the VLC
383                                           ///< transitions from Golomb-Rice to TU+EG(k)
384
385#define CU_DQP_TU_CMAX 5                   ///< max number bins for truncated unary
386#define CU_DQP_EG_k 0                      ///< expgolomb order
387
388#define SBH_THRESHOLD                    4  ///< I0156: value of the fixed SBH controlling threshold
389 
390#define SEQUENCE_LEVEL_LOSSLESS           0  ///< H0530: used only for sequence or frame-level lossless coding
391
392#define DISABLING_CLIP_FOR_BIPREDME         1  ///< Ticket #175
393 
394#define C1FLAG_NUMBER               8 // maximum number of largerThan1 flag coded in one chunk :  16 in HM5
395#define C2FLAG_NUMBER               1 // maximum number of largerThan2 flag coded in one chunk:  16 in HM5
396#define SAO_ENCODING_CHOICE              1  ///< I0184: picture early termination
397#if SAO_ENCODING_CHOICE
398#define SAO_ENCODING_RATE                0.75
399#define SAO_ENCODING_CHOICE_CHROMA       1 ///< J0044: picture early termination Luma and Chroma are handled separately
400#if SAO_ENCODING_CHOICE_CHROMA
401#define SAO_ENCODING_RATE_CHROMA         0.5
402#endif
403#endif
404
405#define MAX_NUM_VPS                16
406#define MAX_NUM_SPS                16
407#define MAX_NUM_PPS                64
408
409#define RDOQ_CHROMA_LAMBDA          1   ///< F386: weighting of chroma for RDOQ
410
411#define MIN_SCAN_POS_CROSS          4
412
413#define FAST_BIT_EST                1   ///< G763: Table-based bit estimation for CABAC
414
415#define MLS_GRP_NUM                         64     ///< G644 : Max number of coefficient groups, max(16, 64)
416#define MLS_CG_SIZE                         4      ///< G644 : Coefficient group size of 4x4
417
418#define ADAPTIVE_QP_SELECTION               1      ///< G382: Adaptive reconstruction levels, non-normative part for adaptive QP selection
419#if ADAPTIVE_QP_SELECTION
420#define ARL_C_PRECISION                     7      ///< G382: 7-bit arithmetic precision
421#define LEVEL_RANGE                         30     ///< G382: max coefficient level in statistics collection
422#endif
423
424#define HHI_RQT_INTRA_SPEEDUP             1           ///< tests one best mode with full rqt
425#define HHI_RQT_INTRA_SPEEDUP_MOD         0           ///< tests two best modes with full rqt
426
427#if HHI_RQT_INTRA_SPEEDUP_MOD && !HHI_RQT_INTRA_SPEEDUP
428#error
429#endif
430
431#define VERBOSE_RATE 0 ///< Print additional rate information in encoder
432
433#define AMVP_DECIMATION_FACTOR            4
434
435#define SCAN_SET_SIZE                     16
436#define LOG2_SCAN_SET_SIZE                4
437
438#define FAST_UDI_MAX_RDMODE_NUM               35          ///< maximum number of RD comparison in fast-UDI estimation loop
439
440#define ZERO_MVD_EST                          0           ///< Zero Mvd Estimation in normal mode
441
442#define NUM_INTRA_MODE 36
443#if !REMOVE_LM_CHROMA
444#define LM_CHROMA_IDX  35
445#endif
446
447#define WRITE_BACK                      1           ///< Enable/disable the encoder to replace the deltaPOC and Used by current from the config file with the values derived by the refIdc parameter.
448#define AUTO_INTER_RPS                  1           ///< Enable/disable the automatic generation of refIdc from the deltaPOC and Used by current from the config file.
449#define PRINT_RPS_INFO                  0           ///< Enable/disable the printing of bits used to send the RPS.
450                                                    // using one nearest frame as reference frame, and the other frames are high quality (POC%4==0) frames (1+X)
451                                                    // this should be done with encoder only decision
452                                                    // but because of the absence of reference frame management, the related code was hard coded currently
453
454#define RVM_VCEGAM10_M 4
455
456#define PLANAR_IDX             0
457#define VER_IDX                26                    // index for intra VERTICAL   mode
458#define HOR_IDX                10                    // index for intra HORIZONTAL mode
459#define DC_IDX                 1                     // index for intra DC mode
460#define NUM_CHROMA_MODE        5                     // total number of chroma modes
461#define DM_CHROMA_IDX          36                    // chroma mode index for derived from luma intra mode
462
463
464#define FAST_UDI_USE_MPM 1
465
466#define RDO_WITHOUT_DQP_BITS              0           ///< Disable counting dQP bits in RDO-based mode decision
467
468#define FULL_NBIT 0 ///< When enabled, compute costs using full sample bitdepth.  When disabled, compute costs as if it is 8-bit source video.
469#if FULL_NBIT
470# define DISTORTION_PRECISION_ADJUSTMENT(x) 0
471#else
472# define DISTORTION_PRECISION_ADJUSTMENT(x) (x)
473#endif
474
475#define LOG2_MAX_NUM_COLUMNS_MINUS1        7
476#define LOG2_MAX_NUM_ROWS_MINUS1           7
477#define LOG2_MAX_COLUMN_WIDTH              13
478#define LOG2_MAX_ROW_HEIGHT                13
479
480#define MATRIX_MULT                             0   // Brute force matrix multiplication instead of partial butterfly
481
482#define REG_DCT 65535
483
484#define AMP_SAD                               1           ///< dedicated SAD functions for AMP
485#define AMP_ENC_SPEEDUP                       1           ///< encoder only speed-up by AMP mode skipping
486#if AMP_ENC_SPEEDUP
487#define AMP_MRG                               1           ///< encoder only force merge for AMP partition (no motion search for AMP)
488#endif
489
490#define CABAC_INIT_PRESENT_FLAG     1
491
492// ====================================================================================================================
493// Basic type redefinition
494// ====================================================================================================================
495
496typedef       void                Void;
497typedef       bool                Bool;
498
499#ifdef __arm__
500typedef       signed char         Char;
501#else
502typedef       char                Char;
503#endif
504typedef       unsigned char       UChar;
505typedef       short               Short;
506typedef       unsigned short      UShort;
507typedef       int                 Int;
508typedef       unsigned int        UInt;
509typedef       double              Double;
510typedef       float               Float;
511
512// ====================================================================================================================
513// 64-bit integer type
514// ====================================================================================================================
515
516#ifdef _MSC_VER
517typedef       __int64             Int64;
518
519#if _MSC_VER <= 1200 // MS VC6
520typedef       __int64             UInt64;   // MS VC6 does not support unsigned __int64 to double conversion
521#else
522typedef       unsigned __int64    UInt64;
523#endif
524
525#else
526
527typedef       long long           Int64;
528typedef       unsigned long long  UInt64;
529
530#endif
531
532// ====================================================================================================================
533// Type definition
534// ====================================================================================================================
535
536typedef       UChar           Pxl;        ///< 8-bit pixel type
537typedef       Short           Pel;        ///< 16-bit pixel type
538typedef       Int             TCoeff;     ///< transform coefficient
539
540#if H_3D_VSO
541// ====================================================================================================================
542// Define Distortion Types
543// ====================================================================================================================
544typedef       Int64           RMDist;     ///< renderer model distortion
545
546#if H_3D_VSO_DIST_INT
547typedef       Int64            Dist;       ///< RDO distortion
548typedef       Int64            Dist64; 
549#define       RDO_DIST_MIN     MIN_INT
550#define       RDO_DIST_MAX     MAX_INT
551#else
552typedef       UInt             Dist;       ///< RDO distortion
553typedef       UInt64           Dist; 
554#define       RDO_DIST_MIN     0
555#define       RDO_DIST_MAX     MAX_UINT
556#endif
557#endif
558/// parameters for adaptive loop filter
559class TComPicSym;
560
561// Slice / Slice segment encoding modes
562enum SliceConstraint
563{
564  NO_SLICES              = 0,          ///< don't use slices / slice segments
565  FIXED_NUMBER_OF_LCU    = 1,          ///< Limit maximum number of largest coding tree blocks in a slice / slice segments
566  FIXED_NUMBER_OF_BYTES  = 2,          ///< Limit maximum number of bytes in a slice / slice segment
567  FIXED_NUMBER_OF_TILES  = 3,          ///< slices / slice segments span an integer number of tiles
568};
569
570enum SAOComponentIdx
571{
572  SAO_Y =0,
573  SAO_Cb,
574  SAO_Cr,
575  NUM_SAO_COMPONENTS
576};
577
578enum SAOMode //mode
579{
580  SAO_MODE_OFF = 0,
581  SAO_MODE_NEW,
582  SAO_MODE_MERGE,
583  NUM_SAO_MODES
584};
585
586enum SAOModeMergeTypes
587{
588  SAO_MERGE_LEFT =0,
589  SAO_MERGE_ABOVE,
590  NUM_SAO_MERGE_TYPES
591};
592
593
594enum SAOModeNewTypes
595{
596  SAO_TYPE_START_EO =0,
597  SAO_TYPE_EO_0 = SAO_TYPE_START_EO,
598  SAO_TYPE_EO_90,
599  SAO_TYPE_EO_135,
600  SAO_TYPE_EO_45,
601
602  SAO_TYPE_START_BO,
603  SAO_TYPE_BO = SAO_TYPE_START_BO,
604
605  NUM_SAO_NEW_TYPES
606};
607#define NUM_SAO_EO_TYPES_LOG2 2
608
609enum SAOEOClasses
610{
611  SAO_CLASS_EO_FULL_VALLEY = 0,
612  SAO_CLASS_EO_HALF_VALLEY = 1,
613  SAO_CLASS_EO_PLAIN       = 2,
614  SAO_CLASS_EO_HALF_PEAK   = 3,
615  SAO_CLASS_EO_FULL_PEAK   = 4,
616  NUM_SAO_EO_CLASSES,
617};
618
619
620#define NUM_SAO_BO_CLASSES_LOG2  5
621enum SAOBOClasses
622{
623  //SAO_CLASS_BO_BAND0 = 0,
624  //SAO_CLASS_BO_BAND1,
625  //SAO_CLASS_BO_BAND2,
626  //...
627  //SAO_CLASS_BO_BAND31,
628
629  NUM_SAO_BO_CLASSES = (1<<NUM_SAO_BO_CLASSES_LOG2),
630};
631#define MAX_NUM_SAO_CLASSES  32  //(NUM_SAO_EO_GROUPS > NUM_SAO_BO_GROUPS)?NUM_SAO_EO_GROUPS:NUM_SAO_BO_GROUPS
632
633struct SAOOffset
634{
635  Int modeIdc; //NEW, MERGE, OFF
636  Int typeIdc; //NEW: EO_0, EO_90, EO_135, EO_45, BO. MERGE: left, above
637  Int typeAuxInfo; //BO: starting band index
638  Int offset[MAX_NUM_SAO_CLASSES];
639
640  SAOOffset();
641  ~SAOOffset();
642  Void reset();
643
644  const SAOOffset& operator= (const SAOOffset& src);
645};
646
647struct SAOBlkParam
648{
649
650  SAOBlkParam();
651  ~SAOBlkParam();
652  Void reset();
653  const SAOBlkParam& operator= (const SAOBlkParam& src);
654  SAOOffset& operator[](Int compIdx){ return offsetParam[compIdx];}
655private:
656  SAOOffset offsetParam[NUM_SAO_COMPONENTS];
657
658};
659
660/// parameters for deblocking filter
661typedef struct _LFCUParam
662{
663  Bool bInternalEdge;                     ///< indicates internal edge
664  Bool bLeftEdge;                         ///< indicates left edge
665  Bool bTopEdge;                          ///< indicates top edge
666} LFCUParam;
667
668// ====================================================================================================================
669// Enumeration
670// ====================================================================================================================
671
672/// supported slice type
673enum SliceType
674{
675  B_SLICE,
676  P_SLICE,
677  I_SLICE
678};
679
680/// chroma formats (according to semantics of chroma_format_idc)
681enum ChromaFormat
682{
683  CHROMA_400  = 0,
684  CHROMA_420  = 1,
685  CHROMA_422  = 2,
686  CHROMA_444  = 3
687};
688
689/// supported partition shape
690enum PartSize
691{
692  SIZE_2Nx2N,           ///< symmetric motion partition,  2Nx2N
693  SIZE_2NxN,            ///< symmetric motion partition,  2Nx N
694  SIZE_Nx2N,            ///< symmetric motion partition,   Nx2N
695  SIZE_NxN,             ///< symmetric motion partition,   Nx N
696  SIZE_2NxnU,           ///< asymmetric motion partition, 2Nx( N/2) + 2Nx(3N/2)
697  SIZE_2NxnD,           ///< asymmetric motion partition, 2Nx(3N/2) + 2Nx( N/2)
698  SIZE_nLx2N,           ///< asymmetric motion partition, ( N/2)x2N + (3N/2)x2N
699  SIZE_nRx2N,           ///< asymmetric motion partition, (3N/2)x2N + ( N/2)x2N
700  SIZE_NONE = 15
701};
702
703/// supported prediction type
704enum PredMode
705{
706  MODE_INTER,           ///< inter-prediction mode
707  MODE_INTRA,           ///< intra-prediction mode
708  MODE_NONE = 15
709};
710
711/// texture component type
712enum TextType
713{
714  TEXT_LUMA,            ///< luma
715  TEXT_CHROMA,          ///< chroma (U+V)
716  TEXT_CHROMA_U,        ///< chroma U
717  TEXT_CHROMA_V,        ///< chroma V
718  TEXT_ALL,             ///< Y+U+V
719  TEXT_NONE = 15
720};
721
722/// reference list index
723enum RefPicList
724{
725  REF_PIC_LIST_0 = 0,   ///< reference list 0
726  REF_PIC_LIST_1 = 1,   ///< reference list 1
727  REF_PIC_LIST_X = 100  ///< special mark
728};
729
730/// distortion function index
731enum DFunc
732{
733  DF_DEFAULT  = 0,
734  DF_SSE      = 1,      ///< general size SSE
735  DF_SSE4     = 2,      ///<   4xM SSE
736  DF_SSE8     = 3,      ///<   8xM SSE
737  DF_SSE16    = 4,      ///<  16xM SSE
738  DF_SSE32    = 5,      ///<  32xM SSE
739  DF_SSE64    = 6,      ///<  64xM SSE
740  DF_SSE16N   = 7,      ///< 16NxM SSE
741 
742  DF_SAD      = 8,      ///< general size SAD
743  DF_SAD4     = 9,      ///<   4xM SAD
744  DF_SAD8     = 10,     ///<   8xM SAD
745  DF_SAD16    = 11,     ///<  16xM SAD
746  DF_SAD32    = 12,     ///<  32xM SAD
747  DF_SAD64    = 13,     ///<  64xM SAD
748  DF_SAD16N   = 14,     ///< 16NxM SAD
749 
750  DF_SADS     = 15,     ///< general size SAD with step
751  DF_SADS4    = 16,     ///<   4xM SAD with step
752  DF_SADS8    = 17,     ///<   8xM SAD with step
753  DF_SADS16   = 18,     ///<  16xM SAD with step
754  DF_SADS32   = 19,     ///<  32xM SAD with step
755  DF_SADS64   = 20,     ///<  64xM SAD with step
756  DF_SADS16N  = 21,     ///< 16NxM SAD with step
757 
758  DF_HADS     = 22,     ///< general size Hadamard with step
759  DF_HADS4    = 23,     ///<   4xM HAD with step
760  DF_HADS8    = 24,     ///<   8xM HAD with step
761  DF_HADS16   = 25,     ///<  16xM HAD with step
762  DF_HADS32   = 26,     ///<  32xM HAD with step
763  DF_HADS64   = 27,     ///<  64xM HAD with step
764  DF_HADS16N  = 28,     ///< 16NxM HAD with step
765#if H_3D_VSO
766  DF_VSD      = 29,      ///< general size VSD
767  DF_VSD4     = 30,      ///<   4xM VSD
768  DF_VSD8     = 31,      ///<   8xM VSD
769  DF_VSD16    = 32,      ///<  16xM VSD
770  DF_VSD32    = 33,      ///<  32xM VSD
771  DF_VSD64    = 34,      ///<  64xM VSD
772  DF_VSD16N   = 35,      ///< 16NxM VSD
773#endif
774
775#if AMP_SAD
776  DF_SAD12    = 43,
777  DF_SAD24    = 44,
778  DF_SAD48    = 45,
779
780  DF_SADS12   = 46,
781  DF_SADS24   = 47,
782  DF_SADS48   = 48,
783
784  DF_SSE_FRAME = 50     ///< Frame-based SSE
785#else
786  DF_SSE_FRAME = 33     ///< Frame-based SSE
787#endif
788};
789
790/// index for SBAC based RD optimization
791enum CI_IDX
792{
793  CI_CURR_BEST = 0,     ///< best mode index
794  CI_NEXT_BEST,         ///< next best index
795  CI_TEMP_BEST,         ///< temporal index
796  CI_CHROMA_INTRA,      ///< chroma intra index
797  CI_QT_TRAFO_TEST,
798  CI_QT_TRAFO_ROOT,
799  CI_NUM,               ///< total number
800};
801
802/// motion vector predictor direction used in AMVP
803enum MVP_DIR
804{
805  MD_LEFT = 0,          ///< MVP of left block
806  MD_ABOVE,             ///< MVP of above block
807  MD_ABOVE_RIGHT,       ///< MVP of above right block
808  MD_BELOW_LEFT,        ///< MVP of below left block
809  MD_ABOVE_LEFT         ///< MVP of above left block
810};
811
812/// coefficient scanning type used in ACS
813enum COEFF_SCAN_TYPE
814{
815  SCAN_DIAG = 0,         ///< up-right diagonal scan
816  SCAN_HOR,              ///< horizontal first scan
817  SCAN_VER               ///< vertical first scan
818};
819
820namespace Profile
821{
822  enum Name
823  {
824    NONE = 0,
825    MAIN = 1,
826    MAIN10 = 2,
827    MAINSTILLPICTURE = 3,
828#if H_MV
829    MAINSTEREO = 4,
830    MAINMULTIVIEW = 5,
831#if H_3D
832    MAIN3D = 6, 
833#endif
834#endif
835  };
836}
837
838namespace Level
839{
840  enum Tier
841  {
842    MAIN = 0,
843    HIGH = 1,
844  };
845
846  enum Name
847  {
848    NONE     = 0,
849    LEVEL1   = 30,
850    LEVEL2   = 60,
851    LEVEL2_1 = 63,
852    LEVEL3   = 90,
853    LEVEL3_1 = 93,
854    LEVEL4   = 120,
855    LEVEL4_1 = 123,
856    LEVEL5   = 150,
857    LEVEL5_1 = 153,
858    LEVEL5_2 = 156,
859    LEVEL6   = 180,
860    LEVEL6_1 = 183,
861    LEVEL6_2 = 186,
862  };
863}
864//! \}
865
866#if H_MV
867
868enum PpsExtensionTypes
869{
870  PPS_EX_T_MV      = 0,
871#if H_3D
872  PPS_EX_T_3D      = 3,
873#endif
874  PPS_EX_T_ESC     = 7,
875  PPS_EX_T_MAX_NUM = 8
876};
877
878//Below for sps, would be good if this could be aligned
879
880  enum PsExtensionTypes
881  {
882    PS_EX_T_MV   = 1,
883#if H_3D
884    PS_EX_T_3D   = 3,
885#endif
886    PS_EX_T_ESC  = 7,
887    PS_EX_T_MAX_NUM = 8
888  };
889
890/// scalability types
891  enum ScalabilityType
892  {
893#if H_3D
894    DEPTH_ID = 0,   
895#endif   
896    VIEW_ORDER_INDEX  = 1,
897  };
898#endif
899#if H_3D
900  // Renderer
901  enum BlenMod
902  {
903    BLEND_NONE  = -1,
904    BLEND_AVRG  = 0,
905    BLEND_LEFT  = 1,
906    BLEND_RIGHT = 2,
907    BLEND_GEN   =  3
908  };
909
910 
911  enum
912  {
913    VIEWPOS_INVALID = -1,
914    VIEWPOS_LEFT    = 0,
915    VIEWPOS_RIGHT   = 1,
916    VIEWPOS_MERGED  = 2
917  };
918
919#define Log2( n ) ( log((double)n) / log(2.0) ) // Ed.(GT): This is very very bad and should be fixed to used integer arithmetics ( see gCeilLog2 ) moreover it should not be defined in the tool macro section!
920#endif
921#endif
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