[5] | 1 | /* The copyright in this software is being made available under the BSD |
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| 2 | * License, included below. This software may be subject to other third party |
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| 3 | * and contributor rights, including patent rights, and no such rights are |
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[56] | 4 | * granted under this license. |
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[5] | 5 | * |
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[852] | 6 | * Copyright (c) 2010-2014, ITU/ISO/IEC |
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[5] | 7 | * All rights reserved. |
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| 8 | * |
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| 9 | * Redistribution and use in source and binary forms, with or without |
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| 10 | * modification, are permitted provided that the following conditions are met: |
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| 11 | * |
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| 12 | * * Redistributions of source code must retain the above copyright notice, |
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| 13 | * this list of conditions and the following disclaimer. |
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| 14 | * * Redistributions in binary form must reproduce the above copyright notice, |
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| 15 | * this list of conditions and the following disclaimer in the documentation |
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| 16 | * and/or other materials provided with the distribution. |
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[56] | 17 | * * Neither the name of the ITU/ISO/IEC nor the names of its contributors may |
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[5] | 18 | * be used to endorse or promote products derived from this software without |
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| 19 | * specific prior written permission. |
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| 20 | * |
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| 21 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
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| 22 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
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| 23 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
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| 24 | * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS |
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| 25 | * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
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| 26 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
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| 27 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
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| 28 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
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| 29 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
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| 30 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF |
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| 31 | * THE POSSIBILITY OF SUCH DAMAGE. |
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| 32 | */ |
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[2] | 33 | |
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| 34 | /** \file ContextTables.h |
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| 35 | \brief Defines constants and tables for SBAC |
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| 36 | \todo number of context models is not matched to actual use, should be fixed |
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| 37 | */ |
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| 38 | |
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| 39 | #ifndef __CONTEXTTABLES__ |
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| 40 | #define __CONTEXTTABLES__ |
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| 41 | |
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[56] | 42 | //! \ingroup TLibCommon |
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| 43 | //! \{ |
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| 44 | |
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[2] | 45 | // ==================================================================================================================== |
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| 46 | // Constants |
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| 47 | // ==================================================================================================================== |
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| 48 | |
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[56] | 49 | #define MAX_NUM_CTX_MOD 512 ///< maximum number of supported contexts |
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| 50 | |
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[2] | 51 | #define NUM_SPLIT_FLAG_CTX 3 ///< number of context models for split flag |
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| 52 | #define NUM_SKIP_FLAG_CTX 3 ///< number of context models for skip flag |
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| 53 | |
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[56] | 54 | #define NUM_MERGE_FLAG_EXT_CTX 1 ///< number of context models for merge flag of merge extended |
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| 55 | #define NUM_MERGE_IDX_EXT_CTX 1 ///< number of context models for merge index of merge extended |
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[2] | 56 | |
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[56] | 57 | #define NUM_PART_SIZE_CTX 4 ///< number of context models for partition size |
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| 58 | #define NUM_PRED_MODE_CTX 1 ///< number of context models for prediction mode |
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[2] | 59 | |
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[56] | 60 | #define NUM_ADI_CTX 1 ///< number of context models for intra prediction |
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| 61 | |
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| 62 | #define NUM_CHROMA_PRED_CTX 2 ///< number of context models for intra prediction (chroma) |
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[608] | 63 | #define NUM_INTER_DIR_CTX 5 ///< number of context models for inter prediction direction |
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[56] | 64 | #define NUM_MV_RES_CTX 2 ///< number of context models for motion vector difference |
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[2] | 65 | |
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[608] | 66 | #define NUM_REF_NO_CTX 2 ///< number of context models for reference index |
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| 67 | #define NUM_TRANS_SUBDIV_FLAG_CTX 3 ///< number of context models for transform subdivision flags |
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[852] | 68 | #define NUM_QT_CBF_CTX 4 ///< number of context models for QT CBF |
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[56] | 69 | #define NUM_QT_ROOT_CBF_CTX 1 ///< number of context models for QT ROOT CBF |
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| 70 | #define NUM_DELTA_QP_CTX 3 ///< number of context models for dQP |
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[2] | 71 | |
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[56] | 72 | #define NUM_SIG_CG_FLAG_CTX 2 ///< number of context models for MULTI_LEVEL_SIGNIFICANCE |
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| 73 | |
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[608] | 74 | #define NUM_SIG_FLAG_CTX 42 ///< number of context models for sig flag |
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| 75 | #define NUM_SIG_FLAG_CTX_LUMA 27 ///< number of context models for luma sig flag |
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| 76 | #define NUM_SIG_FLAG_CTX_CHROMA 15 ///< number of context models for chroma sig flag |
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[56] | 77 | |
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| 78 | #define NUM_CTX_LAST_FLAG_XY 15 ///< number of context models for last coefficient position |
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[2] | 79 | |
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[56] | 80 | #define NUM_ONE_FLAG_CTX 24 ///< number of context models for greater than 1 flag |
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| 81 | #define NUM_ONE_FLAG_CTX_LUMA 16 ///< number of context models for greater than 1 flag of luma |
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| 82 | #define NUM_ONE_FLAG_CTX_CHROMA 8 ///< number of context models for greater than 1 flag of chroma |
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| 83 | #define NUM_ABS_FLAG_CTX 6 ///< number of context models for greater than 2 flag |
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| 84 | #define NUM_ABS_FLAG_CTX_LUMA 4 ///< number of context models for greater than 2 flag of luma |
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| 85 | #define NUM_ABS_FLAG_CTX_CHROMA 2 ///< number of context models for greater than 2 flag of chroma |
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| 86 | |
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[852] | 87 | #define NUM_MVP_IDX_CTX 1 ///< number of context models for MVP index |
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[2] | 88 | |
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[443] | 89 | #define NUM_SAO_MERGE_FLAG_CTX 1 ///< number of context models for SAO merge flags |
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| 90 | #define NUM_SAO_TYPE_IDX_CTX 1 ///< number of context models for SAO type index |
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[608] | 91 | |
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| 92 | #define NUM_TRANSFORMSKIP_FLAG_CTX 1 ///< number of context models for transform skipping |
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| 93 | #define NUM_CU_TRANSQUANT_BYPASS_FLAG_CTX 1 |
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| 94 | |
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| 95 | #if H_3D_ARP |
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[833] | 96 | #if MTK_ARP_FLAG_CABAC_SIMP_G0061 |
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| 97 | #define NUM_ARPW_CTX 3 ///< number of context models for weighting factor index used by advanced residual prediction |
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| 98 | #else |
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[608] | 99 | #define NUM_ARPW_CTX 4 ///< number of context models for weighting factor index used by advanced residual prediction |
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[443] | 100 | #endif |
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[833] | 101 | #endif |
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[608] | 102 | |
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| 103 | #if H_3D_IC |
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[833] | 104 | #if MTK_IC_FLAG_CABAC_SIMP_G0061 |
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| 105 | #define NUM_IC_FLAG_CTX 1 ///< number of context models for illumination compensation flag |
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| 106 | #else |
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[608] | 107 | #define NUM_IC_FLAG_CTX 3 ///< number of context models for illumination compensation flag |
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| 108 | #endif |
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[833] | 109 | #endif |
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[608] | 110 | |
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[56] | 111 | #define CNU 154 ///< dummy initialization value for unused context models 'Context model Not Used' |
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[2] | 112 | |
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[608] | 113 | #if H_3D_DIM |
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[833] | 114 | #if QC_GENERIC_SDC_G0122 |
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| 115 | #define NUM_DEPTH_INTRA_MODE_CTX 1 ///< number of context models for depth intra modes |
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| 116 | #else |
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[608] | 117 | #define NUM_DEPTH_INTRA_MODE_CTX 8 ///< number of context models for depth intra modes |
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[833] | 118 | #endif |
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[608] | 119 | #define NUM_DDC_FLAG_CTX 2 ///< number of context models for deltaDC flag (DMM or RBC) |
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[724] | 120 | #define NUM_DDC_DATA_CTX 1 ///< number of context models for deltaDC data (DMM or RBC) |
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[608] | 121 | #if H_3D_DIM_DMM |
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| 122 | #define NUM_DMM1_DATA_CTX 1 ///< number of context models for DMM1 data |
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[296] | 123 | #endif |
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[833] | 124 | #if QC_GENERIC_SDC_G0122 |
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| 125 | #define NUM_ANGLE_FLAG_CTX 3 |
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| 126 | #if !QC_SDC_UNIFY_G0130 |
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| 127 | #define NUM_INTRASDC_FLAG_CTX 3 |
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[724] | 128 | #endif |
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[833] | 129 | #endif |
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| 130 | #endif |
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[100] | 131 | |
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[608] | 132 | #if H_3D_DIM_SDC |
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[189] | 133 | #define SDC_NUM_RESIDUAL_FLAG_CTX 1 |
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[443] | 134 | #define SDC_NUM_RESIDUAL_CTX 1 |
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| 135 | #endif |
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[189] | 136 | |
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[833] | 137 | #if H_3D_INTER_SDC && !QC_SDC_UNIFY_G0130 |
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[608] | 138 | #define NUM_INTER_SDC_FLAG_CTX 1 ///< number of context models for inter SDC flag |
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| 139 | #define NUM_INTER_SDC_SIGN_FLAG_CTX 1 ///< number of context models for sign of inter SDC residual |
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| 140 | #define NUM_INTER_SDC_RESIDUAL_CTX 1 ///< number of context models for abs of inter SDC residual |
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[189] | 141 | #endif |
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[833] | 142 | |
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| 143 | #if QC_SDC_UNIFY_G0130 |
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| 144 | #define NUM_SDC_FLAG_CTX 1 ///< number of context |
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| 145 | #endif |
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| 146 | #if H_3D_DBBP |
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| 147 | #define DBBP_NUM_FLAG_CTX 1 |
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| 148 | #endif |
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[2] | 149 | // ==================================================================================================================== |
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| 150 | // Tables |
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| 151 | // ==================================================================================================================== |
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| 152 | |
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[608] | 153 | // initial probability for cu_transquant_bypass flag |
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| 154 | static const UChar |
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| 155 | INIT_CU_TRANSQUANT_BYPASS_FLAG[3][NUM_CU_TRANSQUANT_BYPASS_FLAG_CTX] = |
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| 156 | { |
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| 157 | { 154 }, |
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| 158 | { 154 }, |
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| 159 | { 154 }, |
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| 160 | }; |
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| 161 | |
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[56] | 162 | // initial probability for split flag |
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| 163 | static const UChar |
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| 164 | INIT_SPLIT_FLAG[3][NUM_SPLIT_FLAG_CTX] = |
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[2] | 165 | { |
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[608] | 166 | { 107, 139, 126, }, |
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| 167 | { 107, 139, 126, }, |
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[56] | 168 | { 139, 141, 157, }, |
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[2] | 169 | }; |
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| 170 | |
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[56] | 171 | static const UChar |
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| 172 | INIT_SKIP_FLAG[3][NUM_SKIP_FLAG_CTX] = |
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[2] | 173 | { |
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[56] | 174 | { 197, 185, 201, }, |
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| 175 | { 197, 185, 201, }, |
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[189] | 176 | { CNU, CNU, CNU, }, |
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| 177 | }; |
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| 178 | |
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[608] | 179 | static const UChar |
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[56] | 180 | INIT_MERGE_FLAG_EXT[3][NUM_MERGE_FLAG_EXT_CTX] = |
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| 181 | { |
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[608] | 182 | { 154, }, |
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| 183 | { 110, }, |
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[56] | 184 | { CNU, }, |
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| 185 | }; |
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[2] | 186 | |
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[56] | 187 | static const UChar |
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| 188 | INIT_MERGE_IDX_EXT[3][NUM_MERGE_IDX_EXT_CTX] = |
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[2] | 189 | { |
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[608] | 190 | { 137, }, |
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| 191 | { 122, }, |
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[56] | 192 | { CNU, }, |
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| 193 | }; |
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| 194 | |
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| 195 | static const UChar |
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| 196 | INIT_PART_SIZE[3][NUM_PART_SIZE_CTX] = |
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| 197 | { |
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[852] | 198 | { 154, 139, 154, 154 }, |
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| 199 | { 154, 139, 154, 154 }, |
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| 200 | { 184, CNU, CNU, CNU }, |
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[56] | 201 | }; |
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| 202 | |
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| 203 | static const UChar |
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| 204 | INIT_PRED_MODE[3][NUM_PRED_MODE_CTX] = |
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| 205 | { |
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[608] | 206 | { 134, }, |
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| 207 | { 149, }, |
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[56] | 208 | { CNU, }, |
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| 209 | }; |
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| 210 | |
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| 211 | static const UChar |
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| 212 | INIT_INTRA_PRED_MODE[3][NUM_ADI_CTX] = |
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| 213 | { |
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[608] | 214 | { 183, }, |
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| 215 | { 154, }, |
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[56] | 216 | { 184, }, |
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| 217 | }; |
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| 218 | |
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| 219 | static const UChar |
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| 220 | INIT_CHROMA_PRED_MODE[3][NUM_CHROMA_PRED_CTX] = |
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| 221 | { |
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| 222 | { 152, 139, }, |
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| 223 | { 152, 139, }, |
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[608] | 224 | { 63, 139, }, |
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[56] | 225 | }; |
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| 226 | |
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| 227 | static const UChar |
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| 228 | INIT_INTER_DIR[3][NUM_INTER_DIR_CTX] = |
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| 229 | { |
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[608] | 230 | { 95, 79, 63, 31, 31, }, |
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| 231 | { 95, 79, 63, 31, 31, }, |
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| 232 | { CNU, CNU, CNU, CNU, CNU, }, |
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[56] | 233 | }; |
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| 234 | |
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| 235 | static const UChar |
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| 236 | INIT_MVD[3][NUM_MV_RES_CTX] = |
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| 237 | { |
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[608] | 238 | { 169, 198, }, |
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| 239 | { 140, 198, }, |
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[56] | 240 | { CNU, CNU, }, |
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| 241 | }; |
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| 242 | |
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| 243 | static const UChar |
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| 244 | INIT_REF_PIC[3][NUM_REF_NO_CTX] = |
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| 245 | { |
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[608] | 246 | { 153, 153 }, |
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| 247 | { 153, 153 }, |
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| 248 | { CNU, CNU }, |
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[56] | 249 | }; |
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| 250 | |
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| 251 | static const UChar |
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| 252 | INIT_DQP[3][NUM_DELTA_QP_CTX] = |
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| 253 | { |
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| 254 | { 154, 154, 154, }, |
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| 255 | { 154, 154, 154, }, |
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| 256 | { 154, 154, 154, }, |
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| 257 | }; |
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| 258 | |
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| 259 | static const UChar |
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| 260 | INIT_QT_CBF[3][2*NUM_QT_CBF_CTX] = |
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| 261 | { |
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[852] | 262 | { 153, 111, CNU, CNU, 149, 92, 167, 154 }, |
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| 263 | { 153, 111, CNU, CNU, 149, 107, 167, 154 }, |
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| 264 | { 111, 141, CNU, CNU, 94, 138, 182, 154 }, |
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[56] | 265 | }; |
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| 266 | |
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| 267 | static const UChar |
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| 268 | INIT_QT_ROOT_CBF[3][NUM_QT_ROOT_CBF_CTX] = |
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| 269 | { |
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| 270 | { 79, }, |
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| 271 | { 79, }, |
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[608] | 272 | { CNU, }, |
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[56] | 273 | }; |
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| 274 | |
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| 275 | static const UChar |
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| 276 | INIT_LAST[3][2*NUM_CTX_LAST_FLAG_XY] = |
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| 277 | { |
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[608] | 278 | { 125, 110, 124, 110, 95, 94, 125, 111, 111, 79, 125, 126, 111, 111, 79, |
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| 279 | 108, 123, 93, CNU, CNU, CNU, CNU, CNU, CNU, CNU, CNU, CNU, CNU, CNU, CNU, |
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[56] | 280 | }, |
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[608] | 281 | { 125, 110, 94, 110, 95, 79, 125, 111, 110, 78, 110, 111, 111, 95, 94, |
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[56] | 282 | 108, 123, 108, CNU, CNU, CNU, CNU, CNU, CNU, CNU, CNU, CNU, CNU, CNU, CNU, |
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| 283 | }, |
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[608] | 284 | { 110, 110, 124, 125, 140, 153, 125, 127, 140, 109, 111, 143, 127, 111, 79, |
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| 285 | 108, 123, 63, CNU, CNU, CNU, CNU, CNU, CNU, CNU, CNU, CNU, CNU, CNU, CNU, |
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[56] | 286 | }, |
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| 287 | }; |
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| 288 | |
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| 289 | static const UChar |
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| 290 | INIT_SIG_CG_FLAG[3][2 * NUM_SIG_CG_FLAG_CTX] = |
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| 291 | { |
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[608] | 292 | { 121, 140, |
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| 293 | 61, 154, |
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[56] | 294 | }, |
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| 295 | { 121, 140, |
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| 296 | 61, 154, |
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| 297 | }, |
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[608] | 298 | { 91, 171, |
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| 299 | 134, 141, |
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[56] | 300 | }, |
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| 301 | }; |
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| 302 | |
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| 303 | static const UChar |
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| 304 | INIT_SIG_FLAG[3][NUM_SIG_FLAG_CTX] = |
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| 305 | { |
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[608] | 306 | { 170, 154, 139, 153, 139, 123, 123, 63, 124, 166, 183, 140, 136, 153, 154, 166, 183, 140, 136, 153, 154, 166, 183, 140, 136, 153, 154, 170, 153, 138, 138, 122, 121, 122, 121, 167, 151, 183, 140, 151, 183, 140, }, |
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| 307 | { 155, 154, 139, 153, 139, 123, 123, 63, 153, 166, 183, 140, 136, 153, 154, 166, 183, 140, 136, 153, 154, 166, 183, 140, 136, 153, 154, 170, 153, 123, 123, 107, 121, 107, 121, 167, 151, 183, 140, 151, 183, 140, }, |
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| 308 | { 111, 111, 125, 110, 110, 94, 124, 108, 124, 107, 125, 141, 179, 153, 125, 107, 125, 141, 179, 153, 125, 107, 125, 141, 179, 153, 125, 140, 139, 182, 182, 152, 136, 152, 136, 153, 136, 139, 111, 136, 139, 111, }, |
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[56] | 309 | }; |
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| 310 | |
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| 311 | static const UChar |
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| 312 | INIT_ONE_FLAG[3][NUM_ONE_FLAG_CTX] = |
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| 313 | { |
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[608] | 314 | { 154, 196, 167, 167, 154, 152, 167, 182, 182, 134, 149, 136, 153, 121, 136, 122, 169, 208, 166, 167, 154, 152, 167, 182, }, |
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| 315 | { 154, 196, 196, 167, 154, 152, 167, 182, 182, 134, 149, 136, 153, 121, 136, 137, 169, 194, 166, 167, 154, 167, 137, 182, }, |
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[56] | 316 | { 140, 92, 137, 138, 140, 152, 138, 139, 153, 74, 149, 92, 139, 107, 122, 152, 140, 179, 166, 182, 140, 227, 122, 197, }, |
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| 317 | }; |
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| 318 | |
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| 319 | static const UChar |
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| 320 | INIT_ABS_FLAG[3][NUM_ABS_FLAG_CTX] = |
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| 321 | { |
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[608] | 322 | { 107, 167, 91, 107, 107, 167, }, |
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| 323 | { 107, 167, 91, 122, 107, 167, }, |
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[56] | 324 | { 138, 153, 136, 167, 152, 152, }, |
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| 325 | }; |
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| 326 | |
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| 327 | static const UChar |
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| 328 | INIT_MVP_IDX[3][NUM_MVP_IDX_CTX] = |
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| 329 | { |
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[852] | 330 | { 168 }, |
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| 331 | { 168 }, |
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| 332 | { CNU }, |
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[56] | 333 | }; |
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| 334 | |
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| 335 | static const UChar |
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[608] | 336 | INIT_SAO_MERGE_FLAG[3][NUM_SAO_MERGE_FLAG_CTX] = |
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[56] | 337 | { |
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[608] | 338 | { 153, }, |
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| 339 | { 153, }, |
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| 340 | { 153, }, |
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[56] | 341 | }; |
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| 342 | |
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| 343 | static const UChar |
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[608] | 344 | INIT_SAO_TYPE_IDX[3][NUM_SAO_TYPE_IDX_CTX] = |
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[56] | 345 | { |
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[608] | 346 | { 160, }, |
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| 347 | { 185, }, |
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| 348 | { 200, }, |
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[56] | 349 | }; |
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| 350 | |
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[443] | 351 | static const UChar |
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[608] | 352 | INIT_TRANS_SUBDIV_FLAG[3][NUM_TRANS_SUBDIV_FLAG_CTX] = |
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[443] | 353 | { |
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[608] | 354 | { 224, 167, 122, }, |
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| 355 | { 124, 138, 94, }, |
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| 356 | { 153, 138, 138, }, |
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[56] | 357 | }; |
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| 358 | |
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[608] | 359 | static const UChar |
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| 360 | INIT_TRANSFORMSKIP_FLAG[3][2*NUM_TRANSFORMSKIP_FLAG_CTX] = |
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[56] | 361 | { |
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[608] | 362 | { 139, 139}, |
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| 363 | { 139, 139}, |
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| 364 | { 139, 139}, |
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[56] | 365 | }; |
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| 366 | |
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[608] | 367 | #if H_3D_ARP |
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[833] | 368 | #if MTK_ARP_FLAG_CABAC_SIMP_G0061 |
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[56] | 369 | static const UChar |
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[608] | 370 | INIT_ARPW[3][NUM_ARPW_CTX] = |
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[56] | 371 | { |
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[833] | 372 | { 162, 153, 162 }, |
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| 373 | { 162, 153, 162 }, |
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| 374 | { 162, 153, 162 }, |
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| 375 | }; |
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| 376 | #else |
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| 377 | static const UChar |
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| 378 | INIT_ARPW[3][NUM_ARPW_CTX] = |
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| 379 | { |
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[724] | 380 | { 162, 153, 154, 162 }, |
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| 381 | { 162, 153, 154, 162 }, |
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| 382 | { 162, 153, 154, 162 }, |
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[56] | 383 | }; |
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[608] | 384 | #endif |
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[833] | 385 | #endif |
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[608] | 386 | #if H_3D_IC |
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[833] | 387 | #if MTK_IC_FLAG_CABAC_SIMP_G0061 |
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[56] | 388 | static const UChar |
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[608] | 389 | INIT_IC_FLAG[3][NUM_IC_FLAG_CTX] = |
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[56] | 390 | { |
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[833] | 391 | { 154 }, |
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| 392 | { 154 }, |
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| 393 | { 154 }, |
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| 394 | }; |
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| 395 | #else |
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| 396 | static const UChar |
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| 397 | INIT_IC_FLAG[3][NUM_IC_FLAG_CTX] = |
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| 398 | { |
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[724] | 399 | { 154, 154, 154, }, |
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| 400 | { 154, 154, 154, }, |
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| 401 | { 154, 154, 154, }, |
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[56] | 402 | }; |
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[608] | 403 | #endif |
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[833] | 404 | #endif |
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[608] | 405 | #if H_3D_DIM |
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[833] | 406 | #if QC_GENERIC_SDC_G0122 |
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[608] | 407 | static const UChar |
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| 408 | INIT_DEPTH_INTRA_MODE[3][NUM_DEPTH_INTRA_MODE_CTX] = |
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[56] | 409 | { |
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[833] | 410 | { 154, }, |
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| 411 | { 154, }, |
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| 412 | { 154, } |
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| 413 | }; |
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| 414 | #else |
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| 415 | static const UChar |
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| 416 | INIT_DEPTH_INTRA_MODE[3][NUM_DEPTH_INTRA_MODE_CTX] = |
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| 417 | { |
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[608] | 418 | {0, 0, 64, 168, 168, 124, CNU, 0}, |
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| 419 | {0, 64, 0, 183, CNU, 108, 0, 0}, |
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| 420 | {64, 0, CNU, CNU, 168, 109, 0, 0} |
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[56] | 421 | }; |
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[833] | 422 | #endif |
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[655] | 423 | |
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[833] | 424 | #if QC_GENERIC_SDC_G0122 |
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[56] | 425 | static const UChar |
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[833] | 426 | INIT_ANGLE_FLAG[3][NUM_ANGLE_FLAG_CTX] = |
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| 427 | { |
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| 428 | { 154, 155, 156 }, |
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| 429 | { 141, 185, 214 }, |
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| 430 | { 155, 170, 157 }, |
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| 431 | }; |
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| 432 | #if !QC_SDC_UNIFY_G0130 |
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| 433 | static const UChar |
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| 434 | INIT_INTRASDC_FLAG[3][NUM_INTRASDC_FLAG_CTX] = |
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| 435 | { |
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| 436 | { 214, 229, 230 }, |
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| 437 | { 215, 202, 174 }, |
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| 438 | { 213, 201, 246 }, |
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| 439 | }; |
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| 440 | #endif |
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| 441 | #endif |
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| 442 | |
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| 443 | static const UChar |
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[608] | 444 | INIT_DDC_FLAG[3][NUM_DDC_FLAG_CTX] = |
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[56] | 445 | { |
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[608] | 446 | {0 , CNU}, |
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| 447 | {0 , CNU}, |
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| 448 | {64, CNU} |
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[56] | 449 | }; |
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| 450 | static const UChar |
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[608] | 451 | INIT_DDC_DATA[3][NUM_DDC_DATA_CTX] = |
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[2] | 452 | { |
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[724] | 453 | { 154 }, |
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| 454 | { 154 }, |
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| 455 | { 154 }, |
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[2] | 456 | }; |
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[608] | 457 | #if H_3D_DIM_DMM |
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[56] | 458 | static const UChar |
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[608] | 459 | INIT_DMM1_DATA[3][NUM_DMM1_DATA_CTX] = |
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[56] | 460 | { |
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[608] | 461 | { CNU }, |
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| 462 | { CNU }, |
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| 463 | { CNU }, |
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[2] | 464 | }; |
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| 465 | #endif |
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[608] | 466 | #if H_3D_DIM_SDC |
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| 467 | static const UChar |
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| 468 | INIT_SDC_RESIDUAL_FLAG[3][SDC_NUM_RESIDUAL_FLAG_CTX] = |
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[443] | 469 | { |
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[608] | 470 | { CNU }, |
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| 471 | { CNU }, |
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| 472 | { CNU }, |
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[443] | 473 | }; |
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[608] | 474 | static const UChar |
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| 475 | INIT_SDC_RESIDUAL[3][SDC_NUM_RESIDUAL_CTX] = |
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[443] | 476 | { |
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[608] | 477 | { 155 }, |
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| 478 | { 155 }, |
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| 479 | { 155 }, |
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[443] | 480 | }; |
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| 481 | #endif |
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[608] | 482 | #endif |
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[443] | 483 | |
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[833] | 484 | #if H_3D_INTER_SDC && !QC_SDC_UNIFY_G0130 |
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[608] | 485 | static const UChar |
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| 486 | INIT_INTER_SDC_FLAG[3][NUM_INTER_SDC_FLAG_CTX] = |
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[443] | 487 | { |
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[608] | 488 | { CNU }, |
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| 489 | { 154 }, |
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| 490 | { 154 }, |
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[443] | 491 | }; |
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[189] | 492 | |
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[608] | 493 | static const UChar |
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| 494 | INIT_INTER_SDC_SIGN_FLAG[3][NUM_INTER_SDC_SIGN_FLAG_CTX] = |
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[189] | 495 | { |
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[608] | 496 | { CNU }, |
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| 497 | { 154 }, |
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| 498 | { 154 }, |
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[189] | 499 | }; |
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| 500 | |
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[608] | 501 | static const UChar |
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| 502 | INIT_INTER_SDC_RESIDUAL[3][NUM_INTER_SDC_RESIDUAL_CTX] = |
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[189] | 503 | { |
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[608] | 504 | { CNU }, |
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| 505 | { 154 }, |
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| 506 | { 154 }, |
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[189] | 507 | }; |
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| 508 | #endif |
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[56] | 509 | //! \} |
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[833] | 510 | #if QC_SDC_UNIFY_G0130 |
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| 511 | static const UChar |
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| 512 | INIT_SDC_FLAG[3][NUM_SDC_FLAG_CTX] = |
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| 513 | { |
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| 514 | { 154 }, |
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| 515 | { 154 }, |
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| 516 | { 154 }, |
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| 517 | }; |
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| 518 | #endif |
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[56] | 519 | |
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[833] | 520 | #if H_3D_DBBP |
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| 521 | static const UChar INIT_DBBP_FLAG[3][DBBP_NUM_FLAG_CTX] = |
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| 522 | { |
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| 523 | { CNU }, |
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| 524 | { CNU }, |
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| 525 | { CNU }, |
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| 526 | }; |
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| 527 | #endif |
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[608] | 528 | |
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[2] | 529 | #endif |
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