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Ticket Resolution Summary Owner Reporter
#72 fixed Bi-prediction disabling for DBBP: A potential bug when the derived direction for merge DBBP is PRED_BI tech zxgvideo
Description

In the current WD text, I only found the following limitation for the prediction direction of DBBP. I.7.4.9.6 It is a requirement of bitstream conformance that, when dbbp_flag[ x0 ][ y0 ] is equal to 1, inter_pred_idc[ x0 ][ y0 ] shall not be equal to PRED_BI. However, the HTM has forced any inherited bi-prediction MV in DBBP to be forward prediction. I think, a bug-fix should be added on I.8.5.3.2.1, point 14 as following

  1. When predFlagL0 is equal to 1 and predFlagL1 is equal to 1, and ( nOrigPbW + nOrigPbH ) is equal to 12 or dbbp_flag is equal to 1, the following applies:

refIdxL1 = −1 predFlagL1 = 0

#74 fixed Support for more then 10 views tech kwegner
Description

Currently view dependent options from configuration file are parsed wrong. In particular more than 10 views cannot be parsed correctly. Following bugfix solves the problem

In file program_options_lite.h,line 389 following should be added cNameBuffer .resize( name.size() + 10 );

#75 fixed Discrepancy in VSP bi-pred handling tech Tomohiro Ikai
Description

There seems to be a discrepancy between spec and software. The spec reads that bipred prevention is applied regardless of VSP flag:

  1. When predFlagL0 is equal to 1 and predFlagL1 is equal to 1, and ( nOrigPbW + nOrigPbH ) is equal to 12, the following applies:

refIdxL1 = −1 (I 112) predFlagL1 = 0 (I 113)

However, the software (in TDecEntropy.cpp and TEncSearch.cpp)disbles it in the case VSP flag is true as follows. #if H_3D_VSP

if ( (pcCU->getInterDir(uiSubPartIdx) == 3) && pcSubCU->isBipredRestriction(uiPartIdx) && (pcCU\

->getVSPFlag(uiSubPartIdx) == 0)) #else

if ( (pcCU->getInterDir(uiSubPartIdx) == 3) && pcSubCU->isBipredRestriction(uiPartIdx) )

#endif

We should remove it (spec should be right).

In CTC and IBP(with MTK_I0072_IVARP_SCALING_FIX) experiment, there are no differences by this fix. No change is quite natural because VSP PU cannot be bi-prediction in the current specification. If looking at predFlagLXVSP setting logic(See I.8.5.3.2.13 Derivation process for a view synthesis prediction merge candidate), when predFlagL0VSP is 1, predFlagL1VSP cannot be 1. When predFlagL0VSP is 0, the PU is not bi-prediction. The same logic is applied in VSP inhericance case.

Lastly, even if VSP was able to be bi-prediction, we should prevent 8x4/4x8 bipred in VSP as well to preserve motion data storing implemenation.

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